Commit graph

1004 commits

Author SHA1 Message Date
WANG Siyuan
01e3e0638d AMD Bettong: Add a new AMD FP4 socket mainboard
Add a new mainboard based on AMD's Family 15h Model 60h processor.
TEST: Bettong can boot Ubuntu 14.10, Windows 7 and Windows 8.

Change-Id: Id807369ff0f04ba303383c65ddd1bd512f184e6a
Signed-off-by: WANG Siyuan <wangsiyuanbuaa@gmail.com>
Signed-off-by: WANG Siyuan <SiYuan.Wang@amd.com>
Reviewed-on: http://review.coreboot.org/10420
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-06-23 01:10:35 +02:00
WANG Siyuan
b3932e4975 AMD PI: remove unuseful ACPI code
sata.asl and superio.asl are empty files. Remove them.

Change-Id: Icd3e990aa713281e46dcbd8e0847166c77656b1c
Signed-off-by: WANG Siyuan <wangsiyuanbuaa@gmail.com>
Signed-off-by: WANG Siyuan <SiYuan.Wang@amd.com>
Reviewed-on: http://review.coreboot.org/10505
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-06-10 21:02:15 +02:00
Elyes HAOUAS
52648623e0 Remove empty lines at end of file
Used command line to remove empty lines at end of file:
find . -type f -exec sed -i -e :a -e '/^\n*$/{$d;N;};/\n$/ba' {} \;

Change-Id: I816ac9666b6dbb7c7e47843672f0d5cc499766a3
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: http://review.coreboot.org/10446
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-06-08 00:55:07 +02:00
Alexander Couzens
83fc32f7a7 device_ops: add device_t argument to write_acpi_tables
`device_t device` is missing as argument. Every device_op function
should have a `device_t device` argument.

Change-Id: I1ba4bfa0ac36a09a82b108249158c80c50f9f5fd
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
Reviewed-on: http://review.coreboot.org/9599
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-06-05 21:12:11 +02:00
Kyösti Mälkki
7748ee5ee1 AMD K8 fam10: Refactor Kconfig SB_HT_CHAIN_ON_BUS0
If SB_HT_CHAIN_ON_BUS0 is selected, HyperTransport chain for System Bus
is the first to scan and it will be assigned with bus number 0.

If HT_CHAIN_DISTRIBUTE is selected, each link will reserve a fixed range
of bus numbers instead of assigning consecutive numbers across all the links.

All fam10 have SB_HT_CHAIN_ON_BUS0 selected under northbridge.
Follow-up can easily drop this if we find this is dictated by architecture.

Change-Id: I8deddcb4c3fd679b6b27e2879d9dba3895c4dd6f
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/8366
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <edward.ocallaghan@koparo.com>
Reviewed-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
2015-06-05 10:17:35 +02:00
Vladimir Serbinenko
a4cf83df7a cbfs: Fix mismerge.
cbfs_get_file_content was replaced with cbfs_boot_map_with_leak but
36f8d27ea9 failed to get it into account.

Change-Id: I0c7840043b2ea6abaf8e70f4bf1a63c96aedebc1
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/10403
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins)
2015-06-02 21:48:24 +02:00
Vladimir Serbinenko
36f8d27ea9 Make DSDT a file in CBFS rather than embedding it into ramstage.
Makes it cleaner by putting AML into separate file rather than having
an array in C code.

Change-Id: Ia5d6b50ad9dabdb97ed05c837dc3ccc48b8f490f
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/10385
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-06-02 21:01:55 +02:00
Vladimir Serbinenko
fde81099fa amd/torpedo: Remove stale ssdt*.asl
They're not referenced in the code anywhere.

Change-Id: I4805e11523ca7d3cffb484c719f479b7a6ba3e15
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/10384
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-06-01 19:39:13 +02:00
Kyösti Mälkki
315a7b8383 binaryPI: Hide use of acpi_slp_type
Change-Id: I867932db4388eb078b69b6f42c82967777d45d79
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/10358
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-05-29 17:04:52 +02:00
Kyösti Mälkki
bc3cee538d binaryPI boards: Minor fixups to unify boards
Some missing static declarations and whitespace on the console.

Change-Id: I1af59dbfb1396297bd671b43d9326dffdd7f59d4
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/10284
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <edward.ocallaghan@koparo.com>
2015-05-24 05:34:34 +02:00
Kyösti Mälkki
9d035fa1f7 AGESA binaryPI boards: Drop annoying commentary
Same comments were already removed for the latest board, the amd/lamar.

Change-Id: Ie244f838409c567c11f7444c9cf17de72e49dbb0
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/10283
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <edward.ocallaghan@koparo.com>
2015-05-24 05:34:13 +02:00
Kyösti Mälkki
85600e3dc7 AGESA fam15x fam16x: Remove HAVE_ACPI_RESUME
Implementation corrupts low-memory on S3 resume path, rendering
OS unstable. AMD was never able to pinpoint a revision that did
not have the issue.

Change-Id: I9656ac1bfe1412775a6152b9f995c4d4ebf57159
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/10285
Reviewed-by: Rudolf Marek <r.marek@assembler.cz>
Tested-by: build bot (Jenkins)
2015-05-23 15:22:19 +02:00
Kyösti Mälkki
05b65ab23a AGESA: Drop DIMM_SUPPORT, _DDR3 and _REGISTERED
Not referenced anywhere.

Change-Id: I57180ccfab93e45df9982d08bad71834a04eb9f9
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/10280
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <edward.ocallaghan@koparo.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-05-23 11:07:28 +02:00
Patrick Georgi
b890a1228d Remove address from GPLv2 headers
As per discussion with lawyers[tm], it's not a good idea to
shorten the license header too much - not for legal reasons
but because there are tools that look for them, and giving
them a standard pattern simplifies things.

However, we got confirmation that we don't have to update
every file ever added to coreboot whenever the FSF gets a
new lease, but can drop the address instead.

util/kconfig is excluded because that's imported code that
we may want to synchronize every now and then.

$ find * -type f -exec sed -i "s:Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, *MA[, ]*02110-1301[, ]*USA:Foundation, Inc.:" {} +
$ find * -type f -exec sed -i "s:Foundation, Inc., 51 Franklin Street, Suite 500, Boston, MA 02110-1335, USA:Foundation, Inc.:" {} +
$ find * -type f -exec sed -i "s:Foundation, Inc., 59 Temple Place[-, ]*Suite 330, Boston, MA *02111-1307[, ]*USA:Foundation, Inc.:" {} +
$ find * -type f -exec sed -i "s:Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.:Foundation, Inc.:" {} +
$ find * -type f
	-a \! -name \*.patch \
	-a \! -name \*_shipped \
	-a \! -name LICENSE_GPL \
	-a \! -name LGPL.txt \
	-a \! -name COPYING \
	-a \! -name DISCLAIMER \
	-exec sed -i "/Foundation, Inc./ N;s:Foundation, Inc.* USA\.* *:Foundation, Inc. :;s:Foundation, Inc. $:Foundation, Inc.:" {} +

Change-Id: Icc968a5a5f3a5df8d32b940f9cdb35350654bef9
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/9233
Tested-by: build bot (Jenkins)
Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com>
2015-05-21 20:50:25 +02:00
Kyösti Mälkki
6be1a8bf08 AGESA: Drop unused AGESA_MEM_TABLE
These tables are not referenced anywhere, thus all
comments about adjustments are void.

Also drop stub AgesaReadSpd that is all commented out.

Change-Id: I12233ea0dc4baaf36a75f359c52cc59c9b6dad79
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/10143
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <edward.ocallaghan@koparo.com>
Reviewed-by: Dave Frodin <dave.frodin@se-eng.com>
2015-05-10 18:44:04 +02:00
Patrick Georgi
26e24cc12d 3rdparty: move to 3rdparty/blobs
There's now room for other repositories under 3rdparty.

Change-Id: I51b02d8bf46b5b9f3f8a59341090346dca7fa355
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/10109
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-05-05 22:49:18 +02:00
Patrick Georgi
f4f028790a 3rdparty: Move to blobs
To move 3rdparty to 3rdparty/blobs (ie. below itself
from git's broken perspective), we need to work around
it - since some git implementations don't like the direct
approach.

Change-Id: I1fc84bbb37e7c8c91ab14703d609a739b5ca073c
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/10108
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-05-05 22:49:11 +02:00
Martin Roth
595e7777e7 Kconfig whitespace fixes
trivial whitespace fixes.  Mostly changing leading spaces to tabs.

Change-Id: I0bdfe2059b90725e64adfc0bdde785b4e406969d
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: http://review.coreboot.org/10000
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-04-28 21:14:56 +02:00
Stefan Reinauer
13e4182119 kbuild: automatically include southbridges
This change switches all southbridge vendors and southbridges
to be autoincluded by Makefile.inc, rather than having to be
mentioned explicitly in southbridge/Makefile.inc or in
southbridge/<vendor>/Makefile.inc.

In order to be able to drop southbridge/amd/Makefile.inc, some
scattered source files had to be moved to a southbridge/amd/common
directory, in accordance to what we are doing on other architectures
already.

This means, vendor and southbridge directories are now "drop
in", e.g. be placed in the coreboot directory hierarchy
without having to modify any higher level coreboot files.

The long term plan is to enable out of tree components to be
built with a given coreboot version (given that the API did not
change).

Change-Id: I79bd644a0a3c4e8320c80f8cc7a7f8ffd65d32f2
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/9796
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2015-04-27 23:48:35 +02:00
Bruce Griffith
72645bbd67 AMD Lamar: Add a new AMD FP3 socket mainboard
Add a new mainboard based on AMD's Family 15 Model 30 processor.
TEST: Lamar will boot DOS, Ubuntu 14.10 and Windows 7.

Change-Id: I2f73c396247239d54f978846e8958950697d7464
Signed-off-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
Signed-off-by: Dave Frodin <dave.frodin@se-eng.com>
Reviewed-on: http://review.coreboot.org/5968
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
2015-04-23 00:58:26 +02:00
Julius Werner
9ff8f6f818 Unify byte order macros and clrsetbits
This patch removes quite a bit of code duplication between cpu_to_le32()
and clrsetbits_le32() style macros on the different architectures. This
also syncs those macros back up to the new write32(a, v) style IO
accessor macros that are now used on ARM and ARM64.

CQ-DEPEND=CL:254862
BRANCH=none
BUG=chromium:444723
TEST=Compiled Cosmos, Daisy, Blaze, Falco, Pinky, Pit, Rambi, Ryu,
Storm and Urara. Booted on Jerry. Tried to compare binary images...
unfortunately something about the new macro notation makes the compiler
evaluate it more efficiently (not recalculating the address between the
read and the write), so this was of limited value.

Change-Id: If8ab62912c952d68a67a0f71e82b038732cd1317
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: fd43bf446581bfb84bec4f2ebb56b5de95971c3b
Original-Change-Id: I7d301b5bb5ac0db7f5ff39e3adc2b28a1f402a72
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/254866
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/9838
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-04-21 08:23:25 +02:00
Stefan Reinauer
139e1067b6 kconfig: automatically include mainboards
This change switches all mainboard vendors and mainboards
to be autoincluded by Kconfig, rather than having to be mentioned
explicitly.

This means, vendor and mainboard directories are becoming more
"drop in", e.g. be placed in the coreboot directory hierarchy
without having to modify any higher level coreboot files.

The long term plan is to enable out of tree mainboards / components
to be built with a given coreboot version (given that the API did
not change)

Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Change-Id: Ib68ce1478a2e12562aeac6297128a21eb174d58a
Reviewed-on: http://review.coreboot.org/9295
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2015-04-18 08:31:08 +02:00
Timothy Pearson
22564088c7 mainboards/amdfam10: Copy DIMM information to cbmem after romstage
src/northbridge/amd/amdfam10: Add amdmct_cbmem_store_info()
function.

Change-Id: I07376e276e3e9e3247d2576a09e58780d32a3a76
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/9138
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@gmail.com>
2015-04-01 22:53:55 +02:00
Timothy Pearson
91e9f676b7 mainboards/amd/fam10: Add romstage timestamps
Example output:
1:start of rom stage            542
2:before ram initialization     193,989 (193,447)
3:after ram initialization      3,319,114 (3,125,124)
4:end of romstage               3,320,004 (889)

Change-Id: Idcde7dc4c7a1d6c3118c82b67e8c2fcd4a07553b
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/8776
Tested-by: build bot (Jenkins)
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2015-03-21 08:06:44 +01:00
Timothy Pearson
86f4ca5b4b cpu/amd/model_10xxx: Add support for early cbmem
mainboards/amd/fam10: Initialize cbmem area after raminit

When GFXUMA is enabled, CBMEM is placed at TOM - UMASIZE
When GFXUMA is disabled, CBMEM is placed at TOM
This matches the behaviour present before conversion to early
CBMEM.

The CBMEM location code implicitly assumes TOM does not change
between romstage and ramstage.  TOM is set by romstage raminit,
and is never changed by romstage or ramstage afterward.  As
the CBMEM location is positioned at a specific offset from TOM
that is known to both romstage and ramstage early CBMEM is safe
on Fam10h systems.

TEST: Booted ASUS KFSN4-DRE and verified both cbmem timestamp
tables from romstage and cbmem log tables from ramstage.

Change-Id: Idf9e0245fe91185696ff664b06182c26b376c196
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/8489
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
2015-03-19 08:28:43 +01:00
Dave Frodin
84c72dedab northbridge/amd/pi: Create common agesawrapper.c
This removes the mainboard agesawrapper.c file from binarypi
based boards and creates a common one.

Change-Id: I900dba914f1c401e4ac732eb93d94b98216e629a
Signed-off-by: Dave Frodin <dave.frodin@se-eng.com>
Reviewed-on: http://review.coreboot.org/8671
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
2015-03-16 21:46:17 +01:00
Dave Frodin
4b45dd3253 cpu/amd/pi: Add amd_initcpuio() and amd_initmmio()
This makes the change to the cpu/amd/pi/00730F01 that was
made for the cpu/amd/agesa based boards in:
    commit 48518f0d
    AGESA: Add amd_initcpuio() and amd_initmmio()
    These are not wrappers for AGESA as they do not enter vendorcode at all.
    We expect most of the added fixme.c file to be written without use of AMDLIB.h
    and parts relocated as northbridge enable_resources().

The equivalent change has already been made for cpu/amd/pi/00630F01.

Change-Id: I591b50ee807436f5a1dee14d2c88a77462024744
Signed-off-by: Dave Frodin <dave.frodin@se-eng.com>
Reviewed-on: http://review.coreboot.org/8670
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
2015-03-16 21:45:49 +01:00
Timothy Pearson
8e3da749ed mainboards/amd: Fix incorrect reboot_bits location
Change-Id: Iead07df714f4f1bbaae6b564431fb4edf7b18ac2
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/8684
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2015-03-16 07:07:18 +01:00
Kyösti Mälkki
5ef269b5a3 AMD fam10: Always have AMDMCT
Also drop some more #if UNUSED_CODE.

Change-Id: I1bbe96a65c9240636ff7cfaf70c2ecbfb3aee715
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/8551
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-03-09 06:00:07 +01:00
Kyösti Mälkki
82fbda76c9 AGESA: Use same HeapManager for all BiosCallOuts
We do not allow platforms to mess around with memory layout.

Change-Id: I316ff522c8833fa3b7ad20f2c5a9cae21f4174d8
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/8604
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-03-07 21:22:44 +01:00
Alexandru Gagniuc
fb9d4caf16 mainboard: Do not redefine DRIVERS_PS2_KEYBOARD Kconfig variable
Change-Id: Icc603dfe92360d978221a25ad28517da43942bea
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/8498
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-03-05 09:33:47 +01:00
Alexandru Gagniuc
1896996589 mainboard: Do not redefine CONSOLE_POST Kconfig variable
This option is already defined in console/Kconfig, and is intended
to be controlled by the user. Only six boards in the entire tree
redefined it, so remove the definition from those boards.

Change-Id: I3a65444f63c93c01d78569a9a7eb01158fb290bd
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/8457
Tested-by: build bot (Jenkins)
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-by: Martin Roth <gaumless@gmail.com>
2015-02-24 06:41:16 +01:00
Timothy Pearson
033bb4bc8d acpi: Generate valid ACPI processor objects
The existing code generated invalid ACPI processor objects
if the core number was greater than 9.  The first invalid
object instance was autocorrected by Linux, but subsequent
instances conflicted with each other, leading to a failure
to boot if more than 10 CPU cores were installed.

The modified code will function with up to 99 cores.

Change-Id: I62dc0eb61ae2e2b7f7dcf30e9c7de09cd901a81c
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/8422
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
2015-02-16 21:02:30 +01:00
Timothy Pearson
94efd19517 mainboard/cmos: Kill off unused boot_* parameters
Change-Id: I19d6b56e3ac5e6e7946648b97c86a223b748e3bd
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/8460
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2015-02-16 09:24:14 +01:00
Timothy Pearson
c0ae684d16 mainboard/cmos: Move ECC variables out of fallback mechanism byte
Change-Id: Icebc12d8f83494150a7bdd3adcc168d7b48b2e68
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/8458
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2015-02-16 09:23:44 +01:00
Timothy Pearson
9b68f05fc8 mainboard/cmos: Delete obsolete commented parameters
Change-Id: Iccad79c142a7fcf89dd0fbebe8c07ad9ef019e91
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/8459
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Tested-by: build bot (Jenkins)
2015-02-16 09:23:02 +01:00
Timothy Pearson
c5ca13758f mainboard/amd/amdfam10: Update AMD K10 socket F NVRAM layout files
This removes spurious K8 options and adds appropriate K10 options.
File content taken from the functional K10 ASUS KFSN4-DRE board.

Change-Id: I237bb139056f39f21416268cb52d24c5bc5f111d
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/8456
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2015-02-16 09:13:09 +01:00
Kevin Paul Herbert
bde6d309df x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer
On x86, change the type of the address parameter in
read8()/read16/read32()/write8()/write16()/write32() to be a
pointer, instead of unsigned long.

Change-Id: Ic26dd8a72d82828b69be3c04944710681b7bd330
Signed-off-by: Kevin Paul Herbert <kph@meraki.net>
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/7784
Tested-by: build bot (Jenkins)
2015-02-15 08:50:22 +01:00
Paul Menzel
4549e5a665 AMD K8 boards’ romstage.c: Spell sync*hr*onize correctly
Change-Id: I92e6e7f1292f66642aa0336064a4eccba104dd08
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: http://review.coreboot.org/5101
Reviewed-by: Rudolf Marek <r.marek@assembler.cz>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Tested-by: build bot (Jenkins)
2015-02-12 02:27:07 +01:00
Kyösti Mälkki
d15cb519ad amd/model_10xxx: Drop AMD_UCODE_PATCH_FILE selection
Include microcode updates in CBFS for every CPU revision the platform
can support, as changing to different CPU revision should not require
a coreboot rebuild.

This increases CBFS usage from 2 kB to 14 kB.

Change-Id: I6bf90221a688f1a54e49641ce3ba378c5bf659f9
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/4521
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Nicolas Reinecke <nr@das-labor.org>
2015-02-03 04:52:00 +01:00
Dave Frodin
bc21a41e1c southbridge/amd/pi: Rename Avalon to Hudson
To maintain consistancy with southbridge/amd/agesa/hudson rename
pi/avalon to pi/hudson in advance of adding support for the
base hudson southbridge.

Change-Id: Icff8c4c06aae2d40cbd9e90903754735ac3510c3
Signed-off-by: Dave Frodin <dave.frodin@se-eng.com>
Reviewed-on: http://review.coreboot.org/8251
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
2015-01-27 15:07:45 +01:00
Kyösti Mälkki
78c5d584a0 ACPI: Add acpi_is_wakeup_s3() for romstage
This replaces acpi_is_wakeup_early().

Change-Id: I23112c1fc7b6f99584bc065fbf6b10fb073b1eb6
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/8187
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2015-01-10 13:53:51 +01:00
Kyösti Mälkki
0b5b541373 AMD binaryPI 00730F01: Switch to per-device ACPI
Change-Id: Iad31ae3e511c8ebacc973b2d8a8e3bfca719ee7c
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/7583
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2015-01-09 11:02:01 +01:00
Martin Roth
c62ee70b6e src/mainboard: Doxygen fixes
- Remove @param command for #define - this isn't valid.
- Rename duplicate @section names - All of the renamed @sections
have other @section names in the same file.
- Remove blank @brief and @param commands - Doxygen seems to REALLY
dislike this...
- Add a missing @param name.

Change-Id: Iba99ec68b37bbb5c375b7256363d16228031d771
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: http://review.coreboot.org/8175
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2015-01-09 06:05:19 +01:00
Stefan Reinauer
069f4766a0 mainboard: Drop print_ implementation from non-romcc boards
Because we had no stack on romcc boards, we had a separate, not as
powerful clone of printk: print_*. Back in the day, like more than
half a decade ago, we migrated a lot of boards to printk, but we never
cleaned up the existing code to be consistent. instead, we worked around
the problem with a very messy console.h (nowadays the mess is hidden in
romstage_console.c and early_print.h)
This patch cleans up the mainboard code to use printk() on all non-ROMCC
boards.

Change-Id: I2383f24343fc2041fef4af65d717d754ad58425e
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/8111
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)
2015-01-06 20:16:47 +01:00
Martin Roth
6355cbff51 AMD platforms: fix callout_entry doxygen errors
Somewhere along the line, the sb_cfg parameter name was changed to
config, but this wasn't carried into the documentation or the function
prototypes everywhere.

Change-Id: Iccb0829c2f50370dddb70af915a6759316c4727a
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/8098
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)
2015-01-06 06:34:18 +01:00
Martin Roth
d30746ab6b AMD Mainboards - rd890_cfg.h: fix Doxygen errors.
Doxygen gives an error when processing #defines inside doxygen comments.
Normal comments are ignored.  The choice for this fix was to make this
a standard comment starting with '/*' instead of '/**', or to make the
comment not a #define.

Change-Id: I97fbbcea6f045d80ec7c0ab5e196d57e5da16d86
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/8099
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)
2015-01-06 06:33:52 +01:00
Martin Roth
d63dbe8ef9 AMD Mainboards - rd890_cfg.c: Fix doxygen warnings
Remove variable types from the param declaration.

Change-Id: Ia6a3d36fcf01d7a52bb1a31cfdb47d88bf612d79
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/8097
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)
2015-01-06 06:33:01 +01:00
Martin Roth
0b2c4ece7d Remove AMD's "Release Content" doxygen from coreboot files
These comments are left over and are not relevent in the coreboot
code, but created a new section titled "Release Content" in the
doxygen documentation produced by the coreboot code.  In an effort
to clean up the output, I'm removing these doxygen comments.

Change-Id: I4d7be3313a2ab6c140b4f3afe70dffc4abba7bca
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/8069
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2015-01-06 06:31:15 +01:00
Edward O'Callaghan
ebe3a7aea3 mainboard/*/romstage.c: Fix 'lib/delay.c' inclusion
Use 'delay.h' header rather than directly including 'delay.c'
source. N.B. Some amdfam10 and K8 boards are not included in
this changeset since unrelated issues are woven in there.

Change-Id: Ibc0c0e560d8eedaf5c3150f95ba72fe5dd8d6f3a
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/8086
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2015-01-06 01:52:07 +01:00