Commit graph

59 commits

Author SHA1 Message Date
Patrick Georgi
796fe068d3 Mark non-executable files non-executable
No need to mark Makefiles, C files or devicetrees
executable.

Change-Id: Ide3a0efc5b14f2cbd7e2a65c541b52491575bb78
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: http://review.coreboot.org/7618
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-12-01 17:33:07 +01:00
York Yang
4a91f64431 mainboard/intel/minnowmax: use Baytrail Gold3 FSP
Baytrail Gold3 FSP support memory down configuration.  Update Minnow Max
to use Gold3 FSP.  Set memory down data in devicetree.cb, instead of use
different FSP image.

Change-Id: Ic03da2d2a1cee5144b9a013d3dd9f982ff043123
Signed-off-by: York Yang <york.yang@intel.com>
Reviewed-on: http://review.coreboot.org/7581
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-by: Martin Roth <gaumless@gmail.com>
2014-11-29 22:57:50 +01:00
Martin Roth
e55a7c5403 fsp_baytrail: Update chip.h UPD entries to match names in fspvpd.h
The entries in chip.h are used to set the UPD values.  These had
originally been shortened and did not match the names of the structure
entries in vendorcode/intel/fsp/baytrail/include/fspvpd.h

This patch aligns the names.
- Update names in chip.h.
- Update names in devictree registers for bayley bay and minnow max.
- Update names in chipset_fsp_util.c

Change-Id: I8d7e34195cec2e63802d7e07e5aed71735556936
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/7486
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: FEI WANG <wangfei.jimei@gmail.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-11-19 03:56:38 +01:00
Martin Roth
21c48d27dd minnowmax: Tell the FSP to set TSEG to 8MB
Minnowboard Max was broken by 
commit 454625c5 - intel/fsp_baytrail: Fix SMM/SMI
because TSEG wasn't set to 8MB by the FSP.
The default in the FSP is 1MB.

Change-Id: I2e671a6ca0240e931399920c62439c36133789aa
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/7240
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)
2014-10-29 15:30:16 +01:00
Stefan Reinauer
cb0d772eef Add board_info for all Google/Intel boards mitting the file
Change-Id: Iac53462ab3621d96ba15e2fde2800212584246db
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/7072
Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins)
2014-10-17 10:12:08 +02:00
Mohan D'Costa
f9f53eb72f intel/minnowmax: Enable S3 suspend/resume
This enables S3 Suspend / Resume support for MinnowMax board
using Intel's Bay Trail FSP

Tested resume from Power Button and Magic Packet.

Change-Id: I021122a68c05f2e725cabb8f3946249afe802bbe
Signed-off-by: Mohan D'Costa <mohan@ndr.co.jp>
Reviewed-on: http://review.coreboot.org/6972
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <gaumless@gmail.com>
Tested-by: build bot (Jenkins)
2014-09-29 19:36:29 +02:00
Vladimir Serbinenko
f99a62b65e Remove dead video.asl
Change-Id: Iadaa6172347ebb7d367d1faa6ed9462fff07d7e6
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/6730
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-08-22 20:27:58 +02:00
Martin Roth
b40c345947 mainboard/intel/minnowmax: clean up includes & whitespace
Clean up as requested in commit e6df041b.
No functional changes.

Change-Id: Iec3f7ee25fd8351c7e13d660e2df6461f7745478
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/6597
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2014-08-12 03:35:59 +02:00
Martin Roth
e6df041b8b mainboard/intel/minnowmax: Add MinnowMax mainboard
MinnowMax board using Intel's Bay Trail FSP

Working:
- Booting from SATA / USB / (USB3 with latest SeaBIOS)

Not working:
- Boot from SD
- S3 Suspend / Resume

***** To configure the FSP *****
Download the Bay Trail FSP and the binary config tool:

Modify the standard Bay Trail FSP:
run the bct tool with the command line options:
bct --bin <Bay Trail FSP Binary> \
	--absf src/vendorcode/intel/fsp/baytrail/absf/minnowmax_Xgb.absf \
	--bout <path to save the updated FSP to>

Here are the required changes for modifying the FSP manually:
	Enable Memory Down: Enabled
	DRAM Speed: 1066 MHz
	DIMM_DWidth: x16
	DIMM_Density: 4 Gbit (2GB Minnow Max) / 2 Gbit (1GB Minnow Max)
	tCL: 7
	tRP_tRCD: 7
	tWR: 8
	tRRD: 6
	tRTP: 4
	tFAW: 27
Other FSP values can remain the same.

***** To configure the vbios *****
The vbios is in the Bay Trail FSP package.
Download Intel's "Binary Modification Program" (BMP)
Use it to disable all ports except HDMI on port B.

Change-Id: I00d90e0d838d70c9d25c69f5115d0c9d6d19855c
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/6429
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-08-11 19:01:25 +02:00