Commit Graph

3414 Commits

Author SHA1 Message Date
Iru Cai 1e2676bf1b autoport: move the generated gnvs.c to acpi_tables.c
Change-Id: I8f6eea579f69060608639b1c50255acd8ab5a4a2
Signed-off-by: Iru Cai <mytbk920423@gmail.com>
Reviewed-on: https://review.coreboot.org/c/30889
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tristan Corrick <tristan@corrick.kiwi>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2019-01-15 23:15:38 +00:00
Patrick Rudolph 6085d39bdb util/superiotool: Add ITE8528
Add ITE8528 which can be found on the wedge100s.
Most registers are dumped from hardware.

No datasheet is publicy available.

Change-Id: I24b12c0032157a4959336f8b51dadbe7b2e09d66
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/30801
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2019-01-15 07:45:55 +00:00
Arthur Heymans 3ef017c4d4 [RFC]util/checklist: Remove this functionality
It was only hooked up for galileo board when using the obsolete
FSP1.1. I don't see how it can be useful...

Change-Id: Ifd7cbd664cfa3b729a11c885134fd9b5de62a96c
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/30691
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-01-14 19:42:59 +00:00
Patrick Georgi 5ce73e9836 util/crossgcc: derive date and version from latest commit
This way date and version are automatically updated when util/crossgcc
was changed, the version contains the commit ID and we have less churn
on these variables.

Change-Id: I475ba9578a8bb421d7c342d2569d7de7fcf4161d
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/30804
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2019-01-11 14:55:39 +00:00
Elyes HAOUAS 75292a139e crossgcc: Update acpica to version 20190108
changes in this version: https://acpica.org/node/164

Change-Id: Iff7fb6990f69f658c41ec115a3383ec902d8300f
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/30773
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2019-01-10 12:54:31 +00:00
Elyes HAOUAS 930d96e1b6 crossgcc: Update Python to version 3.7.2
Change-Id: Ie0b3d31ba116314308d4fcc36a19587370fff7cc
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/30560
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-01-07 10:33:37 +00:00
Nico Huber 844eda0f3b util/ifdtool: Fix regions_collide() check
The old version was unnecessarily complex and allowed one region to
include the other.

Change-Id: Ibf7faf8103c8945b82c3962b5a7b82c3288b871f
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/30673
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-01-06 23:54:41 +00:00
Elyes HAOUAS a2046b29ef crossgcc: Update CMake to version 3.13.2
Change-Id: Ifd9e82d564e4e49194ac48786fd233cbf97a55c5
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/30668
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2019-01-05 14:42:06 +00:00
Elyes HAOUAS 53feeb0f1a crossgcc: Update GDB to version 8.2.1
Change-Id: I454843dcabe7e3fa4b13dd58ce81ba9f25b5a432
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/30667
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2019-01-05 14:41:38 +00:00
Elyes HAOUAS d4cb736c31 crossgcc: Update LLVM to 7.0.1
Change-Id: I7d88f0c36a254d8b2e3e76f632f46f0d2a4ad6f8
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/30666
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2019-01-05 14:41:30 +00:00
Shaleen Jain 2822d66238 util/inteltool: fix PCR init of Sunrise Point-LP devices
Fixes getting a dump of GPIO registers for these devices.

Change-Id: I80f05a170152969ba45d6aee33ab7ed5296ee496
Signed-off-by: Shaleen Jain <shaleen@jain.sh>
Reviewed-on: https://review.coreboot.org/c/30604
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-01-05 11:15:04 +00:00
Elyes HAOUAS 71a743e961 crossgcc: Update acpica and Expat versions
Update:
 * acpica to version 20181213
   changes in this version: https://acpica.org/node/163
 * Expat to version 2.2.6
   changes in this version:
   https://github.com/libexpat/libexpat/blob/R_2_2_6/expat/Changes

Change-Id: Ib67cf26497a0c2c2a364741675b13e4ce0190e41
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/30313
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2019-01-04 22:04:31 +00:00
Kyösti Mälkki 031dc67a61 util/superiotool: Add ITE IT8786E-I
Based on IT8786E-I V0.4.1 datasheet with following remark:

  "Please note that the IT8786E-I V0.4.1 is
   applicable only to the D version."

Signed-off-by: Kyösti Mälkki <kyosti.malkki@3mdeb.com>
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Change-Id: Ibf6e290abb01ae1b6b28173a83e88d1d99663ad4
Reviewed-on: https://review.coreboot.org/c/30334
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2019-01-04 15:07:19 +00:00
Angel Pons 782341dd3a util/autoport/readme.md: Correct minor inconsistency
Commit a5072af67d ("util/autoport: Use romstage.c instead of
early_southbridge.c") changed where the SPD map is. Reflect that.

Change-Id: Id0bd1778617371bac5921c4eae63d0beb088216c
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/30655
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Reviewed-by: Tristan Corrick <tristan@corrick.kiwi>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-01-04 13:12:00 +00:00
Edward O'Callaghan 4139c15276 util/gitconfig/pre-commit: Use clang-format to sanitise commits
Use the `git-format' tool to sanitise coreboot commits such that
they conform to coreboot's coding style.

This fancy piece of machinary allows one to have LibFormat from
Clang to automatically check your commit conforms to coreboot's
coding style, fix any issues automatically and provides you a
diff you may review and apply at your convenience.

N.B. When the `clang-format' binary is not found we issue a warning
that the test was skipped and carry on as usual. Hence, this is
strictly non-enforcing at this current time. You may use it at your
leisure.

Change-Id: If49017ea82f0707efd47cae5978a286a9af8f3b7
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: https://review.coreboot.org/c/8037
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-01-04 10:37:10 +00:00
Stefan Reinauer d1584fb250 crossgcc: Update acpica to 20180927
Update to latest version of iasl:

(From the acpica.org changelogs)
* Fixed a regression introduced in version 20180927 that could cause the
  compiler to fault, especially with NamePaths containing one or more
  carats (^). Such as: ^^_SB_PCI0

* Added a new remark for the Sleep() operator when the sleep time
  operand is larger than one second. This is a very long time for the
  ASL/BIOS code and may not be what was intended by the ASL writer.

* Implemented detection of extraneous/redundant uses of the Offset()
  operator within a Field Unit list. A remark is now issued for these.
  For example, the first two of the Offset() operators below are
  extraneous. Because both the compiler and the interpreter track the
  offsets automatically, these Offsets simply refer to the current
  offset and are unnecessary. Note, when optimization is enabled, the
  iASL compiler will in fact remove the redundant Offset operators and
  will not emit any AML code for them.

Change-Id: I46a1b1be44328aa2172f4741e9fd0c9b0f4e0430
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/c/28944
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-01-04 10:28:46 +00:00
Stefan Reinauer aedb1dfbbb crossgcc: Update software versions
Update toolchain to the following software versions:

 o Python 3.5.1 -> 3.7.0
 o LLVM   6.0.0 -> 7.0.0
 o Expat  2.2.1 -> 2.2.5
 o MPC    1.0.3 -> 1.1.0
 o MPFR   3.1.5 -> 4.0.1

Change-Id: I66c6138c7b65c73a89b3cf980bb08950d8fffe6a
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/c/28887
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-01-04 10:28:00 +00:00
Tristan Corrick f50bd6d82d util/chromeos/crosfirmware.sh: Print more messages
The existing code has several messages that are only printed when the
DEBUG variable is set. These messages are not verbose, and are quite
useful to see how the script is progressing. So, print them
unconditionally.

Change-Id: I8f78e4563f0b4a42f831194a6e526284c2fbcd92
Signed-off-by: Tristan Corrick <tristan@corrick.kiwi>
Reviewed-on: https://review.coreboot.org/c/30550
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2019-01-03 16:53:57 +00:00
Tristan Corrick d80607da4d util/chromeos/crosfirmware.sh: Check for dependencies
crosfirmware.sh has dependencies that might not be installed on some
systems. If a dependency is missing, provide a clear message about the
issue and how to resolve it.

Change-Id: I265bd03666f1273d3c22b60aae860c48c758005b
Signed-off-by: Tristan Corrick <tristan@corrick.kiwi>
Reviewed-on: https://review.coreboot.org/c/30549
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-01-03 16:53:32 +00:00
Tristan Corrick 30348c2058 util/chromeos/crosfirmware.sh: Print download status
It's quite useful to know the download progress, as it can take a while
even with a fast connection. For example, the peppy recovery image is
~600 MiB. It also lets the user know that disk space is being filled.

Change-Id: I8c175f9095478ffe33c95b7ef9907c25b5f10f8c
Signed-off-by: Tristan Corrick <tristan@corrick.kiwi>
Reviewed-on: https://review.coreboot.org/c/30548
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-01-03 16:52:57 +00:00
Tristan Corrick df90c626e0 util/chromeos/crosfirmware.sh: Add /sbin to PATH
On some systems, such as Debian 9.6, `parted` and `debugfs` are located
in /sbin. Adding /sbin to PATH means that this script can work when run
as a regular user.

Change-Id: I151dba467e2b196f13093334273dae8a05865491
Signed-off-by: Tristan Corrick <tristan@corrick.kiwi>
Reviewed-on: https://review.coreboot.org/c/30547
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2019-01-03 16:52:36 +00:00
Elyes HAOUAS 69b6c56909 util/xcompile/xcompile: Use tab for indent
Change-Id: I9878e6d962004003e2c05a6cdb8ecb0a3a02ae66
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/30352
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2018-12-28 22:33:30 +00:00
Matthew Garrett 2bf28e52ee util/inteltool: Add support for Sunrise Point LP
Used documents:
334658 (Sunrise Point-LP I/O datasheet vol. 1)
334659 (Sunrise Point-LP I/O datasheet vol. 2)
332690 (Sunrise Point I/O datasheet vol. 1)

Change-Id: I16237ffc9a225b46271f2a51d77a7f28dfc36138
Signed-off-by: Felix Singer <migy@darmstadt.ccc.de>
Reviewed-on: https://review.coreboot.org/c/28623
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2018-12-28 22:31:54 +00:00
Frans Hendriks e1700fc832 util/cbfstool/cbfstool.c: Fix typo
Fix typo of 'top-aligned'

BUG=N/A
TEST=Intel CherryHill CRB

Change-Id: I6dc2f150d8ec245070257384b406a570498400b2
Signed-off-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-on: https://review.coreboot.org/c/30337
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Tristan Corrick <tristan@corrick.kiwi>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-12-24 08:13:48 +00:00
Patrick Georgi 250f01e7e3 util/release: Don't assume the source is in a directory called coreboot
Change-Id: I384ff2f01b38916851522411d0c25c49793fe480
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/30343
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2018-12-21 18:06:36 +00:00
Patrick Georgi 3b2305eed9 util/release: Use "gpg", not "gpg2" for creating signatures
It's the common name.

Change-Id: Iafa793b961847b2c98282fd035ea96ddf6109012
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/30342
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
2018-12-21 18:06:15 +00:00
Patrick Georgi 35c8dcf992 util/release/genrelnotes: Don't assume we're on origin/master
A release may be done from an older commit. It's also not a problem as
commits are stored in the reflog (unlike local changes that the script
guards properly).

Change-Id: I26f1c16c1cdfc9e77e28528b3327ce30c5b82b19
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/30341
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
2018-12-21 18:06:01 +00:00
Patrick Georgi fa13a6437e util/release: Test for rename(1) in genrelnotes
It's a separate package on debian, so it may not be installed with perl.

Change-Id: Id82661e1d7e6a025f5b207e3bd61669abc32d328
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/30340
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
2018-12-21 18:05:42 +00:00
Patrick Georgi 84601e468f util/release: Also keep 3rdparty/fsp in the blobs tarball
Change-Id: I089519f685377ae02155817bb042f83d79d1af6c
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/30339
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
2018-12-21 18:05:24 +00:00
Patrick Rudolph 146fe6da09 util/xcompile/xcompile: Enable x86_64 support
Similar to i686 on x86_32, compile for nocona on x86_64.
Nocona is the first Pentium 4 CPU that has long mode support.
Required for 64bit support.

Change-Id: Ied28f98f89610a748be8d66cf35814e9112a4407
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/c/29877
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-12-20 22:13:48 +00:00
Bob Moragues 7f520c8fe6 zoombini: remove support for deprecated zoombini board
Change-Id: Iab2737940f07afb4f5a29ff50e6cb2a22027c51b
Signed-off-by: Bob Moragues <moragues@chromium.org>
Reviewed-on: https://review.coreboot.org/c/30094
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-12-19 18:05:51 +00:00
Jonathan Neuschäfer cb76069e87 util/crossgcc/buildgcc: Remove quotation marks around hashes
They were not originally printed, and serve no good purpose, so let's
remove them again.

Change-Id: I4e00477f2e143f93fd27ba6a083977a667a3eb48
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/c/28829
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-12-19 17:02:01 +00:00
Stefan Tauner 47d6663bba utils: introduce find_usbdebug.sh to help find USB debug ports
Carl-Daniel made this script a long time ago but it never was picked up
in the tree. Now that USB debugging is way more common it makes
sense to include it.

I have made a number of changes to the original version:
* -h help text
* check for running as root
* enhanced readability (test -> if)
* new execution flow and refined output that better shows the device(s)
  attached to the debug port(s)
* handling of Intel rate-matching hubs
* hiding of (bogus) error messages from lspci and lsusb

Signed-off-by: Stefan Tauner <stefan.tauner@gmx.at>
Change-Id: Iadf775e990f5c5f91a28d57e3331d1f59acee305
Reviewed-on: https://review.coreboot.org/c/9305
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-12-19 10:21:32 +00:00
Patrick Rudolph 21046a33ef util/cbfstool/cbfs-mkstage: Support x86_64
Add support for relocations on x86_64.
Required for 64bit romstage.

Change-Id: I1ff223d3476776297b501813a953356dd6fa9d67
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/c/30115
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-12-19 06:06:49 +00:00
Patrick Rudolph 565bebe0b3 util/cbfstool: Support AMD64 rmodules
Add support for 64bit rmodule, as required for relocatable
ramstage on x86_64.

Change-Id: I7fbb3b4c0f76ce82c090b5f16f67a728b6bf94a5
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/c/29874
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-12-19 06:05:52 +00:00
Jonathan Neuschäfer 1fb7dd076f util/lint/spelling.txt: Protect "acknowledgement" entry
In commit eceba31c7f ("util/lint: Set "acknowledgement" correct"), the
word "acknowledgement" was removed from util/lint/spelling.txt. A more
robust solution is to comment it out, as done for "sepc" in commit
afa5ec8d5f ("util/lint: Update spelling.txt to latest linux  version").

Change-Id: Ia976dedc9b31190d22e7b946f14709d5c4577f71
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/c/30167
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-12-18 13:26:15 +00:00
Jonathan Neuschäfer 05400b7a2f util/util_readme: Don't recommend running this script with "sh"
util/util_readme/util_readme.sh is specifically a bash script and
requires bash-specific features such as "[[". It doesn't work when run
with a "sh" shell that only implements POSIX features, such as dash.
Thus, tell the user to run the script directly, in which case the #!
line is used.

Change-Id: I5706ffe857c5a148e9776571a377ad8647f9a4c2
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/c/30162
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-12-18 13:25:21 +00:00
Jonathan Neuschäfer 6b867b8aa8 util/bucts: Add a description.md file
Change-Id: I367703ffcd8d10dec0c67b61c9ebbefd497424fd
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/c/30161
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-12-18 13:24:56 +00:00
Arthur Heymans 7ccb2821d2 util/board_status.sh: Fix command for fetching the kernel log
94b761c8e (util/board_status: run dmesg with sudo) attempted to
fetch the console as root locally but instead sudo was put in front
of the remote path which runs as root anyways.

Also unless quotation marks are used the cmd function will see 'sudo'
and 'dmesg' as separate aruguments.

Change-Id: Ib9e9e4b443f4e3ad04c5fda2c2ce626255a190f2
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/30264
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-12-18 13:22:11 +00:00
Patrick Georgi 571477b514 util/scripts/maintainers.go: file: queries are more stable with quotes
The gerrit docs aren't very explicit about it, but file:"^foo$" is more
robust than file:^foo$.

Change-Id: I16c7d972d365cd04ca5fbb78012ad4eaad667be6
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/29781
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-12-05 15:21:21 +00:00
Adam Kallai 66c22508c7 cbmem: Enable AArch64 support
TEST=on Chromebook Kevin with 64bit userland, it works well.

Change-Id: If16065000214c6cff9c14a14c5b5f44faca38153
Signed-off-by: Adam Kallai <kadam@inf.u-szeged.hu>
Reviewed-on: https://review.coreboot.org/c/29978
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2018-12-03 09:43:00 +00:00
Jonathan Neuschäfer c22ad581c8 arch/power8: Rename to ppc64
POWER8 is a specific implementation of ppc64, which is by now outdated
(POWER9 has been on the market for a while). Rename arch/power8/ to
potentially cover a wider range of hardware.

TEST=Toolchains built before/after this commit can build coreboot for
     emulation/qemu-power8 from before/after this commit.

Change-Id: I2d6f08b12a9ffc8a652ddcd6f24ad85ecb33ca52
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/c/29943
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Timothy Pearson <tpearson@raptorengineering.com>
2018-11-30 20:02:17 +00:00
Philipp Deppenwiese aea00f496b broadcom: Remove SoC and board support
The reason for this code cleanup is the legacy
Google Purin board which isn't available anymore
and AFAIK never made it into the stores.

* Remove broadcom cygnus SoC support
* Remove /util/broadcom tool
* Remove Google Purin mainboard
* Remove MAINTAINERS entries

Change-Id: I148dd7eb0192d396cb69bc26c4062f88a764771a
Signed-off-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/29905
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-11-30 10:26:37 +00:00
Nico Huber 94473afcd2 util/inteltool: Add Apollo Lake LPC ID and allow to read PCRs
The P2SB (PCI to Side-Band) bridge is on a different PCI device on APL.
Hence, we have to decide based on the LPC ID which device to query.

Also fix a comment.

Change-Id: Ie20d7d2d246629d085bcf4740ba28b1e81e6a12a
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/c/29896
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-11-29 21:03:24 +00:00
Elyes HAOUAS f0c5be2a4f mb/*/*/Kconfig: Remove useless comment
Change-Id: Ibdff50761a205d936b0ebe067f418be0a2051798
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/29871
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Hellsenberg <th3fanbus@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: David Guckian
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
2018-11-28 13:53:51 +00:00
Martin Roth 7ed3fe2b47 romcc: Increase buffer size to fit max string size
On the updated builder image, the build is failing because the system
compiler has been updated to GCC 8.2.0.  It complains about the
possibility of overflow when putting one 30 character buffer plus 2
characters into another 30 character buffer.  To fix this, increase
the recipient buffer size by 2.

romcc.c:3645:2: note: 'sprintf' output between 3 and 32 bytes into a destination
of size 30 [-Werror=format-overflow=]
  sprintf(buf, "\"%s\"", scratch);
  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
romcc.c:3649:2: note: 'sprintf' output between 3 and 32 bytes into a destination
of size 30 [-Werror=format-overflow=]
  sprintf(buf, "\"%s\"", scratch);
  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

Change-Id: I7879a7202cc3ff52301b10118fc49fcc601f133e
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/c/29850
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2018-11-28 11:47:32 +00:00
Julius Werner e3c2391fca cbmem: Fix remaining mapped memory accesses to use aligned_memcpy()
aligned_memcpy() was introduced to fix issues with platforms that don't
allow unaligned accesses to areas mapped with /dev/mem, but we missed a
few spots. Fix them.

Change-Id: I97ea953455b41a50023ceaca7eb148d60e6b8097
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/29848
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-11-27 19:31:26 +00:00
Patrick Georgi d971e7670c util/crossgcc: Document how to build the toolchain for another location
One common issue with the toolchain is that it takes a very long time
to build while it's somewhat volatile inside the coreboot tree.

Installing the toolchain elsewhere helps keep it safe but since there
is no reliable default location outside the tree, keep the default
as is.

Change-Id: Ic414cddfd3c7097412f3f2c3c7ec7b7191fa32de
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/29826
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2018-11-26 09:24:01 +00:00
Patrick Georgi 9651058c42 util/scripts/maintainers.go: drop special case for "THE REST"
It's not useful anymore.

Change-Id: Iba7f10dc87301911ff5f73c182b41c268fba310a
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/29658
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-11-24 22:12:07 +00:00
Elyes HAOUAS 6d19a20f5f mb: Set coreboot as DSDT's manufacturer model ID
Field 'OEMID' & "OEM Table ID" are related to DSDT table
not to mainboard.
So use macro to set them respectvely to "COREv4" and
"COREBOOT".

Change-Id: I060e07a730e721df4a86128ee89bfe168c69f31e
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/29790
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: David Guckian
2018-11-23 11:00:40 +00:00