Commit Graph

97 Commits

Author SHA1 Message Date
Stefan Reinauer 7db27ee648 gcc 4.1 fixes.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2177 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-02-19 14:43:48 +00:00
Stefan Reinauer 6ab43fcc48 Updating FSF address in the code.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2051 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-10-05 18:17:45 +00:00
Jason Schildt 043b409904 Undoing all HDAMA commits from LNXI from r2005->2003
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2006 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-08-10 15:16:44 +00:00
Jason Schildt 27b8511880 - reverting back to original romcc.c before hdama checkin broke all
other builds.



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2005 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-08-10 14:31:52 +00:00
Jason Schildt 6e44b422b3 - Merge from linuxbios-lnxi (Linux Networx repository) up to public tree.
- Special version for HDAMA rev G with 33Mhz test and reboot out.
        - Support for CPU rev E, dual core, memory hoisting,
        - corrected an SST flashing problem. Kernel bug work around (NUMA)
        - added a Kernel bug work around for assigning CPU's to memory.

 r2@gog:  svnadmin | 2005-08-03 08:47:54 -0600
 Create local LNXI branch
 r1110@gog:  jschildt | 2005-08-09 10:35:51 -0600
 - Merge from Tom Zimmerman's additions to the hdama code for dual core
   and 33Mhz fix.
 
 
 r1111@gog:  jschildt | 2005-08-09 11:07:11 -0600
 Stable Release tag for HDAMA-1.1.8.10 and HDAMA-1.1.8.10LANL
 r1112@gog:  jschildt | 2005-08-09 15:09:32 -0600
 - temporarily removing hdama tag to update to public repository.  Will
   reset tag after update.
 
 


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2004 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-08-09 21:53:07 +00:00
Li-Ta Lo 9528b8883e GCC4 fix
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1989 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-08-04 14:59:33 +00:00
Yinghai Lu 13f1c2af8b eric patch
1. x86_setup_mtrr take address bit.
        2. generic ht, pcix, pcie beidge...
        3. scan bus and reset_bus
        4. ht read ctrl to decide if the ht chain
           is ready
        5. Intel e7520 and e7525 support
        6. new ich5r support
        7. intel sb 6300 support.

yhlu patch
	1. split x86_setup_mtrrs to fixed and var
	2. if (resource->flags & IORESOURCE_FIXED ) return; in device.c pick_largest_resource
	3. in_conherent.c K8_SCAN_PCI_BUS


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1982 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-08 02:49:49 +00:00
Eric Biederman cb364958a0 - Don't force spew level debug messages on the kherpi
- optimize_link_read_pointers compiles now on the solo so don't disable it.
- Start sorting out the confusion between and object and an initobject on the ppc ports
- Major bugfix release of romcc to support to remove preprocessor deficiencies.
  The line and column numbers are computed are now correct.  But watch out
  the error messages sometimes report the location of the next token so things
  are still a little skewed.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1784 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-15 10:46:44 +00:00
Eric Biederman 132368b4c5 - Clean up the CPP output a little bit
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1771 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-09 08:59:23 +00:00
Eric Biederman a649a411d7 - Fix silly thinkos in that caused parsing problems in romcc.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1770 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-09 00:35:39 +00:00
Eric Biederman 7dd185c885 - Fix minor glitch in romcc where it would not return from a header file
if it had a preprocessor directive on the last line.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1769 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-09 00:05:42 +00:00
Eric Biederman 41203d9b77 - Romcc preprocessor bug fixes, (The code size went down about 350 lines.. :)
- Preprocessor constant expression evaluation is no long a special case so
  unsigned long values can not be used.
- Undefined macros are not converted to 0.  But a big warning is printed.
- Garbage at the of an #include directive is now done in tokens instead of
  in characters.
  This allows comments after an #include directive.
- Repaired a previously unnoticed regression in constant expression
  evaluation.  Logical expressions can now be evaluated again.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1767 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-08 09:31:09 +00:00
Eric Biederman f8a2dddb57 - To reduce confuse rename the parts of linuxbios bios that run from
ram linuxbios_ram instead of linuxbios_c and linuxbios_payload...
- Reordered the linker sections so the LinuxBIOS fallback image can take more the 64KiB on x86
- ROM_IMAGE_SIZE now will work when it is specified as larger than 64KiB.
- Tweaked the reset16.inc and reset16.lds to move the sanity check to see if everything will work.
- Start using romcc's built in preprocessor (This will simplify header compiler checks)
- Add helper functions for examining all of the resources
- Remove debug strings from chip.h
- Add llshell to src/arch/i386/llshell (Sometime later I can try it...)
- Add the ability to catch exceptions on x86
- Add gdb_stub support to x86
- Removed old cpu options
- Added an option so we can detect movnti support
- Remove some duplicate definitions from pci_ids.h
- Remove the 64bit resource code in amdk8/northbridge.c in preparation for making it generic
- Minor romcc bug fixes


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1727 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-30 08:05:41 +00:00
Eric Biederman 7dea9552d5 - Small bug fixes to romcc. The deep problems with not inlining functions remain
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1615 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-06-29 05:38:37 +00:00
Eric Biederman 5a78bd03a6 - Don't confuse return statements with conditional branches
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1587 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-05-29 21:26:03 +00:00
Eric Biederman 9008960339 - Upgrade to romcc version 0.63
This includes more test cases
  Lots of small bug fixes
  A built in C preprocessor
  Initial support for not inlining everything
  __attribute__((noinline)) works
  Better command line options and help
  Constants arrays can be read at compile time
  Asm statements that are not volatile will now be removed when their outputs go unused
  Loads and stores that are not volatile will be removed when their values go unused
  The number of FIXMES in the code is finally starting to go down.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1582 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-05-28 14:11:54 +00:00
Eric Biederman 5cd81730ec - Moved hlt() to it's own header.
- Reworked pnp superio device support.  Now complete superio support is less than 100 lines.
- Added support for hard coding resource assignments in Config.lb
- Minor bug fixes to romcc
- Initial support for catching the x86 processor BIST error codes.  I've only seen
  this trigger once in production during a very suspcious reset but...
- added raminit_test to test the code paths in raminit.c for the Opteron
- Removed the IORESOURCE_SET bit and added IORESOURCE_ASSIGNED and IORESOURCE_STORED
  so we can tell what we have really done.
- Added generic AGP/IOMMU setting code to x86
- Added an implementation of memmove and removed reserved identifiers from memcpy
- Added minimal support for booting on pre b3 stepping K8 cores
- Moved the checksum on amd8111 boards because our default location was on top of
  extended RTC registers
- On the Hdama added support for enabling i2c hub so we can get at the temperature
  sensors.  Not that i2c bus was implemented well enough to make that useful.
- Redid the Opteron port so we should only need one reset and most of memory initialization
  is done in cpu_fixup.  This is much, much faster.
- Attempted to make the VGA IO region assigment work.  The code seems to work now...
- Redid the error handling in amdk8/raminit.c to distinguish between a bad value
  and a smbus error, and moved memory clearing out to cpufixup.
- Removed CONFIG_KEYBOARD as it was useless.  See pc87360/superio.c for how to
  setup a legacy keyboard properly.
- Reworked the register values for standard hardware, moving the defintions from
  chip.h into the headers of the initialization routines.  This is much saner
  and is actually implemented.
- Made the hdama port an under clockers BIOS.  I debuged so many interesting problems.
- On amd8111_lpc added setup of architectural/legacy hardware
- Enabled PCI error reporting as much as possible.
- Enhanded build_opt_tbl to generate a header of the cmos option locations so
  that romcc compiled code can query the cmos options.
- In romcc gracefully handle function names that degenerate into function pointers
- Bumped the version to 1.1.6 as we are getting closer to 2.0

  TODO finish optimizing the HT links of non dual boards
  TODO make all Opteron board work again
  TODO convert all superio devices to use the new helpers
  TODO convert the via/epia to freebios2 conventions
  TODO cpu fixup/setup by cpu type


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1390 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-03-11 15:01:31 +00:00
Eric Biederman a4aef6d3bb - Lower DEBUG_CONSISTENCY to 1 2 is only really useful when debugging
the register allocator.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1306 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-12-05 06:16:19 +00:00
Eric Biederman 5ade04a436 - Update romcc to version 0.37
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1225 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-22 04:03:46 +00:00
Eric Biederman 83b991afff - O2, enums, and switch statements work in romcc
- Support for compiling romcc on non x86 platforms
  - new romc options -msse and -mmmx for specifying extra registers to use
  - Bug fixes to device the device disable/enable framework and an amd8111 implementation
  - Move the link specification to the chip specification instead of the path
  - Allow specifying devices with internal bridges.
  - Initial via epia support
 - Opteron errata fixes


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1200 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-11 06:20:25 +00:00
Stefan Reinauer 59549598c0 fix romcc compiling 32bit code on amd64
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1118 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-17 12:18:40 +00:00
Eric Biederman 2c018fba95 - First pass at s2880 support.
- SMP cleanups (remove SMP only use CONFIG_SMP)
- Minor tweaks to romcc to keep it from taking forever compiling
- failover fixes
- Get a good implementation of k8_cpufixup and sizeram for the opteron


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@998 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-21 20:13:45 +00:00
Eric Biederman 34cadde255 - Commit more tests for romcc
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@951 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-12 01:40:54 +00:00
Eric Biederman e058a1e418 - Structure handling fixes.
- Fix for asm statements with multiple results.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@942 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-12 01:21:31 +00:00
Eric Biederman 66fe2227df - Moved 2 of the test cases into tests for failure
- Reworked the transformation into ssa form and now I catch all unitialized
  variable uses.
- Several more test cases
- Bumped the version to 0.34
- Verified that -O2 the scc_transform now works.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@934 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-04 15:14:04 +00:00
Eric Biederman 830c9886ea - Minor fixes for handling structure constants and array values that are not sdecls
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@933 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-04 00:27:33 +00:00
Eric Biederman 678d816f26 - Allow for a larger rhs on phi variables
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@932 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-03 03:59:38 +00:00
Eric Biederman 530b5193e4 - Massive set of cleanups/fixes for romcc. Lots of corner cases now work
properly.  And a few long standing bugs have been rooted out and removed.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@931 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-01 10:05:30 +00:00
Eric Biederman d1ea53995c - Update romcc so that it more successfully spills registers to the xmm registers
- Add several more test cases.
- Bump the version number to .32


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@919 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-28 06:49:45 +00:00
Eric Biederman 584997b528 - Set the default compiler back to gcc ooops
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@915 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-25 11:34:59 +00:00
Eric Biederman 3a51f3bc5e - Error on function prototypes
- Fix a last couple of structure related bugs


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@914 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-25 10:38:10 +00:00
Eric Biederman 03b59864df - A few more fixes to get pointers to structures working correctly.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@901 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-24 14:27:37 +00:00
Eric Biederman 0044307756 - Fix handling of structures stored in memory
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@899 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-24 12:34:45 +00:00
Eric Biederman 153ea3548f - Implement goto support
- Register allocator bug fixes.
  * coalesce_live_ranges now also updates the interference graph of live instructions
  * resolve_tangle now avoids copies to phi
  * correct_tangles is now called in a loop so that all tangles get fixed
- Bug the version of romcc to 0.30


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@886 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-20 14:43:20 +00:00
Eric Biederman f7a0ba84dc - Update the romcc version.
- Add an additional consistency check to romcc and fix the more obvious problems it has uncovered
  With this update there are no known silent failures in romcc.
- Update the memory initialization code to setup all 3 of the memory sizing registers properly
- In auto.c test our dynamic maximum amount of ram.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@885 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-19 15:14:52 +00:00
Eric Biederman d3283ec05f - A new test case for romcc
- Minor romcc fixes
- In smbus_wail_until_done a romcc glitch with || in romcc where it likes
  to run out of registers.  Use | to be explicit that I don't need the short
  circuiting behavior.
- Remove unused #defines from coherent_ht.c
- Update the test in auto.c to 512M
- Add definition of log2 to romcc_io.h
- Implement SPD memory sizing in raminit.c
- Reduce the number of memory devices back 2 to for the SOLO board.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@883 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-18 11:03:18 +00:00
Eric Biederman 8d9c123812 - Minor mod to reset16.inc to work with newer binutils hopefully this works with older ones...
- Update apic.h to include the APIC_TASK_PRI register definition
- Update mptable.c to have a reasonable board OEM and productid
- Additional testfiles for romcc.
- Split out auto.c and early failover.c moving their generic bits elsewere
- Enable cache of the rom
- Fixes to amd8111_lpc.c so that we successfully setup virtual wire mode on the ioapic


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@880 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-17 08:42:17 +00:00
Eric Biederman f96a810f11 - Reduce the algorithmic complexity of parts of the register allocator
so the worst case runtime of romcc is much more predictable


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@879 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-16 16:57:34 +00:00
Eric Biederman 05f26fcb57 - Factoring of auto.c
- Implementation of fallback/normal support for the amd solo board
- Minor bugfix in romcc


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@867 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-11 21:55:00 +00:00
Eric Biederman 6aa31cc754 - Update romcc to version 0.27 and add more tests.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@865 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-10 21:22:07 +00:00
Eric Biederman 302763831d - Fix ? expressions previously they were reversed.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@830 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-05-16 20:47:48 +00:00
Eric Biederman da55d3e258 - Intermediate fix to allow register allocator failure
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@829 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-05-13 21:02:26 +00:00
Eric Biederman a96d6a9dab - Add a test to make certain romcc is properly allocating registers.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@828 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-05-13 20:45:19 +00:00
Eric Biederman 0babc1c116 - Implement support for structures, typedefs, and __builtin_rdmsr, __builtin_wrmsr in romcc
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@819 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-05-09 02:39:00 +00:00
Eric Biederman ba8c25affb - Update the test cases for romcc
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@817 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-05-08 00:31:34 +00:00
Eric Biederman ab2ea6b474 - misc minor fixes
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@802 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-04-26 03:20:53 +00:00
Eric Biederman b138ac83b5 - Checking latest version of romcc
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@783 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-04-22 18:44:01 +00:00