This patch introduces building and linking of 3rdparty/vboot with
libpayload. VBoot can be enabled by setting CONFIG_LP_VBOOT_LIB.
Moreover it can be configured to use either TPM or TPM 2.0 mode,
and whether to use SHA256 processor extension instructions on x86.
Change-Id: I2d9d766a461edaa0081041c020ecf580fd2ca64e
Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60080
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Writing a coreboot image without a payload to a board's flash chip will
result in a non-bootable system, so warn the user if this is the case.
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
Change-Id: I15ae9548a45e9f566c84db41e8e171c6bc179057
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60025
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This patch introduces new FlashMap API, the fmap_locate_area().
It works on cached FlashMap provided in lib_sysinfo.fmap_cache.
Change-Id: Idbf9016ce73aa58e17f3ee19920ab83dc6c25abb
Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59494
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
coreinfo and nvramcui are using libpayload/bin/lpgcc and libpayload
build directory as a base, instead of installing it first. This caused
include errors, because commonlib/bsd is not present there. This patch
introduces comonlib/bsd include path to lpgcc CFLAGS if it is being
built using libpayload build directory as a base.
Change-Id: I7d1fe9e5dc3e7c1c1ba825a1bf19972722b42778
Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60171
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
When compiling libpayload using x86_64 toolchain for ARCH_MOCK compiler
reports an error about gerring address of packed member. Until now it
had to be disabled by passing -Wno-address-of-packed-member to
EXTRA_CFLAGS. This patch disables this warning.
Change-Id: I9a948fabe66f7297632ecaca8ec1bfa5c842b750
Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60169
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
1. Fix the inconsistence of the target path of U-Boot payload
between Kconfig and Makefile.inc.
2. Perform full clone (to the destined commit) in order to get
tags.
3. Move stable commit id of U-Boot payload from Makefile to
Kconfig, and make prompt consistent with it.
Change-Id: Ic0f11c16274456a452a0422e19fab0c61d8b5d5b
Signed-off-by: Bill XIE <persmule@hardenedlinux.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60028
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Implement __fls() as an alias for log2(), and remove the duplicate
definitions in commonlib/storage/sdhci.c.
Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com>
Change-Id: Ib458abfec7e03b2979569a8440a6e69b0285ac32
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59738
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
This patch adds a new way of implementing flash access for libpayload.
Until now all reads had to be performed using cbfs_media, which is
obsolete. From now on all reads should be performed using
boot_device_read().
This patch also provides a default implementation of boot_device_read()
for x86 architecture.
Change-Id: I1babd2a8414ed9de3ca49903fcb4f036997b5ff3
Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59492
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
SeaBIOS 1.15.0 was released on December 2nd. This updates the stable
version from 1.14.0 to 1.15.0
Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: Ibc526fbddf8a13e7b00e963f9c2e73a9863c9daa
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59957
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
This patch ports some parts of main coreboot Makefile to the libpayload
Makefile in order to improve object files creation.
Moreover, the coreboot source files are now accessible an will be
correctly compiled under libpayload build directory.
Change-Id: If1280c0a3f7e99aad2ecf8a0379a98af31ccefc3
Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59843
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <patrick@coreboot.org>
Copy header files from the main commonlib/bsd to libpayload output
installation directory.
Change-Id: Idc7175240f3077ec98280331f9a952310aae4341
Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59916
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <patrick@coreboot.org>
Unit tests fail on clang 13.0 because Cmocka's main() function is
declared with return type int, but through some of our chain-include
games it sometimes gets coreboot's main_decl.h which declares the
function as void. Compilers have traditionally always been very
laissez-faire about the signature of the main function, but it seems
that clang has been getting more strict by default recently. Explicitly
disable the related warning to shut it up.
Signed-off-by: Julius Werner <jwerner@chromium.org>
Change-Id: I867c9dac659be86e7b7cf4cc41d6fa105aa9ac41
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59815
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jakub Czapiga <jacz@semihalf.com>
Unit tests fail on clang 13.0 with a cryptic
error: _timestamp_size changed binding to STB_WEAK [-Werror,-Wsource-mgr]
Probably something related to the weird things we do to mock memlayout
areas. Too lazy to track it down. Let's just disable this
(clang-specific, not properly documented) warning flag.
Signed-off-by: Julius Werner <jwerner@chromium.org>
Change-Id: Ie49c9eef3c74592c068c899c6717621dbcb9f609
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59814
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jakub Czapiga <jacz@semihalf.com>
Remove unnecessary escape bachslashes from:
addr="$(echo \"$$$$sym_line\" ...
The 'echo' will print output line with double quote characters, which
then will be included in the values passed to --add-symbol. This can
cause errors.
Change-Id: I6023515191d6c236bf57870159a35d518f25e9d8
Reported-by: Yu-Ping Wu <yupingso@chromium.org>
Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59858
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
coreboot stores much information in the CBMEM IMD. Until now it was
ignored. This patch makes use of these coreboot tables entries.
It also removes get_cbmem_addr() function as it is no longer needed.
Moreover, the coreboot tables entry CB_TAG_MRC_CACHE does not exist
anymore, as it is not created by the code. It was replaced by
CBMEM_ID_MRCDATA entry, so MRCDATA should now be accessible through
sysinfo structure field.
Change-Id: I5bd02a98ba2631f34014bc0f8e7ebd5a5ddd2321
Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59491
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Make BSD part of the coreboot commonlib accessible to libpayload.
Change-Id: I09f475d399ab785f3d3ffdb4b42950d2b397845e
Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59697
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <patrick@coreboot.org>
Move to building the latest U-Boot.
Signed-off-by: Simon Glass <sjg@chromium.org>
Change-Id: I33fcfc3135e55d16b0dcd8135217bd5adcef2099
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59606
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
U-Boot normally runs with a display if available. Enable this option so
that the display shows if U-Boot supports it.
Use 'select' rather than 'imply' since the CI complains.
Signed-off-by: Simon Glass <sjg@chromium.org>
Change-Id: Ie5684c6ead30076689f43034675ff9f3531970fe
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59605
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
At present U-Boot crashes on entry as the start address is wrong. Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Change-Id: I65e32fbb4ffea04b99abe4dc5afccfacd06c986e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59603
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
We don't need all the git history. Speed up the build by doing a shallow
clone.
Signed-off-by: Simon Glass <sjg@chromium.org>
Change-Id: If31c9dd158aa23f242e4fd145449ef7502fb1ab1
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59602
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
The u-boot.bin file should be used, rather than u-boot-dtb.bin
While they are often the same, the -dtb version is really just for
legacy use now.
Signed-off-by: Simon Glass <sjg@chromium.org>
Change-Id: I5558ed94c7dd6cc57ceb835fe367bfa050ad2150
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59601
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
This doesn't work at present, merely printing an error when U-Boot is
selected as a payload. This is because it adds a file into the U-Boot
tree which makes U-Boot's build system think that the tree is unclean.
Update the rules to put the tag file outside the source tree. Use an
out-of-tree build for U-Boot to avoid changing the source tree.
Signed-off-by: Simon Glass <sjg@chromium.org>
Change-Id: I24d6545b54f97afeefaca3ffed79eec2e7afacb4
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59600
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
There were escape backslashes around regular expression passed to grep.
Because of that, grep was returning empty results as a consequence of
pattern mismatch, and thus symbols pointing to original functions were
not created correctly.
Change-Id: I751109735b6c56824df9a560ae989bf062a0e9a6
Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59496
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Some unit tests might require catching assert failures. This patch adds
an assert() variant depending on __TEST__ define passed to unit tests.
Change-Id: I7e4620400f27dbebc57c71bbf2bf9144ca65807f
Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59495
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Some files in tests/include/mocks might have the same name as main
libpayload include files. Remove this path from default includes to
force addition of mocks/ prefix in include paths. This will help
avoiding name clashes and will also make mock headers visible.
Change-Id: I4baa07472f0379d56423cf7152b1ecc9a4824539
Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59493
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Currently, the MMCONF Kconfigs only support the Enhanced Configuration
Access mechanism (ECAM) method for accessing the PCI config address
space. Some platforms have a different way of mapping the PCI config
space to memory. This patch renames the following configs to
make it clear that these configs are ECAM-specific:
- NO_MMCONF_SUPPORT --> NO_ECAM_MMCONF_SUPPORT
- MMCONF_SUPPORT --> ECAM_MMCONF_SUPPORT
- MMCONF_BASE_ADDRESS --> ECAM_MMCONF_BASE_ADDRESS
- MMCONF_BUS_NUMBER --> ECAM_MMCONF_BUS_NUMBER
- MMCONF_LENGTH --> ECAM_MMCONF_LENGTH
Please refer to CB:57861 "Proposed coreboot Changes" for more
details.
BUG=b:181098581
BRANCH=None
TEST=./util/abuild/abuild -p none -t GOOGLE_KOHAKU -x -a -c max
Make sure Jenkins verifies that builds on other boards
Change-Id: I1e196a1ed52d131a71f00cba1d93a23e54aca3e2
Signed-off-by: Shelley Chen <shchen@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57333
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Move th x86 I/O functions declarations from tests mocks to the mock
architecture io.h. This will make x86 I/O-dependent tests simpler,
because the x86_io.h from mocks will not have to be included manually.
Change-Id: Ie7f06c992be306d2523f2079bc90adf114b93946
Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58881
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Some older devices, like the x230 Thinkpad, do not boot with the
newer Tianocore UefiPayloadPkg build target, and cannot easily be
debugged without serial UART output. As a stopgap solution, re-add
the older (now deprecated/removed) CorebootPayloadPkg build target.
This partially reverts commit d3b49b4c,
"payloads/Tianocore: Update default build target, simplify build options"
Change-Id: I81490c277626fc69d95920868d80cb24c0763de4
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58710
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
This commit adds a unit-tests framework ported from coreboot, and test
for drivers/speaker. Usage of the unit-tests framework is same as for
the coreboot one.
Change-Id: Iaa94ee4dcdc3f74af830113813df0e8fb0b31e4f
Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58242
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Mock architecture can be used to build libpayload using host compiler.
It can be enabled by setting ARCH_MOCK=y in the dotconfig. It sets
LITTLE_ENDIAN=y, as most machines these days use little-endian CPUs.
Libpayload will use HOSTCC as CC, HOSTLD as LD, etc. instead of tools
provided by xcompile.
Mock architecture configuration can be used by payloads for testing
purposes. Thanks to it, tests can be architecture-independent,
and can be executed without requiring compatible Kconfig options,
e.g. ARCH_ARM64=y for ARM64 machine. However, one has to provide
implementation for most architecture-specific functions present
in arch/* directories.
Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Change-Id: Ie3a6e6f6cad2f8a2e48a8e546d3b79c577653080
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57708
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Add more detail as to why a smaller-than-screen-size image is to be
preferred, in contrast to other payloads' bootsplash images.
Signed-off-by: Felix Friedlander <felix@ffetc.net>
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Change-Id: Ib4c6666bb0e49369fe8fe2ae3dc12c023f668da0
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49233
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Instead of setting each pixel in the framebuffer, use memcpy() to clear
screen faster. As this method should be fast enough, remove the fast
path using memset().
The speed of clear_screen() on brya (x_resolution = 1920,
bytes_per_line = 7680):
- Using memset(): 15ms
- Setting each pixel: 25ms
- Using memcpy(): 14ms
Also remove set_pixel_raw() since it's now used in only one place.
BUG=none
TEST=emerge-brya libpayload
TEST=Saw developer screen on brya
BRANCH=none
Change-Id: I5f08fb50faab48d3db6b61ae022af3226914f72b
Signed-off-by: Yu-Ping Wu <yupingso@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58128
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Move the locally declared typec_orientation enum from chip.h to
coreboot_tables.h.
Change enum typec_orientation name to type_c_orientation for consistency
with contents of coreboot_tables.h.
Rename TYPEC_ORIENTATION_FOLLOW_CC to TYPEC_ORIENTATION_NONE.
BUG=b:149830546
TEST="emerge-volteer coreboot" and make sure it compiles successfully.
Change-Id: I24c9177be72b0c9831791aa7d1f7b1236309c9cd
Signed-off-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58084
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This change adds type-c port information for USB Type-C ports to the
coreboot table. This allows depthcharge to know the usb2 and usb3
port number assignments for each available port, as well as the SBU
and data line orientation for the board.
BUG=b:149830546
TEST='emerge-volteer coreboot chromeos-bootimage' and verify it builds
successfully. Cherry-pick CL to enable this feature for volteer,
flash and boot volteer2 to kernel, log in and check cbmem for type-c
info exported to the payload:
localhost ~ # cbmem -c | grep type-c
added type-c port0 info to cbmem: usb2:9 usb3:1 sbu:0 data:0
added type-c port1 info to cbmem: usb2:4 usb3:2 sbu:1 data:0
Signed-off-by: Nick Vaccaro <nvaccaro@google.com>
Change-Id: Ice732be2fa634dbf31ec620552b383c4a5b41451
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57069
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
The input buffer to the buffer_to_fifo family of functions is only read,
so it can be a const pointer. (Also, remove the MIPS check in libpayload
for these functions... the MIPS architecture has been removed a while
ago.)
Signed-off-by: Julius Werner <jwerner@chromium.org>
Change-Id: I021069680cf691590fdacc3d51f747f12ae3df31
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57731
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Add Kconfig option TIANOCORE_ABOVE_4G_DECODE to pass build option to
edk2 to enable or disable "Above 4G Decode". Disabling allows certain Linux
distributions to boot such as Qubes, Zorin and Proxmox.
Requires commit `2f6d4cbcc7fa49462e607baed7626524ccd59ad3` that is
present in the `uefipayload_202107` branch of MrChromebox's edk2
repository.
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: Ia3b1d15196c0ec611431af29031682fea626d19d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56223
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Before this patch EXTRA_CFLAGS were placed before many other options.
This made overriding impossible even, when necessary. This patch moves
EXTRA_CFLAGS to be placed after original CFLAGS, thus making option
overriding possible.
Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Change-Id: If8394b151696eee4bd736d2fb1ad340209e05fbb
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57181
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Currently clear_screen() calls set_pixel() to set all pixels. However,
the actual order of pixels being set depends on the framebuffer
orientation. With NORMAL orientation, the framebuffer is accessed
sequentially; with LEFT_UP/RIGHT_UP orientation, it is accessed back and
forth, leading to performance drop (>1 second on bugzzy).
Therefore, ensure sequential access to the framebuffer, regardless of
the orientation.
BUG=b:194967458
TEST=emerge-cherry libpayload
BRANCH=dedede
Change-Id: Iecaff5b6abc24ba4b3859cbc44c0d61b2a90b2d9
Signed-off-by: Yu-Ping Wu <yupingso@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57104
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
The timer structure (in particular, the offset to memory addresses)
on recent MTK SoCs for example MT8195 has been changed.
BUG=b:195274787
Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Change-Id: Ifd6ff65a825c4309c47f3b115b80a8ecd42fedac
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56845
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.corp-partner.google.com>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Update tianocore branch used with default UEFIPAYLOAD option to
mrchromebox/uefipayload_202107 (July 2021) branch. This branch is
rebased on edk2 upstream commit 12e34cd2f7900578ee83cb01b8f1696a7bb7511b
[OvmfPkg/Bhyve: clean up TPM_ENABLE remnants] vs tag edk2-stable202105.
The main changes are fixes for e820 table parsing and support to disable
"Above 4G decode", which is required to boot distros with bootloaders
that expect to be loaded into RAM below 4G. This fixes booting with
Qubes, ZorinOS, Proxmox, among others.
Additionally, several commits on top of upstream have been consolidated,
reworked, and/or reordered for readability and maintainability.
Change-Id: I6f04fd027a0599ca6892a1376938108a2e402ac2
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56569
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
FILO allows to configure a line to autoboot. Hook this up into
coreboot’s build system.
TEST=Configure coreboot for QEMU i440fx with FILO as payload and
configure:
CONFIG_FILO_MASTER=y
CONFIG_FILO_USE_AUTOBOOT=y
CONFIG_FILO_AUTOBOOT_FILE="hda1:/vmlinuz root=/dev/sda1 console=tty0 console=ttyS0,115200 initrd=hda1:/initrd.img"
CONFIG_FILO_AUTOBOOT_DELAY=5
Boot Debian image with:
qemu-system-x86_64 -bios /dev/shm/coreboot/build/coreboot.rom -L /dev/shm -enable-kvm -smp cpus=2 -m 1G -hda /dev/shm/debian-32.img -serial stdio -net nic -net user,hostfwd=tcp::22222-:22
Change-Id: Id167e9a144bf466da87469108002672b299b702a
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56213
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Building nvramcui with i386-elf-gcc (coreboot toolchain
v2021-04-06_7014f8258e) 8.3.0 and Link Time Optimization (LTO) enabled
in libpayload (`CONFIG_LP_LTO=y`) fails with the error below.
LPGCC nvramcui.bin
curses/PDCurses/pdcurses/refresh.c: In function 'wrefresh':
curses/pdcurses-backend/pdcdisp.c:217:4: error: 'bg' may be used uninitialized in this function [-Werror=maybe-uninitialized]
curses/pdcurses-backend/pdcdisp.c:214:18: note: 'bg' was declared here
curses/pdcurses-backend/pdcdisp.c:217:4: error: 'fg' may be used uninitialized in this function [-Werror=maybe-uninitialized]
curses/pdcurses-backend/pdcdisp.c:214:14: note: 'fg' was declared here
lto1: all warnings being treated as errors
lto-wrapper: fatal error: i386-elf-gcc returned 1 exit status
compilation terminated.
/opt/xgcc/lib/gcc/i386-elf/8.3.0/../../../../i386-elf/bin/ld.bfd: error: lto-wrapper failed
collect2: error: ld returned 1 exit status
`pair_content()` returns in case `PAIR_NUMBER(attr)` is invalid, so
guard the usage of `serial_set_color()`.
if (pair < 0 || pair >= COLOR_PAIRS || !fg || !bg)
return ERR;
Note, building with x86_64-linux-gnu-gcc-10 (Debian 10.2.1-6) 10.2.1
20210110 does *not* fail.
Change-Id: Ic63e34f2b5bc9f826db37597bebc6b20542481d7
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51914
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This was originally several commits that had to be squashed into one
because the intermediate states weren't able to build coreboot:
- one to remove everything that wasn't our own code, leaving only
regex.[ch], toada.c, description.md and Makefile.inc.
- one to copy in Linux 5.13's scripts/kconfig and adapt Makefile.inc
to make the original Makefile work again.
- adapt abuild to use olddefconfig, simplifying matters.
- apply patches in util/kconfig/patches.
- Some more adaptations to the libpayload build system.
The patches are now in util/kconfig/patches/, reverse applying them
should lead to a util/kconfig/ tree that contains exactly the Linux
version + our own 5 files.
Change-Id: Ia0e8fe4e9022b278f34ab113a433ef4d45e5c355
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37152
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
CB:51638 separated Chrome OS NVS from global NVS by allocating it
separately in CBMEM. CNVS is used in depthcharge to fill firmware
information at boot time. Thus, location of CNVS needs to be shared in
coreboot tables for depthcharge to use.
This change adds a new coreboot table tag
`CB_TAG_ACPI_CNVS`/`CB_TAG_ACPI_CNVS`(0x41) which provides the
location of CNVS in CBMEM to payload (depthcharge).
Additionally, CB:51639 refactored device nvs(DNVS) and moved it to the
end of GNVS instead of the fixed offset 0x1000. DNVS is used on older
Intel platforms like baytrail, braswell and broadwell and depthcharge
fills this at boot time as well. Since DNVS is no longer used on any
new platforms, this information is not passed in coreboot
tables. Instead depthcharge is being updated to use statically defined
offsets for DNVS.
BUG=b:191324611, b:191324611
TEST=Verified that `crossystem fwid` which reads fwid information from
CNVS is reported correctly on brya.
Signed-off-by: Furquan Shaikh <furquan@google.com>
Change-Id: I3815d5ecb5f0b534ead61836c2d275083e397ff0
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55665
Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
Reviewed-by: Ivy Jian <ivy_jian@compal.corp-partner.google.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Jakub Czapiga