Commit graph

3 commits

Author SHA1 Message Date
Elyes HAOUAS
cd5f2b500d mb/intel: Get rid of whitespace before tab
Change-Id: I891b056b64fde27ef0e351f8cf24a258fb5cabfa
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/26626
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-06-04 09:03:18 +00:00
Martin Roth
d49bbff8ff Rangeley: Change A, A, A, A INT routing to A, A, A, B
Devices that have their interrupt routing set to A, A, A, A don't get
any interrupt values assigned because that series evaluates to 0.  The
code that sets the interrupt values checks to make sure a value is set
by verifying that it's not 0.  On Bay Trail, these are all
single-function graphics devices, so by changing one of the unused
interrupt lines from A to any other value, it assigns the values
correctly.

This issue did not affect ACPI interrupt routing.

This is just a workaround, and the root issue still needs to be fixed.

Change-Id: I4e6fe56084cbe86b309da15d61b296f1936458ec
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/12630
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-12-06 18:43:11 +01:00
Marcin Wojciechowski
9586dc72db mainboard/intel: Add Little Plains
This adds a new mainboard: Little Plains for Intel's atom c2000
It was based on Mohon Peak board with some minor changes
This board is not available as standalone product
It is a managment board for
Intel Ethernet Multi-host Controller FM10000 Series
The FSP package is available from Intel: https://www.intel.com/fsp

Change-Id: I28127a858106ed35d26e235f0c6393c20ed14350
Signed-off-by: Marcin Wojciechowski <marcin.wojciechowski@intel.com>
Reviewed-on: https://review.coreboot.org/12503
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2015-11-30 18:00:50 +01:00