GNUBoot/coreboot-kgpe-d16
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17 commits

Author SHA1 Message Date
Scott Duplichan
3c639e7df8 Fix memory allocation problem in amdInitLate. Disabled until further debug. 
Signed-off-by: Scott Duplichan <scott@notabs.org>
Acked-by: Marc Jones <marcj303@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6590 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2011-05-15 22:05:00 +00:00
Scott Duplichan
0b886ae3c3 Remove some non-essential agesa options to reduce boot time. 
Signed-off-by: Scott Duplichan <scott@notabs.org>
Acked-by: Marc Jones <marcj303@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6589 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2011-05-15 22:03:45 +00:00
Scott Duplichan
dbbbca3f33 Declare legacy video frame buffer so that Windows generic VGA driver will work. 
Signed-off-by: Scott Duplichan <scott@notabs.org>
Acked-by: Marc Jones <marcj303@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6588 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2011-05-15 22:02:27 +00:00
Scott Duplichan
0ebefd27c8 Declare RTC as not PIIX4 compatible to match AMD hardware. 
Signed-off-by: Scott Duplichan <scott@notabs.org>
Acked-by: Marc Jones <marcj303@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6587 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2011-05-15 22:00:23 +00:00
Scott Duplichan
254a6d6ea7 Make fadt revision match its length. Solves Windows 7 checked build assert. 
Signed-off-by: Scott Duplichan <scott@notabs.org>
Acked-by: Marc Jones <marcj303@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6586 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2011-05-15 21:59:19 +00:00
Scott Duplichan
b7e068305c Enable SPI cacheline prefetch early to reduce boot time. 
Signed-off-by: Scott Duplichan <scott@notabs.org>
Acked-by: Marc Jones <marcj303@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6585 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2011-05-15 21:56:03 +00:00
Scott Duplichan
2cc5f550c7 Enable SPI cacheline prefetch early to reduce boot time. 
Signed-off-by: Scott Duplichan <scott@notabs.org>
Acked-by: Marc Jones <marcj303@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6584 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2011-05-15 21:54:04 +00:00
Scott Duplichan
d9a634c756 Switch processor cores to pstate 0 early to reduce boot time. 
Signed-off-by: Scott Duplichan <scott@notabs.org>
Acked-by: Marc Jones <marcj303@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6583 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2011-05-15 21:51:31 +00:00
Scott Duplichan
e73fc20886 Enable 33 MHz fast mode SPI read early to reduce boot time. 
Signed-off-by: Scott Duplichan <scott@notabs.org>
Acked-by: Marc Jones <marcj303@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6582 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2011-05-15 21:48:22 +00:00
Scott Duplichan
dc312cca53 Move mmconf base from e0000000 to f8000000 to avoid conflict with UMA BAR. 
Signed-off-by: Scott Duplichan <scott@notabs.org>
Acked-by: Marc Jones <marcj303@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6578 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2011-05-15 21:26:04 +00:00
Scott Duplichan
444c49c68c Match DIMM SPD addressing to implemented slots. 
Signed-off-by: Scott Duplichan <scott@notabs.org>
Acked-by: Marc Jones <marcj303@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6575 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2011-05-15 21:13:00 +00:00
Scott Duplichan
6719c23a47 Size mmconf according to CONFIG_MMCONF_BUS_NUMBER. 
Signed-off-by: Scott Duplichan <scott@notabs.org>
Acked-by: Marc Jones <marcj303@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6574 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2011-05-15 21:11:41 +00:00
Scott Duplichan
b0b4063d6a 1) Use D18F1xF4 VGA Enable to simplify legacy video I/O support. 
2) Extend PCI MMIO limit from dfffffff to fecfffff.
3) Add AMD recommended non-posted mapping for SB800 legacy devices.

Signed-off-by: Scott Duplichan <scott@notabs.org>
Acked-by: Marc Jones <marcj303@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6573 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2011-05-15 21:10:20 +00:00
Scott Duplichan
6f7375c24c 1) Set I/O APIC ID according to BKDG recommendation 
2) Correct I/O APIC ID reported by mptable

Signed-off-by: Scott Duplichan <scott@notabs.org>
Acked-by: Marc Jones <marcj303@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6572 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2011-05-15 21:07:43 +00:00
Stefan Reinauer
42fa7fe28b run uart_init() from console_init, just like the other console initialization functions. 
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6531 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2011-04-20 20:54:07 +00:00
Sven Schnelle
91321028ec Use subsystem id from devicetree.cb instead of Kconfig and move 
all boards to the new config scheme.

Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Peter Stuge <peter@stuge.se>

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6421 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2011-03-01 19:58:47 +00:00
Frank Vibrans
69da1b676c Add IBASE DB-FT1 and AMD Inagua motherboards. Patch 8 of 8. 
This code provides support for IBASE Technology DB-FT1 (AMD code name Persimmon) and AMD Inagua platforms. It is dependent on all other patches in this set.

Signed-off-by: Frank Vibrans <frank.vibrans@amd.com>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Acked-by: Marc Jones <marcj303@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6352 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2011-02-14 19:04:45 +00:00