Commit graph

131 commits

Author SHA1 Message Date
Elyes HAOUAS
37509d7b0c mb/*/*/dsdt.asl: Drop useless comments in DefinitionBlock()
Change-Id: I1e0489ec6730760f74102cdd00e4aaa66975d69a
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45801
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
2020-10-13 18:27:23 +00:00
Elyes HAOUAS
90d00dea55 {src/mb,util/autoport}: Use macro for DSDT revision
Change-Id: I5a5f4e7067948c5cc7a715a08f7a5a3e9b391191
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45904
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
2020-10-13 18:27:04 +00:00
Martin Roth
f48acbda7b src: Change BOOL CONFIG_ to CONFIG() in comments & strings
The Kconfig lint tool checks for cases of the code using BOOL type
Kconfig options directly instead of with CONFIG() and will print out
warnings about it.  It gets confused by these references in comments
and strings.  To fix it so that it can find the real issues, just
update these as we would with real issues.

Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: I5c37f0ee103721c97483d07a368c0b813e3f25c0
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43824
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-07-26 21:20:30 +00:00
Elyes HAOUAS
f50b6625d9 src: Remove extra lines in license header
Change-Id: I7378aa7d6156ece3ab3959707a69f45886f86d21
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43593
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-07-26 20:57:18 +00:00
Elyes HAOUAS
5a8e072020 src: Remove unused 'include <string.h>'
Found using:
diff <(git grep -l '#include <string.h>' -- src/) <(git grep -l 'STRINGIFY\|memcpy\|memmove\|memset\|memcmp\|memchr\|strdup\|strconcat\|strnlen\|strlen\|strchr\|strncpy\|strcpy\|strcmp\|strncmp\|strspn\|strcspn\|strtok_r\|strtok\|atol\|strrchr\|skip_atoi\|snprintf' -- src/) |grep -v vendorcode |grep '<'

Change-Id: I12802d0a6254b2fa39d59f485008bb2012f7b32d
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41913
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-07-14 16:09:44 +00:00
Angel Pons
1d19bcd7fb mb/emulation/qemu-q35: Drop dead code
This code is not even being build-tested. Drop it before it grows moss.

Change-Id: I54f3fe0d3b0c988ab6f9065bea81a385507e9747
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43243
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner
2020-07-09 23:48:31 +00:00
Kyösti Mälkki
0c1dd9c841 ACPI: Drop typedef global_nvs_t
Bring all GNVS related initialisation function to global
scope to force identical signatures. Followup work is
likely to remove some as duplicates.

Change-Id: Id4299c41d79c228f3d35bc7cb9bf427ce1e82ba1
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42489
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-06-30 09:19:10 +00:00
Angel Pons
22a6d11a54 mb/emulation/qemu-q35: Use common early SPI code
Tested, it still boots. It is unknown whether this has any effect on
emulated hardware, which is most likely not emulating SPI transfers.

Change-Id: I44397c46dc0715697ca8680f418888804e4ea7e4
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42669
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2020-06-27 17:31:13 +00:00
Paul Menzel
feecdc2c0b mb/emulation/qemu-i440fx,q35: Fix comment style
The comment fits in 96 characters, so do it, also getting rid of the
unwanted multi-line comment style.

Add a dot/period to the end of the sentence.

Change-Id: I7b5c7ea5da00d649aa06361e0e0cf2431874a6ec
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42615
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-06-22 12:28:03 +00:00
Patrick Georgi
b8fba86b14 Kconfig: Escape variable to accommodate new Kconfig versions
Kconfig 4.17 started using the $(..) syntax for environment variable
expansion while we want to keep expansion to the build system.
Older Kconfig versions (like ours) simply drop the escapes, not
changing the behavior.

While we could let Kconfig expand some of the variables, that only
splits the handling in two places, making debugging harder and
potentially messing with reproducible builds (e.g. when paths end up
in configs), so escape them all.

Change-Id: Ibc4087fdd76089352bd8dd0edb1351ec79ea4faa
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42481
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-by: Wim Vervoorn <wvervoorn@eltan.com>
2020-06-19 15:29:04 +00:00
Kyösti Mälkki
64e07ebde2 sb/intel/i82801ix: Select COMMON_FADT
Change-Id: Iffdce450b1d4c9984ec5efe11eff62bf9184e314
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41922
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-06-10 01:01:32 +00:00
Kyösti Mälkki
0a9e72e87e arch/x86: Declare permanent_smi_handler()
Advertising SMI triggers in FADT is only valid if we exit with
SMI installed. There has been some experiments to delay SMM
installation to OS, yet there are new platforms that allow some
configuration access only to be done inside SMM.

Splitting static HAVE_SMI_HANDLER variable helps to manage cases
where SMM might be both installed and cleared prior to entering
payload.

Change-Id: Iad92c4a180524e15199633693446a087787ad3a2
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41910
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-06-06 09:24:44 +00:00
Kyösti Mälkki
2e270ae297 mb/emulation/qemu-q35: Control SMI related FADT entries
If running on older (like before 2.4.0) version of QEMU there is
no SMI support, so never advertise SMI in FADT for the emulation.
Behaviour if ACPI daemon tries to raise SMI under these conditions
is unknown.

Change-Id: I170058793798648c6713de1530d89ec2ac53e39a
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41907
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-06-06 09:23:45 +00:00
Patrick Georgi
6b5bc77c9b treewide: Remove "this file is part of" lines
Stefan thinks they don't add value.

Command used:
sed -i -e '/file is part of /d' $(git grep "file is part of " |egrep ":( */\*.*\*/\$|#|;#|-- | *\* )" | cut -d: -f1 |grep -v crossgcc |grep -v gcov | grep -v /elf.h |grep -v nvramtool)

The exceptions are for:
 - crossgcc (patch file)
 - gcov (imported from gcc)
 - elf.h (imported from GNU's libc)
 - nvramtool (more complicated header)

The removed lines are:
-       fmt.Fprintln(f, "/* This file is part of the coreboot project. */")
-# This file is part of a set of unofficial pre-commit hooks available
-/* This file is part of coreboot */
-# This file is part of msrtool.
-/* This file is part of msrtool. */
- * This file is part of ncurses, designed to be appended after curses.h.in
-/* This file is part of pgtblgen. */
- * This file is part of the coreboot project.
- /* This file is part of the coreboot project. */
-#  This file is part of the coreboot project.
-# This file is part of the coreboot project.
-## This file is part of the coreboot project.
--- This file is part of the coreboot project.
-/* This file is part of the coreboot project */
-/* This file is part of the coreboot project. */
-;## This file is part of the coreboot project.
-# This file is part of the coreboot project. It originated in the
- * This file is part of the coreinfo project.
-## This file is part of the coreinfo project.
- * This file is part of the depthcharge project.
-/* This file is part of the depthcharge project. */
-/* This file is part of the ectool project. */
- * This file is part of the GNU C Library.
- * This file is part of the libpayload project.
-## This file is part of the libpayload project.
-/* This file is part of the Linux kernel. */
-## This file is part of the superiotool project.
-/* This file is part of the superiotool project */
-/* This file is part of uio_usbdebug */

Change-Id: I82d872b3b337388c93d5f5bf704e9ee9e53ab3a9
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41194
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-05-11 17:11:40 +00:00
Elyes HAOUAS
674ad92923 src/mainboard: Replace GPLv2 long form headers with SPDX header
Change-Id: I64d9468682a4aae3084b17b8724d035f17d01dff
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41187
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2020-05-10 13:12:18 +00:00
Patrick Georgi
afd4c876a9 treewide: move copyrights and authors to AUTHORS
Also split "this is part of" line from copyright notices.

Change-Id: Ibc2446410bcb3104ead458b40a9ce7819c61a8eb
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41067
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
2020-05-06 22:20:43 +00:00
Furquan Shaikh
76cedd2c29 acpi: Move ACPI table support out of arch/x86 (3/5)
This change moves all ACPI table support in coreboot currently living
under arch/x86 into common code to make it architecture
independent. ACPI table generation is not really tied to any
architecture and hence it makes sense to move this to its own
directory.

In order to make it easier to review, this change is being split into
multiple CLs. This is change 3/5 which basically is generated by
running the following command:
$ git grep -iIl "arch/acpi" | xargs sed -i 's/arch\/acpi/acpi\/acpi/g'

BUG=b:155428745

Change-Id: I16b1c45d954d6440fb9db1d3710063a47b582eae
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40938
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
2020-05-02 18:45:16 +00:00
Elyes HAOUAS
a4faec3b01 src/mainboard: Const'ify pci_devfn_t devices
Change-Id: I5bb1a819475383719dbda32d9b5fea63da1e6713
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40611
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-04-23 22:21:11 +00:00
Nico Huber
3e7633a6fe mb/qemu-i440fx,q35: Fix option table
Reserve bytes 50 and 55 as they are handled as century bytes by QEMU.

Change-Id: I9271253bce560d4ec8a51a24c45473acec469187
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40319
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-04-18 21:54:11 +00:00
Nico Huber
e9605bb153 mb/qemu-q35: Select HAVE_CMOS_DEFAULT
Change-Id: If4c4dc9467154a18168550538fc8e655636e87a0
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40318
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-04-18 21:53:24 +00:00
Patrick Rudolph
c02bda0f06 acpi: Bump FADT to revision 6
Some of the revision 4 FADT fields were already updated to ACPI
spec revision 6, but not all of them. In addition the advertised
FADT revision was 3.

Implement all fields as defined in version 6 and bump the advertised
FADT revision to 6.

Also set all used access_size fields and x_gpe0_blk to sane values
as Windows 10 verifies those fields starting with FADT revision 5.

Fixes: https://ticket.coreboot.org/issues/109

Tested on Windows 10.

Change-Id: Ic649040025cd09ed3e490a521439ca4e681afbbf
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39805
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
2020-04-13 23:32:15 +00:00
Elyes HAOUAS
deeccbf4e9 Drop explicit NULL initializations from device_operations
Unmentioned fields are initialized with 0 (or NULL) implicitly. Beside
that, the struct has grown over the years. There are too many optional
fields to list them all.

Change-Id: Icb9e14c58153d7c14817bcde148e86e977666e4b
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40126
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-04-05 13:31:28 +00:00
Angel Pons
585495e887 mainboard/emulation: Use SPDX for GPL-2.0-only files
Done with sed and God Lines. Only done for C-like code for now.

Change-Id: I68d2a8ac6f201f3c1131252b2b53b2b17ece1db6
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40073
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2020-04-04 15:42:47 +00:00
Matt DeVillier
5bbef4bd1b mb/emulation/qemu-q35: drop unused intel_gma_get_controller_info()
No longer needed anywhere.

Change-Id: Ifeea76af44377d917ec46cac0d9d7375d1a68204
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39961
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-04-02 20:32:55 +00:00
Matt DeVillier
c19c704c02 sb/intel/i82801ix: drop IGD-related NVS variables
NDID/DID entries are no longer used by the GMA SSDT generator, so
drop them. SSDT generation will be simplified in a subsequent commit.

Remove direct setting of gnvs->ndid in qemu-q35 board since build
will otherwise break.

Change-Id: Ifbf08f43291c1fff7ccbc85272dc97334207983b
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39954
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-04-02 20:31:41 +00:00
Duncan Laurie
14cf3245fe mb/emulation/qemu-q35: Enable CHROMEOS as an option
Allow Chrome OS to be enabled for this QEMU target.  By default
this does not change anything unless it is selected in the build
configuration, but it makes it possible.

Native VGA init is not forced when Chrome OS is enabled because the
drm-bochs driver does not work with chrome (even the latest upstream
kernel driver with drm atomic support) but it does work with virtio.
The coreboot graphics init needs to match what is selected with qemu
(with -vga std or -vga virtio) which in turn will determine which
kernel driver is used.

A second FMAP is added with both RW-A and RW-B regions which is
required by chromeos.

Recovery mode can be entered by supplying a custom fw_cfg option
when launching qemu: -fw_cfg name=opt/cros/recovery,string=1

Change-Id: I24b4532ea961e68558663292c99d121f0a30ce3b
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39837
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2020-03-31 10:47:26 +00:00
Duncan Laurie
516967c681 mb/emulation/qemu-q35: Enable option for TPM
This enables the mainboard to use a TPM if it is selected in the
configuration.  By default this does nothing, but it allows the
TPM to be enabled and used with the CONFIG_USER_TPM2 Kconfig option.

Using a TPM with QEMU requires either a physical TPM backend or
the swtpm package with a socket:

  -chardev socket,id=swtpm,path=/tmp/swtpm/socket
  -tpmdev emulator,id=tpm0,chardev=swtpm
  -device tpm-tis,tpmdev=tpm0

Change-Id: I0d79a5a0f590c57998ababb660b52d9e3ed2d484
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39836
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2020-03-31 10:42:20 +00:00
Duncan Laurie
9f5c8503d1 mb/emulation/qemu-q35: Increase max size of ACPI tables
When the TPM is enabled in QEMU the fw_cfg interface will return
~200KiB of ACPI tables, so this needs to be increased from the default
in order to be able to boot.

This is seen when using a TPM with qemu as it will hang when
processing the fw_cfg tables.

qemu-system-x86_64 \
  -machine q35 -enable-kvm -vga virtio -serial stdio \
  -drive 'id=hd,file=disk.bin' -bios coreboot.rom \
  -chardev 'socket,id=swtpm,path=/tmp/swtpm/swtpm-sock' \
  -tpmdev 'emulator,id=tpm0,chardev=swtpm' \
  -device 'tpm-tis,tpmdev=tpm0'

Change-Id: I21980aace8e86e636f5ae7b55148f4c31404edba
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39833
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2020-03-31 10:40:01 +00:00
Nico Huber
b0b25c8e9c drivers/intel/gma/acpi: Provide default definition for displays
Use it wherever the standard numbers were copied to. Bit 31 is set
at runtime unconditionally, so we don't need it here.

Change-Id: I0d853c3b8250a2c7b2d1a91985a555e4b17ad76c
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39731
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-03-29 18:10:50 +00:00
Patrick Georgi
3b618bbe31 mainboard/[a-f]*: Remove copyright notices
They're listed in AUTHORS and often incorrect anyway, for example:
- What's a "Copyright $year-present"?
- Which incarnation of Google (Inc, LLC, ...) is the current
  copyright holder?
- People sometimes have their editor auto-add themselves to files even
  though they only deleted stuff
- Or they let the editor automatically update the copyright year,
  because why not?
- Who is the copyright holder "The coreboot project Authors"?
- Or "Generated Code"?

Sidestep all these issues by simply not putting these notices in
individual files, let's list all copyright holders in AUTHORS instead
and use the git history to deal with the rest.

Change-Id: I57fc98788bb47df16d6aedd0f0701e9991801743
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39606
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Wim Vervoorn <wvervoorn@eltan.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-by: Tristan Corrick <tristan@corrick.kiwi>
2020-03-18 09:39:45 +00:00
Ronald G. Minnich
466ca2c1ad Add configurable ramstage support for minimal PCI scanning
This CL has changes that allow us to enable a configurable
ramstage, and one change that allows us to minimize PCI
scanning. Minimal scanning is a frequently requested feature.

To enable it, we add two new variables to src/Kconfig
CONFIGURABLE_RAMSTAGE
is the overall variable controlling other options for minimizing the
ramstage.

MINIMAL_PCI_SCANNING is how we indicate we wish to enable minimal
PCI scanning.

Some devices must be scanned in all cases, such as 0:0.0.

To indicate which devices we must scan, we add a new mandatory
keyword to sconfig

It is used in place of on, off, or hidden, and indicates
a device is enabled and mandatory. Mandatory
devices are always scanned. When MINIMAL_PCI_SCANNING is enabled,
ONLY mandatory devices are scanned.

We further add support in src/device/pci_device.c to manage
both MINIMAL_PCI_SCANNING and mandatory devices.

Finally, to show how this works in practice, we add mandatory
keywords to 3 devices on the qemu-q35.

TEST=
1. This is tested and working on the qemu-q35 target.
2. On CML-Hatch

Before CL:
Total Boot time: ~685ms

After CL:
Total Boot time: ~615ms

Change-Id: I2073d9f8e9297c2b02530821ebb634ea2a5c758e
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36221
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jeremy Soller <jeremy@system76.com>
2020-02-08 18:57:36 +00:00
Peter Lemenkov
2450a7e724 mb/*/*/acpi_tables: Don't zero out gnvs again
The gnvs structure was zeroed out before calling acpi_create_gnvs(...)
in the following files:

* src/southbridge/intel/*/lpc.c

Change-Id: Id7755b1e4b8f5cb8abd1f411b5dc174b6beee21c
Signed-off-by: Peter Lemenkov <lemenkov@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37956
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-12-31 15:21:11 +00:00
Elyes HAOUAS
b9bd69e70e src/mainboard: Remove unused '#include <device/pci.h>'
Change-Id: I5791fddec8b2387df5979adbb1a0fa64c5dd23ea
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37522
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
2019-12-20 17:59:59 +00:00
Arthur Heymans
7a1b60b694 mb/emulation/qemu-q35: Drop unused romcc-related Kconfig
Change-Id: Ib4adbd3f6e850ced1cb93e47ce4f45249dc032c5
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37338
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2019-12-17 18:14:14 +00:00
Patrick Georgi
0bb83469ed Kconfig: comply to Linux 5.3's Kconfig language rules
Kconfig became stricter on what it accepts, so accomodate before
updating to a new release.

Change-Id: I92a9e9bf0d557a7532ba533cd7776c48f2488f91
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37156
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2019-11-23 20:09:56 +00:00
Patrick Rudolph
9764bc126e mb/*: Fix default fmap with VBOOT_SLOTS_RW_A enabled
Don't select the VBOOT fmap as default if VBOOT is disabled.

Fixes a regression introduced by f8251b98
"mb/emulation/qemu: Add VBOOT support" where the default Kconfig settings
wouldn't allow the qemu boards to run.

Also fix the Supermicro x11-lga1151 series boards.

Change-Id: I90414e2cc7e4c4a6ad67014bd4a7f9c8ff4da389
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36707
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-11-12 08:25:45 +00:00
Patrick Rudolph
f8251b9860 mb/emulation/qemu: Add VBOOT support
Add VBOOT support for testing purposes.
Add a 16 MiB FMAP containing RO + RW_A.

Tested on qemu.

Change-Id: I4039d77de44ade68c7bc1f8b4b0aa21387c50f8a
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35400
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2019-11-06 13:56:49 +00:00
Elyes HAOUAS
4d99cdeaf9 src/mainboard: Drop wrong _ADR objects
ACPI Version 6.3 Section 6.1: "A device object must contain either an _HID
object or an _ADR object, but should not contain both."

Change-Id: I50cafce0aaf465ee95562ccff6c8f63fb22096c0
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36294
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2019-10-25 10:07:02 +00:00
Kyösti Mälkki
eb0eeb21be emulation/qemu-x86: Rename memory.c to memmap.c
Change-Id: I311423cb565485236f89bd6043155aaf6296a031
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34974
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-08-26 21:13:28 +00:00
Kyösti Mälkki
f0a3d44458 emulation/qemu-x86: Use common romstage code
This provides stack guards with checking and common
entry into postcar.

Change-Id: If0729721f0165187946107eb98e8bc754f28e517
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34973
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-08-26 21:12:29 +00:00
Kyösti Mälkki
a963acdcc7 arch/x86: Add <arch/romstage.h>
Start with moving all postcar_frame related function
declarations here from <arch/cpu.h>.

Change-Id: I9aeef07f9009e44cc08927c85fe1862edf5c70dc
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34911
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-08-22 02:50:35 +00:00
Kyösti Mälkki
0f5e01a962 arch/x86: Flip option NO_CAR_GLOBAL_MIGRATION
It is easier to track CAR_GLOBAL_MIGRATION which is
the approach to be deprecated with the next release.

This change enforces new policy; POSTCAR_STAGE=y is
not allowed together with CAR_GLOBAL_MIGRATION=y.

Change-Id: I0dbad6a14e68bf566ac0f151dc8ea259e5ae2250
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34804
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2019-08-11 18:35:36 +00:00
Kyösti Mälkki
9fc12e0d4e arch/x86: Enable POSTCAR_CONSOLE by default
Almost all platforms force it on. Make it enabled by
default but under user control to optionally disable it.

Change-Id: I6b0f19c8bfd6ffed93023d57a1d28ca6acc06835
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34803
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Martin Roth <martinroth@google.com>
2019-08-11 03:07:36 +00:00
Kyösti Mälkki
c19d6a6ce5 device/pci: Replace use of dev_find_slot() for IRQs
Change-Id: I48c0de73338430282ce1a4442bbeb7c867dc174c
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34079
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2019-07-12 08:52:22 +00:00
Patrick Rudolph
fbdeb4af75 qemu-q35: die if started on wrong machine
The QEMU machine "PC" doesn't support MCFG.
Die after console init if the user selected the wrong qemu machine
and print a message to use the correct machine type.

Without this patch ramstage dies with non-helpful message:
"get_pbus: dev is NULL!"

Change-Id: I9d1b24176de971c5f827091bc5bc1bac8426f3f6
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31425
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2019-07-08 14:50:12 +00:00
Kyösti Mälkki
6e2d0c1b90 arch/x86: Adjust size of postcar stack
With VBOOT=y && VBOOT_MEASURED_BOOT=y message
digest will be allocated from the stack and
1 KiB reserve used with the recent platforms
was no longer sufficient.

The comment of LZMA scratchpad consuming stack
was obsolete for postcar, so these can be reduced
to same 4 KiB.

Change-Id: Iba1fb5bfad6946f316feac2d8c998a782142a56a
Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33775
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
2019-07-04 06:53:12 +00:00
Elyes HAOUAS
0c5666828d {mb,sb}: Use get_acpi_table_revision(FADT)
Change-Id: Id3d7f021a52e08906ae0a3f794756e397601fe96
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33428
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-06-19 19:34:10 +00:00
Elyes HAOUAS
31f9631548 src: Drop unused 'include <arch/acpigen.h>'
Use <arch/acpi.h> when appropriate.

Change-Id: I05a28d2c15565c21407101e611ee1984c5411ff0
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31781
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
2019-03-12 07:27:28 +00:00
Arthur Heymans
65200f0746 mb/qemu-{i440fx,q35}: Use POSTCAR stage to load the ramstage
Qemu does not have a real CAR but postcar stage is still useful
for testing the stage.

The postcar stage is also mandatory for x86_64 to setup
pagetables for x86_64 ramstage.

Do not set up MTRRs, as qemu ignores them anyways.

Tested on qemu-i440fx and qemu-q35.

Change-Id: I6638534d99fde312e55b6a6be8c95e4cb25cca80
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/30499
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2019-03-05 19:35:37 +00:00
Kyösti Mälkki
065857ee7f arch/io.h: Drop unnecessary include
Change-Id: I91158452680586ac676ea11c8589062880a31f91
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/31692
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-03-04 15:08:03 +00:00