Commit Graph

8853 Commits

Author SHA1 Message Date
Paul Menzel 55b059385a Lenovo T60/X60: cmos.layout: Replace tabulators with spaces for consistency
Change-Id: Iec0abae8a4b18ac737e9ebb3eac219182729be0f
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: http://review.coreboot.org/4057
Tested-by: build bot (Jenkins)
Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-11-15 01:04:52 +01:00
Vladimir Serbinenko d8cfd23f6a intel/2065x: Use TSC for udelay()
For the ram init of Intel Nehalem ram init we need a udelay implementation.
Use common TSC framework for it as Intel Haswell already does.

Change-Id: I360a6db1ec1ba32c92698a7d6f6968c93ead5c52
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/4043
Reviewed-by: Aaron Durbin <adurbin@google.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
2013-11-13 00:38:45 +01:00
David Hendricks c5e947ef17 rename status-related stuff to board_status
This just moves stuff to be more clear about the purpose of
the script. Other suggestions are welcome.

Change-Id: Ic6095fd4eb347daa5a03eff21b5952d2d42a6bfd
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: http://review.coreboot.org/4038
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2013-11-12 20:14:23 +01:00
Zheng Bao 7b4a99c665 AMD Hudson: Move function s3_resume_init_data to southbridge
Besides the AGESA static settings, the settings in mainboard/buildOpt.c also
change the final configuration. We need to make sure the settings in FchParam
in resume stage are the same as they were in cold boot stage, otherwise the
board can not wake up more than once.

Tested on AMD/Olive Hill, AMD/Parmer and ASRock/imb-a180.

(USB keyboard doesn't work when board wakes up. It is not introduced by this
patch. It needs more debugging.)

Change-Id: I5a5e5502080e358ffc3577dc6a40bb762844d998
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: http://review.coreboot.org/3932
Tested-by: build bot (Jenkins)
Reviewed-by: Rudolf Marek <r.marek@assembler.cz>
2013-11-12 16:40:48 +01:00
Gerd Hoffmann baa782020e qemu: load e820 from fw_cfg
qemu 1.7+ provides a fw_cfg file named "etc/e820" with e820-like entries
for reservations and ram regions.  Use it for ram detection if present,
otherwise fallback to the traditional cmos method.

Change-Id: Icac6c99d2a053e59dfdd28e48d1ceb3d56a61bdc
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-on: http://review.coreboot.org/4030
Tested-by: build bot (Jenkins)
2013-11-11 12:14:42 +01:00
Gerd Hoffmann 289b45fdff qemu: add fw_cfg files support
Qemu can provide files using the firmware config interface.
This is used to pass config options, virtual machine config
info and option roms into the guest.

This patch adds support for reading the file index and loading
files from qemu.

Change-Id: I57d4a734527c4117239f355121cf1fb8a390ab0d
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-on: http://review.coreboot.org/4029
Tested-by: build bot (Jenkins)
2013-11-11 11:56:37 +01:00
Gerd Hoffmann a91daa5ba1 add memory clobber to ins{b,w,l}
Change-Id: Ia710eb59f23a52afba2a8ef6e0ff2b2306107245
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-on: http://review.coreboot.org/4033
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2013-11-10 20:41:52 +01:00
Gerd Hoffmann e1539ba931 libpayload: add memory clobber to ins{b,w,l}
Change-Id: I3c4b8a9eeb6c4b2bcc58ccff091b4c997b2da923
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-on: http://review.coreboot.org/4034
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2013-11-10 20:41:05 +01:00
Marc Jones 04134a52b2 sio1007: Properly build '.c' files
Properly build the super i/o .c files.  This prevents including
the .c file directly in romstage, which is generally bad practice.
Adding a Makefile and a .h file to include.

Change-Id: I0be66e94d3062a2c4a445cee2f12ec249598dc8b
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Reviewed-on: http://review.coreboot.org/4014
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2013-11-10 14:19:28 +01:00
Marc Jones c4b6f3bacb emeraldlake2: Clean up COM port enable
Remove the COM port enable loop. There is no need to
search for the port when it is needed and known by the
GPIO function.

Change-Id: Ie4e533fd9e49ed9ae62b209317b4b9853ff9926a
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Reviewed-on: http://review.coreboot.org/4027
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2013-11-10 14:12:55 +01:00
Marc Jones af0cd0921a console: Add hexdump32 function
Add a function to display memory locations in the console
logfile.

Change-Id: Iddb8d2e7a24357075f32c2fdf7916ae7a732247d
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Reviewed-on: http://review.coreboot.org/4013
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2013-11-10 14:12:31 +01:00
Ronald G. Minnich 12785d9601 util/xcompile/xcompile: set up for aarch64
The tools for aarch64 on ubuntu are called
aarch64-linux-gnu-*
The type is
elf64-littleaarch64

This now finds the right files for building on aarch64

This has only been tested on ubuntu saucy; the aarch64 toolchain
is in a very ill-defined state on most distros.

Change-Id: Ic1bbd40f0d72384d6e80287b850686292a252918
Signed-off-by: Ronald G. Minnich <rminnich@google.com>
Reviewed-on: http://review.coreboot.org/4035
Tested-by: build bot (Jenkins)
Reviewed-by: David Hendricks <dhendrix@chromium.org>
2013-11-10 04:41:30 +01:00
Marc Jones 2a58ecde78 Add new finalize functions for devices and chips
Many chipset devices require additional configuration after
device init. It is not uncommmon for a device early in the devicetree
list to need to change a setting after a device later in the tree does
PCI init. A final function call has been added to device ops to handle
this case. It is called prior to coreboot table setup.

Another problem that is often seen is that the chipset or mainboard
need to do some final cleanup just before loading the OS. The chip
finalize has been added for this case. It is call after all coreboot
tables are setup and the payload is ready to be called.

Similar functionality could be implemented with the hardwaremain
states, but those don't fit well in the device tree function pointer
structure and should be used sparingly.

Change-Id: Ib37cce104ae41ec225a8502942d85e54d99ea75f
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Reviewed-on: http://review.coreboot.org/4012
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-11-08 19:55:17 +01:00
Zheng Bao 86655cf835 Trivial: Remove trailing whitespaces in status.sh
The whitespaces make "git commit" failed.

lint-stable-003-whitespace
Check for superfluous whitespace in the tree
========
test failed:
File util/status/status.sh has lines ending with whitespace.
========

Change-Id: I52fc5ae3e5aa81dac098b36d2479e4d10325a09b
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: http://review.coreboot.org/4032
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2013-11-07 11:59:24 +01:00
Paul Menzel 0ce5ebf0a0 northbridge/intel/i945/raminit.c: Remove set but unused variable `reg16`
Change-Id: Id4a758644a7b799e7662113c07d395e053525934
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: http://review.coreboot.org/3984
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-11-05 21:35:13 +01:00
Paul Menzel bf22338a09 southbridge/via/vt8237r/ctrl.c: Remove set but unused variable `regm3`
Change-Id: I6bb652419a54b7b7190e417346581f38335425ae
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: http://review.coreboot.org/3985
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-11-05 21:33:38 +01:00
Kyösti Mälkki b0aec8f070 usbdebug: Fix build for ROMCC boards
Header file is not compatible with romcc, just drop it as a romstage
built with romcc cannot use usbdebug anyway.

Change-Id: If7f8f22d6a8fa1f02157df281f82f02b72b6a609
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/4006
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-11-05 16:50:15 +01:00
David Hendricks 6583a8108c Another pass at board status script
This reports relevant bits of information about a machine which is
running coreboot. This also includes a script to get revision info
from git, which we may want to split out into another patch.

A remote target can be specified since it is likely that the machine
used to develop the code is not the same machine being developed for.
The remote host must be set up for non-interactive root login.

Example: sh util/status/status.sh -r gizmoboard -u

Change-Id: Ief0a85faca2ec9ce2d270e1e5b09e74836ab0c97
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: http://review.coreboot.org/4021
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-11-04 17:11:35 +01:00
Paul Menzel d0299e4b51 southbridge/intel/i82801ix/lpc.c: Remove unused variable `dummy`
Removing `-Wno-unused-but-set-variable` from `CFLAGS` the build for
QEMU Q35 and Roda RK9, both using the Intel 82801Ix southbridge, fail
with the following error.

	src/southbridge/intel/i82801ix/lpc.c: In function 'i82801ix_enable_apic':
	src/southbridge/intel/i82801ix/lpc.c:45:5: error: variable 'dummy' set but not used [-Werror=unused-but-set-variable]
	cc1: all warnings being treated as errors

Removing `dummy` should be safe as GCC probably optimizes it away before
anyway. That no dummy variable is used for an RCBA [1] access in Intel
Lynx Point supports that this can be dropped safely.

[1] root complex base address
[2] src/southbridge/intel/lynxpoint/early_pch.c

Change-Id: I1c138a3498228dbd025f68d5e6af0acc29ed3460
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: http://review.coreboot.org/3982
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
2013-10-30 16:18:04 +01:00
Andrew Wu 1ce4860405 vortex86ex: Defer checking PS/2 keyboard controller system flag
Don't check keyboard controller system flag until before calling
pc_keyboard_init(). This makes waiting time shorter.

Change-Id: I2cdb533a5b25575e1717434533a60decf748f6d8
Signed-off-by: Andrew Wu <arw@dmp.com.tw>
Reviewed-on: http://review.coreboot.org/3958
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-10-22 22:48:34 +02:00
Kyösti Mälkki ac16405799 usbdebug: Fix boards without EARLY_CBMEM_INIT
The main usbdebug file lib/usbdebug.c was removed from romstage
build with commit f8bf5a10 but the chipset-specific parts were not,
leading to unresolved symbol errors for AMD platforms.

Add a silent Kconfig variable USBDEBUG_IN_ROMSTAGE for convenient
use of this feature.

Change-Id: I0cd3fccf2612cf08497aa5c3750c89bf43ff69be
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/3983
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
2013-10-22 21:35:05 +02:00
Paul Menzel 569ad760cc util/lint/lint-stable-003-whitespace: Ignore temporary files ending with a tilde
Some editors like gedit create auxiliary files ending with a
tilde '~'. As these are not checked into the Git repository, do
not check these for whitespace errors.

Change-Id: I2c4cf00f9d623be73ea3bbb7b2da4f1e1900c8e9
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: http://review.coreboot.org/3952
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
2013-10-22 04:17:30 +02:00
Jonathan A. Kollasch 553fe1cbc7 winent-mb6047: initial WIN Enterprises MB-60470 board port
What works:
 - ACPI interrupt routing for onboard devices
 - onboard devices including USBs, ATAs, NICs, COM1

What almost works:
 - SMI720 VGA BIOS needs forthcoming VGA BIOS hooks in SeaBIOS to work

Untested:
 - Interrupt Line Register interrupt routing
 - PIRQ interrupt routing
 - MPBIOS/MPTABLE interrupt routing
 - unpopulated on board revision 1A AC97 audio
 - unpopulated PCI-E x16 slot
 - unpopulated ExpressCard slot
 - HT expansion board

Thanks to WIN Enterprises for providing boards.

Change-Id: I7787f89b3ab454b668c3b75d0d1cde55b8d53c48
Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
Reviewed-on: http://review.coreboot.org/3975
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Tested-by: build bot (Jenkins)
2013-10-19 16:10:56 +02:00
Jonathan A. Kollasch e1ffd9ef7a winent-mb6047: copy tyan/s2891 mainboard directory
Change-Id: I382e30c92a4c428ec53dd959a5fda4927797fb9b
Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
Reviewed-on: http://review.coreboot.org/3974
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-10-19 16:10:44 +02:00
Paul Menzel 6a4e9b547a get_bus_conf.c: reindent with indent
Change-Id: Ia0c37339aa69b92a1b518fa5e49adc4a7628ae5d
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: http://review.coreboot.org/3979
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Tested-by: build bot (Jenkins)
2013-10-18 17:44:56 +02:00
Andrew Wu cd9abf95e7 arch/x86/Makefile.inc: Pass $(AS) and $(CPP) to SeaBIOS
SeaBIOS’ Makefile requires cpp (C Preprocessor) to build. Modify
the xcompile script to search for cpp program path, and pass it to
SeaBIOS’ `Makefile.inc`. Also pass the program path for as (GNU assembler).

This is needed, so the crossgcc toolchain to build the SeaBIOS payload
under Mac OSX. OSX ships a cpp program, but it works differently
from GNU CPP, so we need to override it.

Change-Id: If996ffbb76ec4bd16079b54b41f3fac07bfe25be
Signed-off-by: Andrew Wu <arw@dmp.com.tw>
Reviewed-on: http://review.coreboot.org/3896
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
2013-10-17 01:59:50 +02:00
Andrew Wu c2a8031a5e libpayload/sample: Use settings from .xcompile file to build.
It is for crossgcc.

Change-Id: Ia1d676adfea340b6b80858215459491c9338d614
Signed-off-by: Andrew Wu <arw@dmp.com.tw>
Reviewed-on: http://review.coreboot.org/3955
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
2013-10-17 01:54:43 +02:00
Kyösti Mälkki 697927cc35 CBMEM: Define cbmem_top() just once for x86
It is expected this will always be a casted get_top_of_ram() call
on x86, no reason to do that under chipset.

Change-Id: I3a49abe13ca44bf4ca1e26d1b3baf954bc5a29b7
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/3972
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
2013-10-15 13:18:22 +02:00
Kyösti Mälkki 2644793ef4 Have option of timestamps, CBMEM console and usbdebug for most boards
As boards without EARLY_CBMEM_INIT do not initialize CBMEM in romstage,
and have no CAR migration, these features are available for ramstage only.

Change-Id: Ic3f77ccdedd4e71ba693619c02c9b98b328a0882
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/3970
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
2013-10-15 13:15:18 +02:00
Kyösti Mälkki 082c19ea89 CBMEM: Fail builds on missing get_top_of_ram()
Dummy get_top_of_ram() is removed from romstage to fail already at
build-time for cases where cbmem_initialize() would not complete.

The mechanisms behind CAR_GLOBAL migration only work correctly when
romstage can succesfully make the cbmem_initialize() call.

Change-Id: I359820fb196ef187b9aa2e8a3e8f658a0550f237
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/3969
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
2013-10-15 13:14:57 +02:00
Kyösti Mälkki 1a279046cd intel/i82371: Remove HAVE_ACPI_RESUME
This is needed to apply a rule that get_top_of_ram() in romstage is
required to select HAVE_ACPI_RESUME, otherwise chipset/board has no
means to backup low memory to CBMEM on s3 resume.

Only board affected is asus/p2b.

Change-Id: Ia5cbf4e5e40af25f52a19de584d8bc5370487154
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/3971
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
2013-10-15 13:14:29 +02:00
Kyösti Mälkki 29e9c22eb7 timestamps: Fix some lost timestamps for romstage
Timestamps from cbfs_and_run, TS_START_COPYRAM and TS_END_COPYRAM,
were lost with commit b766b1c7.

Reason is variable ts_table was referencing CAR storage after CAR
is torn doesn. Add use of car_get_var() / car_set_var() so the
references go to migrated storage in CBMEM.

Change-Id: I5a942ad7fd59a04e3a5255f4a3636d37dcfc1591
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/3967
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
2013-10-15 13:14:03 +02:00
WANG Siyuan 4ca721399c AMD Olive Hill: Disable NoSnoopEnable to fix HDMI audio corruptions with Ubuntu
Ubuntu's HDMI audio has noise and echo. Disable NoSnoopEnable can
resolve this issue.
I have tested on Ubuntu 13.04 with AMD Catalyst 13.4 Proprietary
Linux Display Driver[1].

[1]. http://support.amd.com/us/gpudownload/linux/Pages/radeon_linux.aspx

Change-Id: I5d2dddb1b7469d56cd64e3c1e0f4c6c6f095b4ab
Signed-off-by: WANG Siyuan <SiYuan.Wang@amd.com>
Signed-off-by: WANG Siyuan <wangsiyuanbuaa@gmail.com>
Reviewed-on: http://review.coreboot.org/3934
Tested-by: build bot (Jenkins)
Reviewed-by: Dave Frodin <dave.frodin@se-eng.com>
2013-10-15 05:02:25 +02:00
WANG Siyuan 2c86fc4343 ASRock IMB_A180: fix Ubuntu HDMI audio issue
Ubuntu's HDMI audio has noise and echo. Disable NoSnoopEnable can
resolve this issue.
I have tested on Ubuntu 13.04 with latest graphic driver.

Change-Id: I09c19b8925eedee03cfb1d8c0831a84e8aeeba4f
Signed-off-by: WANG Siyuan <SiYuan.Wang@amd.com>
Signed-off-by: WANG Siyuan <wangsiyuanbuaa@gmail.com>
Reviewed-on: http://review.coreboot.org/3937
Tested-by: build bot (Jenkins)
Reviewed-by: Dave Frodin <dave.frodin@se-eng.com>
2013-10-15 05:02:06 +02:00
WANG Siyuan f38145e81c AMD Olive Hill: fix Windows 7 HDMI audio issue
Windows 7 cannot find HDMI audio device because of acpi setting.
I have tested on Windows 7. I can play music.

Change-Id: I90ade7e7be79f65783922333c2cbb2d3cc6557ea
Signed-off-by: WANG Siyuan <SiYuan.Wang@amd.com>
Signed-off-by: WANG Siyuan <wangsiyuanbuaa@gmail.com>
Reviewed-on: http://review.coreboot.org/3933
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-10-15 05:01:36 +02:00
WANG Siyuan 7b6d412dbc vendorcode/amd/agesa/f16kb: Update Kabini PI from v1.0.0.0 to v1.0.0.7
The platform initialization (PI) code v1.0.0.7 for Kabini has some
enhancements like ECC DIMM support, new CPU microcode rev 0700010B, FCH
bug fix (RTC) and so on.

Use the name Kabini instead of Kerala everywhere.

Note, the former PI code was indeed version v1.0.0.0 instead of v0.0.1.0
as used in `AGESA_VERSION_STRING`.

Change-Id: I186de1aef222cd35ea69efa93967a3ffb8da7248
Signed-off-by: WANG Siyuan <SiYuan.Wang@amd.com>
Signed-off-by: WANG Siyuan <wangsiyuanbuaa@gmail.com>
Reviewed-on: http://review.coreboot.org/3935
Tested-by: build bot (Jenkins)
Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
2013-10-15 05:01:11 +02:00
Kyösti Mälkki f8bf5a10c5 Revert "CBMEM: Always have early initialisation"
This reverts commit de1fe7f655.

While things appeared to work, there were actually invalid references
to CAR storage after CAR was torn down on boards without
EARLY_CBMEM_INIT. It was discussed use of CAR_GLOBAL should be
restricted to boards that handle CAR migration properly.

Change-Id: I9969d2ea79c334a7f95a0dbb7c78065720e6ccae
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/3968
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
2013-10-14 17:16:22 +02:00
Jonathan A. Kollasch cf18c856aa ck804: hide IOAPIC base address in PCI_BASE_ADDRESS_1
Linux unhelpfully "fixes" the value in PCI_BASE_ADDRESS_1 when it is
0xfec00000 (that is, outside the range of bus 0 address space).  This
causes IOAPIC interrupts to fail to work under Linux.  This issue was
originally unnoticed by me when testing as sanity checking such as
this is not done by NetBSD.

Hiding the IOAPIC BAR is done by the OEM BIOS on the ck804 boards I've
checked.

Change-Id: I736db163750f709d68c988fac075597a50b29ab7
Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
Reviewed-on: http://review.coreboot.org/3963
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-10-14 02:22:07 +02:00
Jonathan A. Kollasch 948dede9c5 ck804: obtain stored IOAPIC address from allocator instead of register
Change-Id: Ibdd438455a545aa9266b0fd893d5ff27124ab22c
Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
Reviewed-on: http://review.coreboot.org/3961
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-10-14 02:18:48 +02:00
Jonathan A. Kollasch b679525538 ck804: obtain I/O APIC base address for ACPI MADT from allocator
Change-Id: I67192c8ae99e396ea4b17e03c658f31dbb5c1800
Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
Reviewed-on: http://review.coreboot.org/3960
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-10-14 02:17:03 +02:00
Andrew Wu 3fa1a13f62 dmp/vortex86ex: Initialize PS/2 keyboard.
Call pc_keyboard_init function in southbridge. It makes PS/2
keyboard work in coreinfo payload.

Change-Id: Idb79f87b09eeeade94e966fb8769dec7578e2cf5
Signed-off-by: Andrew Wu <arw@dmp.com.tw>
Reviewed-on: http://review.coreboot.org/3957
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-10-13 19:11:48 +02:00
Paul Menzel 7a00ca75d7 northbridge/amd/amdk8/raminit_f_dqs.c: Remove unused variable `reg` in `setup_mtrr_dqs()`
Change-Id: I7fc7819c329c058472031e82237be5c170b277f4
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: http://review.coreboot.org/3965
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
2013-10-13 19:10:10 +02:00
Jonathan A. Kollasch 772d026076 ck804 lpc: use PCI_BASE_ADDRESS_1 instead of 0x14
Change-Id: I752a4a890e1f610651a2c688cf42350ce8e9deaa
Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
Reviewed-on: http://review.coreboot.org/3962
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2013-10-13 18:13:56 +02:00
Stefan Reinauer fd4f4136e8 Rename cpu/x86/car.h to arch/early_variables.h
and add an ARMv7 version.

Change-Id: I14fbff88d7c2b003dde57a19bf0ba9640d322156
Signed-off-by: Stefan Reinauer <reinauer@google.com>
[km: rebased fa004acf8 from chromium git]
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/3939
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
2013-10-13 12:47:05 +02:00
Jonathan A. Kollasch 8ad6e78778 Nvidia boards: acpi_tables.c: Remove intermediate variable in ACPI interrupt routing initialization
Change-Id: I6cb4ad5ea5ad40284f8e88ff440f2605d3b83359
Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
Reviewed-on: http://review.coreboot.org/3959
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
2013-10-12 16:13:59 +02:00
Kyösti Mälkki 4f9bf7e2fb AMD hudson yangtze: Fix corruption of a global ramstage variable
A late for loop may reference over the current array allocation
and corrupt an unrelated global variable. As a quick fix bumb the
size of the array allocation uniformly to 6.

We missed these boards for commit 9c7d73ca because the arrays
had been renamed.

Change-Id: Iff2f2a0090d9302576bc72195d2a3f6fa37ce29a
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/3954
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
2013-10-07 19:09:34 +02:00
Paul Menzel 11b47801b2 cpu/x86/mtrr/mtrr.c: Remove superfluous assignment to `type_index`
When building coreboot with the Clang static analyzer scan-build,
it reports »Value stored to 'type_index' is never read«. Indeed,
in `memranges_each_entry()` `type_index` is assigned a value
before being read. So remove that line.

Change-Id: I6da2fb8be7157bb98c57281babd4a08ca0d9f7a7
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: http://review.coreboot.org/3953
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
2013-10-03 15:17:05 +02:00
Gerd Hoffmann b142a51542 qemu: q35: avoid address conflict
Qemu has the fw_cfg interface at 0x510, which conflicts with 
power management base address in coreboot.  Move the pmbase to a
non-conflicting address.  No need to worry about speedstep, it
is not supported by qemu and isn't enabled in the qemu config.

Change-Id: I3e87d8301988028ca0ea7d96c08b4e26ac15a7c2
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-on: http://review.coreboot.org/3938
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-10-01 18:31:42 +02:00
Nico Huber c371442a29 libpayload: Switch xHCI shared ports back to EHCI on shutdown
On Intel's Panther Point the xHCI ports are shared with an EHCI
controller. Our xHCI driver switches them to xHCI, naturally. But
we forgot to switch them back on shutdown, which left them
unusable by a non-xHCI aware operating system.

Change-Id: I70ef08655a603b42ee939935d50cf77ea97878a3
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/3791
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2013-09-30 10:42:53 +02:00
Allen Martin 681d17e0bf exynos5420: Fix build warning
Fix "set but not used" variable warning with gcc 4.7.3

Change-Id: Ia27291ecb4f993c4ba6f29b134167dc23a449bf5
Signed-off-by: Allen Martin <amartin@nvidia.com>
Reviewed-on: http://review.coreboot.org/3949
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Gabe Black <gabeblack@chromium.org>
2013-09-28 22:25:14 +02:00