Commit graph

11 commits

Author SHA1 Message Date
Vladimir Serbinenko
12fcb86bba sandybridge: Pass chip info to i915lightup.
Change-Id: I280441aadb0575dc0b99584cdcd48cc76a0289a2
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/5284
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2014-06-02 21:47:39 +02:00
Kyösti Mälkki
ab56b3b11c ChromeOS: Remove oprom_is_loaded
A global flag oprom_is_loaded was used to indicate to
U-boot that VGA option ROM was loaded and run, or that
native VGA init was completed on GMA device.

Implement this feature without dependency to CHROMEOS option
and replace use of global variable oprom_is_loaded with call
to gfx_get_init_done().

Change-Id: I7e1afd752f18e5346dabdee62e4f7ea08ada5faf
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/4309
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2014-05-01 15:39:26 +02:00
Vladimir Serbinenko
a37383db80 Replace all occurences of sprintf with snprintf
THis reduces risks of bufer overflows.

Change-Id: I77f80e76efec16ac0a0af83d76430a8126a7602d
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/4279
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2014-01-10 18:08:16 +01:00
Ronald G. Minnich
7982de165e google/link: use the new edid functions when in FUI mode
The new edid functions support converting the edid to an lb_framebuffer.
Use them. Also, since panels seem to set bits per color instead of bits
per pixel, just force the right value in the edid struct.

Add helpful comment because people don't always believe we need to set
the pallette.

While we're at it, fix a problem that caused it to not compile.

Change-Id: I645edc4e442d9b96303d9e17f175458dc7ef28b6
Signed-off-by: Ronald G. Minnich <rminnich@google.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/57619
Reviewed-by: Stefan Reinauer <reinauer@google.com>
Commit-Queue: Ronald G. Minnich <rminnich@chromium.org>
Tested-by: Ronald G. Minnich <rminnich@chromium.org>
Reviewed-on: http://review.coreboot.org/4327
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-12-05 20:15:18 +01:00
Denis 'GNUtoo' Carikli
b8eb0a802f link/graphics: Remove the inclusion of an AMD header.
link(google chromebook pixel) is an intel machine.

Change-Id: I9d40f1e945021d8e190879477cd12be7d0262733
Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@no-log.org>
Reviewed-on: http://review.coreboot.org/3085
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-04-14 02:05:35 +02:00
Stefan Reinauer
3e4e303858 Unify coreboot table generation
coreboot tables are, unlike general system tables, a platform
independent concept. Hence, use the same code for coreboot table
generation on all platforms. lib/coreboot_tables.c is based
on the x86 version of the file, because some important fixes
were missed on the ARMv7 version lately.

Change-Id: Icc38baf609f10536a320d21ac64408bef44bb77d
Signed-off-by: Stefan Reinauer <reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/2863
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-by: Aaron Durbin <adurbin@google.com>
Tested-by: build bot (Jenkins)
2013-03-22 00:17:55 +01:00
Ronald G. Minnich
b3b72f350e link/graphics: Add support for EDID
This code is taken from an EDID reader written at Red Hat.

The key function is
int decode_edid(unsigned char *edid, int size, struct edid *out)

Which takes a pointer to an EDID blob, and a size, and decodes it into
a machine-independent format in out, which may be used for driving
chipsets. The EDID blob might come for IO, or a compiled-in EDID
BLOB, or CBFS.

Also included are the changes needed to use the EDID code on Link.

Change-Id: I66b275b8ed28fd77cfa5978bdec1eeef9e9425f1
Signed-off-by: Ronald G. Minnich <rminnich@google.com>
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-on: http://review.coreboot.org/2837
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-03-20 05:35:50 +01:00
Ronald G. Minnich
a95a13bd47 link/graphics: New state machine
This is a new state machine. It is more programmatic, in the
case of auxio, and has much more symbolic naming, and very few
"magic" numbers, except in the case of undocumented settings.

As before, the 'pre-computed' IO ops are encoded in the iodefs
table. A function, run, is passed and index into the table and
runs the ops.

A new operator, I, has been added. When the I operator is hit,
run() returns the index of the next operator in the table.

The i915lightup function runs the table. All the AUX channel ops
have been removed from the table, however, and are now called as
functions, using the previously committed auxio function.

The iodefs table has been grouped into blocks of ops, which end in
an I operator. As the lightup function progresses through startup,
and the run() returns, the lightup function performs aux channel
operations.

This code is symbolic enough, I hope, that it will make haswell
graphics bringup simpler.

i915io.c, and the core of the code in i915lightup.c, were
programatically generated, starting with IO logs from the DRM
startup code in the kernel. It is possible to apply the tools that
do this generation to newer IO logs from the kernel.

Change-Id: I8a8e121dc0d9674f0c6a866343b28e179a1e3d8a
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-on: http://review.coreboot.org/2836
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-03-20 05:34:41 +01:00
Ronald G. Minnich
ec2d914e19 link/graphics: implement a palette setting operator
Add a  new operator, P, for the state machine, meaning
implement a palette fill.

Implement a function (palette) that fills the palette when the
P operator is hit.

This replaces 256 lines in the state machine table with 1.

Change-Id: I67d9219fe7de0ecf1fb9faf92130c00c9f5f8e88
Signed-off-by: Ronald G. Minnich <rminnich@google.com>
Reviewed-on: http://review.coreboot.org/2835
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-03-20 05:31:04 +01:00
Ronald G. Minnich
665e3d23f0 link/graphics: add functions to support aux channel communications
For full integration of FUI into coreboot, we need aux channel
communcations.  The intel_dp.c is a file taken from Linux and is
used for aux channel comms.  This file has been cut down to work
with coreboot.  For now it is associated with the link mainboard
until we get a better handle on how this all fits together.  This
code is almost certainly usable on other platforms in the long term.
But one step at a time.

Change-Id: I7be4c56e0a7903f3901ac86e12b28f3bdc0f7947
Signed-off-by: Ronald G. Minnich <rminnich@google.com>
Reviewed-on: http://review.coreboot.org/2834
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-03-19 22:42:39 +01:00
Stefan Reinauer
49428d8403 Add support for Google's Chromebook Pixel
Ladies and gentlemen, I'm very happy to announce coreboot support for
the latest and greatest Google Chromebook: The Chromebook Pixel.

See the link below for more information on the Chromebook Pixel, and
its exciting specs:
http://www.google.com/intl/en/chrome/devices/chromebooks.html#pixel

The device is running coreboot and open source firmware on the EC
(see ChromeEC commit for more information on that exciting topic)

Change-Id: I03d00cf391bbb1a32f330793fe9058493e088571
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/2482
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-02-23 04:27:08 +01:00