Commit Graph

16103 Commits

Author SHA1 Message Date
Julius Werner fe4cbf1167 arm64: mmu: Make page table manipulation work across stages
In order to have a proper runtime-modifyable page table API (e.g. to
remap DRAM after it was intialized), we need to remove any external
bookkeeping kept in global variables (which do not persist across
stages) from the MMU code. This patch implements this in a similar way
as it has recently been done for ARM32 (marking free table slots with a
special sentinel value in the first PTE that cannot occur as part of a
normal page table).

Since this requires the page table buffer to be known at compile-time,
we have to remove the option of passing it to mmu_init() at runtime
(which I already kinda deprecated before). The existing Tegra chipsets
that still used it are switched to instead define it in memlayout in a
minimally invasive change. This might not be the best way to design this
overall (I think we should probably just throw the tables into SRAM like
on all other platforms), but I don't have a Tegra system to test so I'd
rather keep this change low impact and leave the major redesign for
later.

Also inlined some single-use one-liner functions in mmu.c that I felt
confused things more than they cleared up, and fixed an (apparently
harmless?) issue with forgetting to mask out the XN page attribute bit
when casting a table descriptor to a pointer.

BRANCH=None
BUG=None
TEST=Compiled Ryu and Smaug. Booted Oak.

Change-Id: Iad71f97f5ec4b1fc981dbc8ff1dc88d96c8ee55a
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: http://review.coreboot.org/12075
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-11-11 05:07:58 +01:00
Julius Werner 03a0a65172 armv7: mmu: Make fine grained page tables work across stages
Among its other restrictions (which are noted in a comment above the
function prototype and stay in place), our makeshift fine-grained page
table support for ARM32 has the undocumented feature that it relies on
a global bookkeeping variable, causing all sorts of fun surprises when
you try to use it from multiple stages during the same boot. This patch
redesigns the bookkeeping to stay completely inline in the (persistent)
TTB which should resolve the issue. (This had not been a problem on any
of our platforms for now... I just noticed this because I was trying to
solve the same issue on ARM64.)

BRANCH=None
BUG=None
TEST=Booted veyron_jerry. Mapped a second fine-grained memory range
from romstage, confirmed that it finds the next free spot and leaves the
bootblock table in place.

Change-Id: I325866828b4ff251142e1131ce78b571edcc9cf9
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: http://review.coreboot.org/12074
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2015-11-11 05:07:48 +01:00
Timothy Pearson 95b97848cc mainboard/asus/kgpe-d16: Set correct supported SATA port count
Change-Id: Ia5c00f07de81d409e6215cc0944d64d00e47b795
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/12401
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
2015-11-11 02:47:43 +01:00
Timothy Pearson 22dfccf5b7 southbridge/amd/sb700: Disable broken SATA MSI functionality
Change-Id: I4e0a52eb90910604f8640ad7533b5d71be6c8e20
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/11983
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-11 02:47:23 +01:00
Timothy Pearson f89a05ed9f southbridge/amd/sb700: Indicate iSATA/eSATA port type
Change-Id: I8ee757d07c82c151b36def6b709163ff144d244f
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/11984
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-11-11 02:07:42 +01:00
Timothy Pearson 2b206775fa mainboard/asus/kgpe-d16: Properly initialize SB700 SATA PHYs
Change-Id: I5323462dcb8a4e84786be38cc85070eb48d4a31d
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/11982
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-11-11 02:01:47 +01:00
Timothy Pearson 5d7dc5545d southbridge/amd/sb700: Add AHCI support
Change-Id: I147284e6a435f4b96d6821a122c1f4f9ddc2ea33
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/11981
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-11 01:56:35 +01:00
Timothy Pearson 45ded7df03 amd/amdmct/mct_ddr3: Improve SPD DIMM detect reliability
Upon bootup the hardware reads at minimum 256 * 16 bytes (4Kb, or 32KB) over
I2C on a system with all DIMM slots populated.  If even one of those reads
has a single flipped bit in it (due to EMI, cross coupling with another trace,
 or just poor margins on some cheap DIMM) the system will hang and require a
hard reset.  In practice I've seen failure rates as high as 1 failed boot in
50 due to this issue, granted with cheap DIMMs, but even so retrying the read
resolves the corruption issue.

I2C is not designed for continuous data transmission with high reliability, and
there is no hardware error checking, therefore a single retry when transferring
this amount of data makes sense.

Change-Id: Ifab63eca2233c63a6a42ab8b7e742f8e47fb2a09
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/11975
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-11-11 01:20:03 +01:00
Stefan Reinauer 7593bda5a8 [REMOVAL] tyan/s2875
As announced in http://permalink.gmane.org/gmane.linux.bios/81918
I am removing all boards older than 10 years from the tree.

Change-Id: I36c2b0290f95f4c0f6bed6a7427fb3aab968d4da
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/12376
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins)
2015-11-10 23:04:13 +01:00
Timothy Pearson 69ded8f79f northbridge/amd/amdmct/mct_ddr3: Clean up curly brace style violations
Change-Id: I1ad581454e08f7a24395f50623f29ec14e07f5fb
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/12360
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
2015-11-10 22:30:03 +01:00
Stefan Reinauer 39456c2cca [REMOVAL] tyan/s4882
As announced in http://permalink.gmane.org/gmane.linux.bios/81918
I am removing all boards older than 10 years from the tree.

Change-Id: I866440595a0a38b65ce037dc9a1f7e4c02c6beb3
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/12385
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2015-11-10 21:35:50 +01:00
Stefan Reinauer 1115625595 [REMOVAL] tyan/s4880
As announced in http://permalink.gmane.org/gmane.linux.bios/81918
I am removing all boards older than 10 years from the tree.

Change-Id: I41d1f9eac2f4c37bec4d046a68f3f1cf95b51703
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/12384
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2015-11-10 21:35:39 +01:00
Stefan Reinauer 9fc5e0bc89 [REMOVAL] tyan/s2892
As announced in http://permalink.gmane.org/gmane.linux.bios/81918
I am removing all boards older than 10 years from the tree.

Change-Id: Idd6011302d2164275fe01954ad3e4e13474ec7a9
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/12382
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2015-11-10 21:35:10 +01:00
Stefan Reinauer 7c29040442 [REMOVAL] tyan/s2891
As announced in http://permalink.gmane.org/gmane.linux.bios/81918
I am removing all boards older than 10 years from the tree.

Change-Id: I915d5dd4a095b84023a19c9a0474634320207a08
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/12381
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2015-11-10 21:35:00 +01:00
Stefan Reinauer 52c0180dcc [REMOVAL] tyan/s2885
As announced in http://permalink.gmane.org/gmane.linux.bios/81918
I am removing all boards older than 10 years from the tree.

Change-Id: Icfdcc5d6043987e22ef9b4db84847d62c91bd305
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/12380
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2015-11-10 21:34:51 +01:00
Stefan Reinauer c5ab0979f6 [REMOVAL] tyan/s2882
As announced in http://permalink.gmane.org/gmane.linux.bios/81918
I am removing all boards older than 10 years from the tree.

Change-Id: Ie44a3c46b82e77028921339c50ae4c176e38055c
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/12379
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2015-11-10 21:34:22 +01:00
Zheng Bao 3844d9a30c AMD Bettong: Add a special case for SPD address of rev F
Rev F's SPD address is different from other revision.

            0   1
Channel A  A0  A2
Channel B  A4  AC

Change-Id: I620d1f9c295f9a0e30e3821ea36a05dd9f7d3495
Signed-off-by: WANG Siyuan <wangsiyuanbuaa@gmail.com>
Signed-off-by: WANG Siyuan <SiYuan.Wang@amd.com>
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: http://review.coreboot.org/12342
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2015-11-10 21:24:46 +01:00
Stefan Reinauer 8993df1d16 [REMOVAL] tyan/s2895
As announced in http://permalink.gmane.org/gmane.linux.bios/81918
I am removing all boards older than 10 years from the tree.

Change-Id: I9099f90c073197cc95bb9630788016b7b8221922
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/12383
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2015-11-10 21:21:19 +01:00
Stefan Reinauer f3601c406f [REMOVAL] tyan/s2880
As announced in http://permalink.gmane.org/gmane.linux.bios/81918
I am removing all boards older than 10 years from the tree.

Change-Id: Ifd1dfa35ae13ec01d932250994086edebece924d
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/12377
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins)
2015-11-10 21:20:56 +01:00
Stefan Reinauer 502a7e41df [REMOVAL] tyan/s2881
As announced in http://permalink.gmane.org/gmane.linux.bios/81918
I am removing all boards older than 10 years from the tree.

Change-Id: Idfec80ce79c906717e679d6576dc94e71da994c9
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/12378
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins)
2015-11-10 21:16:42 +01:00
Stefan Reinauer 9f21230e36 [REMOVAL] tyan/s2850
As announced in http://permalink.gmane.org/gmane.linux.bios/81918
I am removing all boards older than 10 years from the tree.

Change-Id: Ibf3849dcd7a1ef1d8bc5dfc864172a8254a64b6f
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/12375
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2015-11-10 21:15:12 +01:00
Stefan Reinauer f76de841f1 [REMOVAL] tyan/s2735
As announced in http://permalink.gmane.org/gmane.linux.bios/81918
I am removing all boards older than 10 years from the tree.

Change-Id: I460208c18964857be73d9a4449ecfd872ccad98a
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/12374
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2015-11-10 21:15:04 +01:00
Stefan Reinauer 63d5088bb6 [REMOVAL] iwill/dk8s2
As announced in http://permalink.gmane.org/gmane.linux.bios/81918
I am removing all boards older than 10 years from the tree.

Change-Id: I4a942150590fb69ff97279ff2b48b3be83abafa4
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/12372
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2015-11-10 21:14:53 +01:00
Stefan Reinauer 029f3550ef [REMOVAL] digitallogic/adl855pc
As announced in http://permalink.gmane.org/gmane.linux.bios/81918
I am removing all boards older than 10 years from the tree.

Change-Id: I5b0fb633b7611e2a69aeb33cd31ca8fd4a83592c
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/12369
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2015-11-10 21:14:31 +01:00
Stefan Reinauer a2d131511f [REMOVAL] drivers/trident/blade3d
As announced in http://permalink.gmane.org/gmane.linux.bios/81918
I am removing all boards older than 10 years from the tree.

Change-Id: I180fd548e8f45fc94e5086159c0e3e9465c74598
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/12386
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Tested-by: build bot (Jenkins)
2015-11-10 20:23:36 +01:00
Stefan Reinauer bb3934c3c2 [REMOVAL] iwill/dk8x
As announced in http://permalink.gmane.org/gmane.linux.bios/81918
I am removing all boards older than 10 years from the tree.

Change-Id: I1913ca75aa6f2a2c6b97d49faaabc16afd2799f5
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/12371
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2015-11-10 20:23:07 +01:00
Stefan Reinauer b38e9a962e [REMOVAL] newisys/khepri
As announced in http://permalink.gmane.org/gmane.linux.bios/81918
I am removing all boards older than 10 years from the tree.

Change-Id: If0e0a7f69b77cf4bcab4c0dcb58a153485380069
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/12373
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins)
2015-11-10 20:22:45 +01:00
Stefan Reinauer 43f6fd3827 [REMOVAL] ibm/e325 + ibm/e326
As announced in http://permalink.gmane.org/gmane.linux.bios/81918
I am removing all boards older than 10 years from the tree.

Change-Id: I8854c31f242c13b6f91901452f7eb7ce0ef0b255
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/12370
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2015-11-10 20:21:16 +01:00
Stefan Reinauer 7804bb002f [REMOVAL] arima/hdama
As announced in http://permalink.gmane.org/gmane.linux.bios/81918
I am removing all boards older than 10 years from the tree.

Change-Id: Ic71d8a9137f0bd2a0cc7571a43f9dddb50168d8d
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/12368
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins)
2015-11-10 20:17:17 +01:00
Stefan Reinauer 158abf9737 Drop SuperIO fintek/f71889
All boards using this SuperIO have been removed from the tree already.

Change-Id: I3c43a431d92d76b6ed3ec72b203d3e80925cadea
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/12247
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2015-11-10 20:16:49 +01:00
Timothy Pearson 1f780994eb cpu/amd/car: Add romstage BSP stack overrun detection
NOTE: This commit switches CacheBase in CAR to use the DCACHE_RAM_BASE
Kconfig variable.  There should be no functional difference between
the existing code and the new code, however hardware verfication is
encouraged on lesser used architectures such as AMD Geode.

Change-Id: Ia2e8f99be9df388e492a633c49df21ca1c57ba13
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/11970
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2015-11-10 20:00:56 +01:00
Timothy Pearson 453b543716 northbridge/amd/amdmct: Read SPD data into cache to decrease bootup time
Change-Id: Ic16a927a3f1fc6f7cb1aea36a8abe8cc1999cb52
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/11973
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-10 19:31:46 +01:00
Martin Roth 4c502697ee cpu: Add a way to use microcode .h files back to the build
The build was changed to remove usage of microcode .h files when
all of the .h files were converted to binary.  This is still
needed for some builds when microcode binaries aren't in the
blobs tree.

Change-Id: Ia323c90efe8aa0b8799fc5cce6197509e466a105
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: http://review.coreboot.org/12333
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Reviewed-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
2015-11-10 19:22:40 +01:00
Martin Roth 295358454a utils/scripts: Add microcode conversion tool
This is an update to the script in the blobs repo that converts
individual or multiple files into a microcode binary.

Change-Id: I66fb650bbfa334d1f07e8e3914ef6deb8e72bbb4
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: http://review.coreboot.org/12332
Tested-by: build bot (Jenkins)
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
2015-11-10 18:46:04 +01:00
Patrick Georgi 47b6a825a7 mainboard/**/irq_tables.c: Remove reference to getpir
The obsolete and removed getpir utility remarked in its output that the
data is autogenerated. The tool was removed because it wasn't very
reliable, so there's no need to point that anymore.

Change-Id: I5d624931ba7872b1fefa8fa3c270ae7367e069fa
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/12354
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2015-11-10 14:11:06 +01:00
Furquan Shaikh bf54c2cc5c libpayload/udc: dwc2: Add handler for add_strings
BUG=b:24676003
BRANCH=None
TEST=Compiles successfully. fastboot devices shows serial number for
shark.

Change-Id: I61d6c168fa458d1f880bc566db997aa5d6398361
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 45b286b318281aea9a4b0362c9259d748b66fd28
Original-Change-Id: Ib9cc22de9daa6c5ec9cde1e62c6f5f768e946069
Original-Signed-off-by: Furquan Shaikh <furquan@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/310984
Original-Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Original-Tested-by: Furquan Shaikh <furquan@chromium.org>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/12348
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-10 14:10:39 +01:00
Furquan Shaikh 3d6c95c1cd libpayload/udc: dwc2: Add timeout for shutdown operation
BUG=b:24676003
BRANCH=None
TEST=Verified that udc shutdown returns after the timeout.

Change-Id: I5df598c4eddecbecb353343ef5a4e44eae4fc20b
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 268913f21adea9969c9f88e3cb759341a60719f0
Original-Change-Id: I3ee059791d6e821f83f9ac41fd7c5385bd60e21e
Original-Signed-off-by: Furquan Shaikh <furquan@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/310983
Original-Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Original-Tested-by: Furquan Shaikh <furquan@chromium.org>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/12347
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
2015-11-10 14:10:02 +01:00
Yakir Yang e78a1bedc5 rockchip/rk3288: hdmi: configure display output mode with EDID information
'edid->hdmi_monitor_detected' would indicate whether the monitor
interface is HDMI or DVI.

BRANCH=none
BUG=chrome-os-partner:43789
TEST=Previously, my LG monitor couldn't show dev screen. But now I can see
     dev screen have been posted normally.

Change-Id: Id71f051b2cd792712e52bee7a763db383c1962a8
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 88101589a22d06f0bc25e0750b2862cf66b55391
Original-Change-Id: I157861d327926b834e1e8606b0b676f413491c70
Original-Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/309056
Original-Tested-by: David Hendricks <dhendrix@chromium.org>
Original-Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: http://review.coreboot.org/12346
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-10 14:09:57 +01:00
Yakir Yang 85810cce50 edid: add hdmi_monitor_detected in data struct edid
HDMI driver need to know whether the monitor is DVI
or HDMI interface, so this commit just introduce a
new number 'hdmi_monitor_detected' to struct edid.

There were four bits to indicate the monitor interfaces,
it's better to take use of that. But those bits only
existed in EDID 1.4 version, but didn't persented in
the previous EDID version, so I decided to detect the
hdmi cea block.

BRANCH=none
BUG=chrome-os-partner:43789
TEST=When mickey connect with HDMI monitor, see 'hdmi_monitor_detected' is 'true'.
     When mickey connect with DVI monitor, see 'hdmi_monitor_detected' is 'false'.

Change-Id: I1a4f1410e1cce1474ffae858db161a18578cac3a
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 409f041805d9fdff2d49faa1a3a262cf4dc609c2
Original-Change-Id: Ife770898b0f2b4f58b8259711101a0cab4a5e4ac
Original-Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/309055
Original-Tested-by: David Hendricks <dhendrix@chromium.org>
Original-Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: http://review.coreboot.org/12345
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-10 14:09:51 +01:00
david dc5b10bd92 google/{chell,lars}: Enable Fan control support
Copy from the CL https://chromium-review.googlesource.com/#/c/307028/
(I40c540dad32beefe249f025b570c347d3ad08c36)

BRANCH=None
BUG=None
TEST=emerge-lars coreboot

Change-Id: I131fb729661f0f3bfd198cdf238c627bf38a46a5
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 70d471c507d12924466979c93742944975a03f27
Original-Change-Id: I0128dc65110ba363185db9c2aca5cdb140c344c2
Original-Signed-off-by: David Wu <David_Wu@quantatw.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/310394
Original-Commit-Ready: David Wu <david_wu@quantatw.com>
Original-Tested-by: David Wu <david_wu@quantatw.com>
Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: http://review.coreboot.org/12344
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
2015-11-10 14:09:43 +01:00
zbao dcbb1287a7 AMD/Bettong: Set on-board eMMC as SD 2.0
The on-board eMMC is designed as 2.0. If it is set as 3.0,
it can not be detected.

Change-Id: I9fd913f76535e65c1672924ebdeba3d35dea59cc
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: http://review.coreboot.org/11748
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2015-11-10 10:37:51 +01:00
Zheng Bao fbdfed01eb AMD/Bettong: Memory configuration for DDR3 and DDR4
1. Bettong Rev A-E are DDR3, Bettong Rev F is DDR4.

2. DDR4 uses different memory configuration in AGESA.
Pass memory configuration parameters in agesawrapper_amdinitpost.

3. Tested on Rev C and Rev F.
Both of them can boot to Windows 8 and have the correct memory size.

Change-Id: Ia0d35ebf1b65c399abc3777ee6bdb107437a4345
Signed-off-by: WANG Siyuan <wangsiyuanbuaa@gmail.com>
Signed-off-by: WANG Siyuan <SiYuan.Wang@amd.com>
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: http://review.coreboot.org/11733
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2015-11-10 10:34:51 +01:00
Zheng Bao f3aea52a70 AMD/Bettong: add function to read board version
Bettong uses 3 GPIO(5-7) pins to identify board.
The GPIO ports are mapped to MMIO space.
The GPIO value and board version are mapped as follow:
GPIO5 GPIO6 GPIO7 Version
  0     0     0      A
  0     0     1      B
  ......
  1     1     1      H

Change-Id: I72df28043057d8c4ccc4a2e645011ca5379e9928
Signed-off-by: WANG Siyuan <wangsiyuanbuaa@gmail.com>
Signed-off-by: WANG Siyuan <SiYuan.Wang@amd.com>
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: http://review.coreboot.org/11732
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2015-11-10 10:34:32 +01:00
Felix Held 69e89f249f asus/kgpe-d16: fix DIMMSetVoltages
The RAM voltages can be set per socket, which contains two nodes.

Only reset the allowed voltages per socket before processing a new socket and
not after every node.

Change-Id: Ia0e47676c7a3eebd56a17ab6de0e9690bf8cf703
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: http://review.coreboot.org/12297
Reviewed-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Tested-by: build bot (Jenkins)
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
2015-11-10 01:45:09 +01:00
Jonathan A. Kollasch b65fd3e305 sunw/ultra40m2: initialize hardware monitor and fan control
Change-Id: I3fbb897feb68d899e5dec075a09d0dd605eca5ce
Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
Reviewed-on: http://review.coreboot.org/12309
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-11-10 00:58:19 +01:00
Jonathan A. Kollasch 7c62e17f2e mainboard: Add Sun Ultra 40 M2 port
The Ultra 40 M2 is a dual Socket F workstation with MCP55/IO55 chipset,
DME1737 superio and onboard Firewire.  This board port is for family
0Fh (K8) processors.

Due to existing bugs, having memory on the second node will cause
raminit to fail.

Change-Id: I5b62ade908ffeb80e22f14edbe4c1ec04880bd30
Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
Reviewed-on: http://review.coreboot.org/12304
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2015-11-10 00:57:55 +01:00
Jonathan A. Kollasch d9247828fd mainboard: copy nvidia/l1_2pvv to sunw/ultra40m2 and rename
Change-Id: Ia275a697caa73168553b5d588d54df651e0539d7
Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
Reviewed-on: http://review.coreboot.org/12303
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2015-11-10 00:57:45 +01:00
Edward O'Callaghan c8f0c0316c Provide coreboot coding style formalisation file for clang-format
The Clang project has a powerful code rewrite engine in the form
of LibFormat. A auxiliary tool is provided called `clang-format'
that can take a coding style formalisation file and rewrite your
code to conform to this style. Further, a wrapper script called
`git-clang-format' is also provided that can hook pre-commits
potentially replacing our slow and poor coverage regexp scripts
on pre-commits.

Herein we provide essentially the Linux Style Guide formalism.

Change-Id: Ica2207fdb8a4702793fa73eba6293b7b36ea9050
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/8036
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2015-11-10 00:49:03 +01:00
Timothy Pearson 59597ead1f mainboard/lenovo/t400: Add initial hybrid graphics support
TEST: Booted T400 with Intel/ATI hybrid graphics in integrated
mode with native Intel graphics init and verified integrated
panel framebuffer functionality in SeaBIOS and Linux.

Change-Id: I37e72c5dad0d7ab3915cc3d439ae9a4a9b3787e3
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/9319
Reviewed-by: Edward O'Callaghan <edward.ocallaghan@koparo.com>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Tested-by: build bot (Jenkins)
2015-11-10 00:45:40 +01:00
Urja Rannikko 9849f35459 asus/k8v-x: set superio ROM ctrl reg to enable writes
This is required for flashrom to work...

Change-Id: Icc0a52e0ca103c897d96fa8f3cf83b30780c7b49
Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-on: http://review.coreboot.org/12349
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-10 00:42:21 +01:00