Commit graph

11 commits

Author SHA1 Message Date
Patrick Rudolph
c670a41ca7 mb/lenvovo/*: Clean mainboard.c and devicetree
* Move board specific SPI registers to devicetree
* Remove unused headers
* Remove obsolete methods
* Fix coding style
* Fix Thinkpad L520 SPI lvscc register

Except for Thinkpad L520, no functional change has been done,
just moving stuff around.

Change-Id: I692a5632030fe2fedbe9a90f86251000f1360fb2
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/19494
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2017-05-21 16:38:52 +02:00
Patrick Rudolph
7bddd30e94 nb/intel/sandybridge/raminit: Allow 933Mhz on Lenovo devices
Set max_mem_clock_mhz in devicetree to 933Mhz.
Allows to run the memory at up to DDR3-1866.

The same frequency was allowed within the first vendor bios,
but Lenovo than decided to limit it to DDR3-1333.

Tested on Lenovo T520 and DDR3-1600 DIMM (RMT3170eb86e9w16).

The RAM is now running at DDR3-1600 instead of DDR3-1333.
This gives about 4% performance increase in glmark2 using the
Intel GPU.

Change-Id: If15be497402d84a2778f0434b6381a64eda832d6
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/15158
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
2016-06-20 21:44:15 +02:00
Patrick Rudolph
266a1f794d nb/intel/raminit (native): Read PCI mmio size from devicetree
Instead of hardcoding the PCI mmio size read it from devicetree.
Set a default value of 2048 MiB and 1024MiB for laptops without
discrete graphics.

Tested on Sandybridge Lenovo T520.

Change-Id: I791ebd6897c5ba4e2e18bd307d320568b1378a13
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/15140
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-06-12 12:48:44 +02:00
Patrick Rudolph
830fdc77cb mb/lenovo/T4xx: enable PEG device
Enable the PEG device in devicetree to expose the
device if any. This is already default behaviour
for T5xx series.

Change-Id: I16bd253ca96c4cdaad8a829f6490cec9e2599b5f
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/14448
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@googlemail.com>
2016-06-01 23:22:19 +02:00
Vladimir Serbinenko
c48f5ef3cc Kill lvds_num_lanes
Only one value would work with corresponding gma code currently (which one
depends on board). Going forward, it's possible to compute which number can
be used, so there is no need to keep this info around.

Change-Id: Iadc77ef94b02f892860e3ae8d70a0a792758565d
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/11862
Tested-by: build bot (Jenkins)
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2015-10-11 10:07:17 +00:00
Vladimir Serbinenko
551cff08d5 Derive lvds_dual_channel from EDID timings.
Based on the info by Felix Held.

Change-Id: Iab84dd8a0e3c942da20a6e21db5510e4ad16cadd
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/11857
Tested-by: build bot (Jenkins)
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2015-10-11 10:07:12 +00:00
Philipp Deppenwiese
3d02b9c79e mainboard/lenovo/{t430s,t420s,t520,t530,x220}: Add TPM 1.2 mainboard support
Every Lenovo Thinkpad includes a Trusted Platform Module, so we can enable
it for the sandy-/ivybridge platforms.

Change-Id: Icda443ba88c2a49a0033014ce7710dd607fa15dc
Signed-off-by: Philipp Deppenwiese <zaolin@das-labor.org>
Reviewed-on: http://review.coreboot.org/10411
Tested-by: build bot (Jenkins)
Reviewed-by: Nicolas Reinecke <nr@das-labor.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-06-05 12:30:32 +02:00
Vladimir Serbinenko
5477dca223 intel: Remove pstate_coord_type.
Not used anywhere.

Change-Id: I9bab092d285aaebdf9283ba08e23197f9785b3a6
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/10329
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Nicolas Reinecke <nr@das-labor.org>
2015-05-28 11:19:21 +02:00
Vladimir Serbinenko
dd2bc3f819 igd.asl rewrite
Old igd.asl had inconsistent addresses (between _DOD and actual device)
and ghost devices. Any of those is enough to make brightness on windows
fail and make igd.asl out-of-ACPI-spec. Also old code favoured ridiculous
copying of the same thing 6 times per chipset. Leave only hooking up and
chipset-specific part in chipset directory. Move NVS handling and ACPI-spec
parts to a common file.

Change-Id: I556769e5e28b83e7465e3db689e26c8c0ab44757
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/7472
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <edward.ocallaghan@koparo.com>
Reviewed-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
2015-05-28 08:27:10 +02:00
Nicolas Reinecke
bcff3bd1b3 mainboard/lenovo/t430s,t530,x230:enable usb3, set xhci overcurrent mapping
Tested on T530, T430s.
Verified with lspci dump.

Change-Id: I45acadb0c55534a67f7ad3e7bd84f4482a4344d7
Signed-off-by: Nicolas Reinecke <nr@das-labor.org>
Reviewed-on: http://review.coreboot.org/9451
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <edward.ocallaghan@koparo.com>
2015-04-20 23:50:58 +02:00
Nicolas Reinecke
29d358e6a1 lenovo/t430s: Add new port.
The port is based on the x230 / t530.
Tested - is in active use.

Change-Id: Ic5ccfe70343e8aef3465690edce9cdebf153a44d
Signed-off-by: Nicolas Reinecke <nr@das-labor.org>
Reviewed-on: http://review.coreboot.org/8359
Tested-by: build bot (Jenkins)
Reviewed-by: Philipp Deppenwiese <zaolin@das-labor.org>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2015-02-08 09:26:46 +01:00