Commit Graph

3016 Commits

Author SHA1 Message Date
Carl-Daniel Hailfinger 4b0a41b5ca Fix up one forgotten revert in r3140.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3141 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-14 00:33:42 +00:00
Carl-Daniel Hailfinger 8729de48fa Revert the delete of 82802ab.c in r3137.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3140 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-14 00:02:25 +00:00
Uwe Hermann 912ee57a59 Also print the chip vendor name in --list-supported output (trivial).
Cosmetic changes in some files, partly bending the 80-characters-per-line
rule in this special case, as the 80-character-limited version looks
equally crappy even in an 80x25 console/xterm, so let's make it at least
look good in a high-resolution xterm.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3139 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-13 18:52:51 +00:00
Uwe Hermann ee2bb3a21e Also print the required -m option in --list-supported output (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3138 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-13 18:41:07 +00:00
Carl-Daniel Hailfinger b7b22e3c57 Drop 82802ab.c as it is identical to sharplhf00l04.c.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3137 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-13 12:43:31 +00:00
Uwe Hermann 3182122c3b Update AMD CPU list based on Revision Guide for AMD NPT Family 0Fh Processors,
Publication #33610, Revision: 3.30, February 2008.

http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/33610.pdf

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3136 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-13 02:21:41 +00:00
Uwe Hermann b681570e7b Formatting fixes, no content changes (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3135 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-12 23:18:04 +00:00
Uwe Hermann 2ad17532a4 Drop the useless rom.layout file. It's just an example, likely never
been used in the last few years, and the contents are available in
the README already anyway.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Ward Vandewege <ward@gnu.org>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3134 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-12 12:28:40 +00:00
Uwe Hermann 098913dadf Add --list-supported option to flashrom which lists the supported
ROM chips, chipsets, and mainboards (Closes #90).

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Ward Vandewege <ward@gnu.org>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3133 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-12 11:54:51 +00:00
Stefan Reinauer 2aa1436777 Add GPIO dumping utility for Intel ICH series southbridges.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Signed-off-by: Joseph Smith <joe@smittys.pointclark.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3132 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-10 22:26:18 +00:00
Ward Vandewege 0719b8e460 The ATI vga rom is only 36K on the Tyan s2881.
This is a trivial patch.

Signed-off-by: Ward Vandewege <ward@gnu.org>
Acked-by: Ward Vandewege <ward@gnu.org>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3131 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-10 19:53:30 +00:00
Ward Vandewege 7aad44c496 This patch changes the Config.lb files and adds a Config-lab.lb file for the
tyan s2881 board, in preparation of supporting it in buildrom. Corresponding
changes for the other buildrom-supported boards were committed in r3092.

Signed-off-by: Ward Vandewege <ward@gnu.org>
Acked-by: Jordan Crouse <jordan.crouse@amd.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3130 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-10 18:48:52 +00:00
Joseph Smith 6a1dc86005 Initial support for the Intel 82830 northbridge and RCA RM4100 board.
Signed-off-by: Joseph Smith <joe@smittys.pointclark.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3129 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-09 13:24:46 +00:00
Uwe Hermann c4f5365688 Various cosmetic and coding style fixes for ASUS A8V-E SE (trivial).
No functional changes, only cosmetics. This is compile-tested.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3128 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-08 19:14:42 +00:00
Uwe Hermann 917158f803 Drop some duplicate documentation from the README. The manpage and
'superiotool --help' already provide the same information (trivial).

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3127 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-04 17:21:04 +00:00
Uwe Hermann 9ae23628fb Add missing license header to layout.c. The file was written by
Stefan Reinauer for coresystems GmbH in 2005, as confirmed on IRC.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3126 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-04 16:29:54 +00:00
Uwe Hermann cbb5ba8633 Rename lxbios to nvramtool, step 3 (rename directory).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3124 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-01 19:09:01 +00:00
Uwe Hermann 66d83cfa84 Rename lxbios to nvramtool, step 2 (rename files).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3123 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-01 19:07:46 +00:00
Uwe Hermann 6e565947a5 Rename lxbios to nvramtool.
This is step 1 in a three-step commit:

 1. Apply patch, commit.

 2. Rename some files:
    $ svn mv lxbios.c nvramtool.c
    $ svn mv lxbios.1 nvramtool.c
    $ svn mv lxbios.spec nvramtool.spec
    $ svn ci

 3. Rename lxbios directory:
    $ svn mv lxbios/ nvramtool/
    $ svn ci

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3122 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-01 19:06:32 +00:00
Uwe Hermann eec5ff4ccb Small coding style fixes and documentation updates (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3121 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-01 18:49:39 +00:00
Corey Osgood a04027efca Create a genacpi directory below util/ which will hold all acpi related
code/data generation utilities.

Signed-off-by: Corey Osgood <corey.osgood@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3120 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-01 15:33:03 +00:00
Ronald Hoogenboom 9b6b63eac0 In pci_device.c, the class for VGA was not tested properly, leading to
no VGA output from coreboot, even after the boot-rom was executed
properly (CONFIG_PCI_ROM_RUN) or no boot-rom execution with
CONFIG_VGA_ROM_RUN at all. According to the header file device.h, the
class field of struct device is '3 bytes: (base,sub,prog-if)'.

Signed-off-by: Ronald Hoogenboom <hoogenboom30@zonnet.nl>
Acked-by: Torsten Duwe <duwe@lst.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3119 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-02-28 23:10:38 +00:00
Ward Vandewege 17632a205e Temporarily disable the fan control patch from this morning; it turns out to
stop the CPU fan on the m57sli v1.1 (PLCC) entirely, which is less than
desirable. I did not notice before because my board ran fine for about 15
minutes before the CPU overheated.

Thankfully the board has a good failsafe mode - it just switches off when the
CPU gets too hot, without permanent damage.

I'm debugging this and plan to commit a proper fix later in the week.

This is not really trivial, but the tree is dangerous in the current state so
I'm self-acking.

Signed-off-by: Ward Vandewege <ward@gnu.org>
Acked-by: Ward Vandewege <ward@gnu.org>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3118 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-02-26 04:36:52 +00:00
Ronald Hoogenboom 0be73bbf30 This patch adds support to dump other registers than the primary
pnp-style configuration registers, using the new option -e/--extra-dump.
This patch only adds dumping of the Environmental Controller
configuration registers for the IT8716f chip.

Signed-off-by: Ronald Hoogenboom <hoogenboom30@zonnet.nl>

I (Carl-Daniel) checked the data sheets of the whole IT87[012] series 
and although the environment controller is sometimes called fan 
controller, the location of the register is the same for all models.

Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3117 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-02-25 22:32:41 +00:00
Ronald Hoogenboom 56cf01f29d This patch adds automatic fan control for the CPU fan on the m57sli
board.

This is done via the ec_init routine in a source file in the
mainboard/gigabyte/m57sli directory. A Config variable 'HAVE_FANCTL' has been
added to notify superio.c to get the ec_init externally.

I (Ward) have tested this on the PLCC and the SOIC/SPI version of this board.
It works.

Signed-off-by: Ronald Hoogenboom <hoogenboom30@zonnet.nl>
Acked-by: Ward Vandewege <ward@gnu.org>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3116 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-02-25 19:36:20 +00:00
Ronald Hoogenboom 8684520b94 This trivial patch removes an unused local variable, thus getting rid of
a compiler warning.

Signed-off-by: Ronald Hoogenboom <hoogenboom30@zonnet.nl>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3115 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-02-25 10:15:10 +00:00
Ward Vandewege 0be722c508 The proprietary VGA rom is only 36K on Tyan s2882, not 48K.
Tested on real hardware.

This is a trivial patch.

Signed-off-by: Ward Vandewege <ward@gnu.org>
Acked-by: Ward Vandewege <ward@gnu.org>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3114 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-02-21 21:00:19 +00:00
Corey Osgood bd3f93e330 Add support for the Via CN700 with a C7 CPU and DDR2 RAM. Only a single DIMM is
working for now, and more work is needed for it to be fully dynamic. However,
just about any 128MB-512MB DIMM should work.

Signed-off-by: Corey Osgood <corey.osgood@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3113 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-02-21 00:56:14 +00:00
Yinghai Lu f327d9f954 Route device IRQ through PCI bridge instead in mptable.
Don't enable pin0 for ioapic of io-4.

1. apic error in kernel for MB with mcp55+io55
2. some pcie-cards could have pci bridge there, so need to put entries
   for device under them in mptable.

Signed-off-by: Yinghai Lu <yinghailu@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3112 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-02-20 17:41:38 +00:00
Jonathan A. Kollasch 8eff1e3d04 Initial support for MSI MS-7135 (K8N Neo3) mainboard.
Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3111 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-02-20 15:59:30 +00:00
Mart Raudsepp 787e4c9fd5 flashrom: Add board_enable for Artec Group DBE61 and DBE62
Also add a comment about NULL subsystem IDs leaving the board entry out
of auto-detection logic.

Signed-off-by: Mart Raudsepp <mart.raudsepp@artecdesign.ee>
Acked-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3110 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-02-20 11:11:18 +00:00
Rudolf Marek b05d4bb77e I'm attaching the patch which should fix both problems. Fix the
undefined u8 type and the bitpos selection in currently unused 
pnp_read_enable function.
 
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>

Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3109 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-02-19 20:30:25 +00:00
Rudolf Marek bb6f88d1d4 Should be part of changeset 3106.
This patch introduces virtual LDNs changes for W83627EHF driver. Not only LDN 7 and 9 are
changed, but also a SPI flash interface which has enable on bit1 and not bit0.

Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Stefan Reinauer <stepan@coresystems.de> 



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3108 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-02-18 20:43:09 +00:00
Rudolf Marek bcd28f22f4 Attached patch fixes two typos in the sio_setup routine (comment + wrong exitLDN
device) and sets the chipset voltage from 1.6V to 1.5V.
 
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3107 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-02-18 20:40:02 +00:00
Rudolf Marek 8dcab78164 This patch introduces virtual LDNs changes for W83627EHF driver. Not only LDN 7 and 9 are
changed, but also a SPI flash interface which has enable on bit1 and not bit0.

Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3106 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-02-18 20:37:49 +00:00
Rudolf Marek 0b8af012b6 Use virtual LDNs. It enables the GPIOs correctly (it preserves the GPIO5/2 from a sio_setup. As side effect I can now
have GAME and MIDI portsenabled.

It has been tested with my board. It produces same results.

Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3105 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-02-18 20:35:27 +00:00
Rudolf Marek 623df6763c Some SIO/PNP devices are abusing register 0x30 for multiple LDN enables, like
mine W83627EHF.

This patch introduces a concept of virtual LDN. Each virtual LDN is unique, but
maps to original LDN and bit position in register 0x30.

VirtualLDN = origLDN[7:0] | bitpos[10:8]

Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3104 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-02-18 20:32:46 +00:00
Stefan Reinauer b34eea348c Importing mkelfimage from
ftp://ftp.lnxi.com/pub/mkelfImage/mkelfImage-2.7.tar.gz

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3103 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-02-15 18:16:06 +00:00
Clark Rawlins 46fc14dcc8 With this small change it is possible to build flashrom again when
specifying custom CFLAGS/LDFLAGS from the make command line like:

  make CFLAGS="..." LDFLAGS="..."

I need to do this when building flashrom in a cross compiler environment
like buildroot for a foreign target.

Signed-off-by: Clark Rawlins <clark@bit63.org>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3102 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-02-14 23:22:20 +00:00
Mart Raudsepp 9792a034e4 flashrom: further cleanups to enable_flash_cs5536
- Remove the "enable write to flash" message, as the caller appears to
   already report that.

 - Move the 'modprobe msr' suggestions to the first lseek64 error handling, as
   we get an error there already.

 - Rename a perror string from "read" to "read msr", as we use the latter
   already in this function for another read.

Signed-off-by: Mart Raudsepp <mart.raudsepp@artecdesign.ee>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3101 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-02-11 14:32:45 +00:00
Marc Jones 5eb25bf48f add $(CROSS_COMPILE) to ar calls.
Signed-off-by: Marc Jones <marc.jones@amd.com>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3100 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-02-09 13:06:45 +00:00
Luc Verhaegen 2f7b7fb82a Flashrom: Add board enable for VIA EPIA SP.
Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Corey Osgood <corey.osgood@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3099 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-02-09 02:03:06 +00:00
Mart Raudsepp 2995cc69f7 Improve error handling and make RCONF_DEFAULT_MSR address be a constant.
Also, move a big code comment to the top of enable_flash_cs5536().

Signed-off-by: Mart Raudsepp <mart.raudsepp@artecdesign.ee>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3098 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-02-08 10:10:57 +00:00
Mart Raudsepp 99062ae5ad This implements support for devices using AMD Geode companion chip
CS5536 that have the Boot ROM on NOR flash that is directly connected to
FLASH_CS3 (Boot Flash Chip Select).
We need to write enable it in the NORF_CTL MSR register for flashrom to
be able to write to it, including JEDEC probe commands.

This patch allows us to stop using AMD gx_utils.ko for BIOS flashing on
the DBE61.

Signed-off-by: Mart Raudsepp <mart.raudsepp@artecdesign.ee>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3097 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-02-08 09:59:58 +00:00
Ward Vandewege d2be99c62d Change payload location in 'normal' - this was missed in r3992 and thus breaks buildrom.
This is a trivial patch.

Signed-off-by: Ward Vandewege <ward@gnu.org>
Acked-by: Ward Vandewege <ward@gnu.org>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3096 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-02-07 22:53:53 +00:00
Myles Watson 9b0627a3b2 This is a trivial patch. I missed one of the ROM names when I converted them to coreboot.rom
Signed-off-by: Myles Watson <myles@pel.cs.byu.edu>
Acked-by: Myles Watson <myles@pel.cs.byu.edu>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3095 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-02-07 22:42:22 +00:00
Ward Vandewege 2370fd81b4 Make the check for -fno-stack-protector fail silently, if it fails.
This is a trivial patch.

Signed-off-by: Ward Vandewege <ward@gnu.org>
Acked-by: Ward Vandewege <ward@gnu.org>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3094 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-02-07 21:50:22 +00:00
Myles Watson b8c2aa2ce8 Change references to qemu in Coreboot-v2 calls to qemu-x86.
The patch was followed by these svn commands:

svn mv targets/emulation/qemu-i386/ targets/emulation/qemu-x86
svn mv --force targets/emulation/qemu-i386/ targets/emulation/qemu-x86
svn mv --force src/mainboard/emulation/qemu-i386/
src/mainboard/emulation/qemu-x86
svn mv --force src/cpu/emulation/qemu-i386/ src/cpu/emulation/qemu-x86

Signed-off-by: Myles Watson <myles@pel.cs.byu.edu>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3093 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-02-07 20:37:37 +00:00
Myles Watson f2b380ad85 This patch changes the Config.lb files and adds Config-lab.lb files for
architectures supported by buildrom.

Myles

Signed-off-by: Myles Watson <myles@pel.cs.byu.edu>
Acked-by: Ward Vandewege <ward@gnu.org>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3092 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-02-06 22:33:50 +00:00
Carl-Daniel Hailfinger c23b3a5732 Handle JEDEC JEP106W continuation codes in SPI RDID. Some vendors like
Programmable Micro Corp (PMC) need this.
Both the serial and parallel flash JEDEC detection routines would
benefit from a parity/sanity check of the vendor ID. Will do this later.

Add support for the PMC Pm25LV family of SPI flash chips.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Chris Lingard  <chris@stockwith.co.uk>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3091 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-02-06 22:07:58 +00:00