Commit Graph

5 Commits

Author SHA1 Message Date
Vladimir Serbinenko b32816e9a5 Remove PCI_ROM_RUN option
The main purpose of option rom is to supply int* handlers.
But supplying those is outside of coreboot scope and if someone needs those
they should run SeaBIOS anyway which runs the option roms wonderfully.

Running VGA oprom is kept because they're needed to init graphics.

This patch still keeps the options to include the option roms to make them
available to SeaBIOS.

Change-Id: I646334cf88094d3bf8f527779a68a07e0b4b93ec
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/4545
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-by: Kevin O'Connor <kevin@koconnor.net>
2013-12-24 14:40:49 +01:00
Idwer Vollering d26da9c8f0 Coding style: punctuation cleanup [1/2].
Clean up superfluous line terminators.

Change-Id: If837b4f1b3e7702cbb09ba12f53ed788a8f31386
Signed-off-by: Idwer Vollering <vidwer@gmail.com>
Reviewed-on: http://review.coreboot.org/4562
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Tested-by: build bot (Jenkins)
2013-12-23 02:12:51 +01:00
Duncan Laurie 29f7688409 haswell boards: Use PECI temp sensor id 0
The EC temperature sensors were renumbered and now PECI
is at index 0.

1) boot on falco
2) check /sys/class/thermal/thermal_zone0/temp
3) check 'temps' on ec console

Change-Id: Idde1457c42c80850b5b8ac22781060ed9b224d13
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/61896
Reviewed-on: http://review.coreboot.org/4367
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Tested-by: build bot (Jenkins)
2013-12-21 07:28:30 +01:00
Aaron Durbin 05d065cff5 bolt: make the gpio interrupts edge sensitive
The drivers in the kernel expect the devices using gpios
to generate interrupts to be edge sensitive. Make it so.

Change-Id: I920ef621682d33ba081f737e97f0239f903db2f7
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/61678
Reviewed-by: Stefan Reinauer <reinauer@google.com>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: http://review.coreboot.org/4361
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Tested-by: build bot (Jenkins)
2013-12-21 07:28:04 +01:00
Duncan Laurie 3ece50d9db bolt: Initial mainboard commit
BUG=chrome-os-partner:20448
BRANCH=none
TEST=emerge-bolt chromeos-coreboot-bolt

Change-Id: I634a755ac7659e7a977b51bcc061f69eb8263810
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/59843
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/4330
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-12-12 22:12:09 +01:00