Commit Graph

2553 Commits

Author SHA1 Message Date
Stefan Reinauer a12eb6a7e5 add support for 2 new SMSC superio chips. Information is a bit ambiguous
and scattered within the datasheets. (trivial patch)

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3428 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-07-19 14:07:35 +00:00
Uwe Hermann 941aaee885 Random coding style fixes and simplifications (trivial).
This will even reduce the final payload size a bit.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3427 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-07-18 14:08:18 +00:00
Marc Jones eafceddf6c Add manual HT BUID fixup to detect previously set BUIDs in early init. This fixes the non-coherent(sb) link running at default speed.
Fix HT event notify to output useful information.

Signed-off-by: Marc Jones <marc.jones@amd.com>

Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3426 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-07-17 19:54:06 +00:00
Marc Jones 212486e9f6 Clean up AMD FAM10 HT variable initialization. The structure init is cleaner, avoid compiler warnings, and matches the AMD example code more closely.
Signed-off-by: Marc Jones <marc.jones@amd.com>

Acked-by: Peter Stuge <peter@stuge.se>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3425 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-07-17 19:50:37 +00:00
Marc Jones 2df291574d Add Fam10 Gart table walk enable for MCA reporting to match AMD example code.
Signed-off-by: Marc Jones <marc.jones@amd.com>

Acked-by: Peter Stuge <peter@stuge.se>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3424 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-07-17 19:44:08 +00:00
Marc Jones aee0796506 Clean up comments, whitespace, and copyright date in the AMD HT code.
Signed-off-by: Marc Jones <marc.jones@amd.com>
Acked-by: Marc Jones <marc.jones@amd.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3423 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-07-16 21:09:31 +00:00
Uwe Hermann 049814cc8f Add missing Intel CPU (trivial).
Tested by me on actual hardware.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3422 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-07-15 13:22:21 +00:00
Marc Jones 2c39c4c5a9 There was a programming error which made most USB port4 setup wrong. This patch uses byte pointer and the MMIO read and write functions.
Signed-off-by: Marc Jones <marc.jones@amd.com>

Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3421 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-07-12 00:03:26 +00:00
Carl-Daniel Hailfinger 2f45e770d7 Fix and clean up coreboot image detection heuristic.
Additional compile fix for NetBSD.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3420 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-07-11 00:06:38 +00:00
Uwe Hermann 2fbbb29e54 Add a coreinfo module which can hexdump arbitrary RAM regions and
allows you to scroll through the RAM contents.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3419 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-07-08 16:18:38 +00:00
Peter Stuge a4793182e8 flashrom: Trivial SPI cleanups
While writing a new SPI driver I fixed some things in the SPI code:
All calls to spi_command() had unneccessary #define duplications, and in some
cases the read count define could theoretically become harmful because NULL was
passed for the read buffer. Avoid a crash, should someone change the #defines.

I also noticed that the only caller of spi_page_program() was the it87 driver,
and spi_page_program() could only call back into the it87 driver. Removed the
function for easier-to-follow code and made it8716f_spi_page_program() static.
The ichspi driver's static page functions are already static.

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3418 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-07-07 06:38:51 +00:00
Peter Stuge 5dc95de5e6 flashrom: Trivial indent fix in ichspi.c
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3417 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-07-07 05:14:06 +00:00
Carl-Daniel Hailfinger 5bc95858d5 r3415 removed symbolic constants for device IDs by accident.
flash.h is a database of known IDs, whereas flashchips.c is a database
of chips for which support has been implemented. Keep it that way.

Trivial.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3416 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-07-06 23:04:01 +00:00
Andreas Thienemann ce17f6bdb0 flashrom: Add AMIC A29002
This patch adds support to the AMIC A29002 chip in its top and bottom
configuration to flashrom. Additionally, the alphabetic order of the
AMIC chips was fixed.

The datasheet is at <http://www.amictechnology.com/pdf/A29002.pdf>.

A29002T PREW functionality was tested and works.

This flash chip has asymmetric sector layout so it is important to use the
mx29f002 driver, which does chip erase before writing, rather than am29f040b,
which uses sector erase.

Signed-off-by: Andreas Thienemann <andreas@bawue.net>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3415 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-07-06 17:35:30 +00:00
Stefan Reinauer 3c75baea46 Adding support for flashing system with Nvidia MCP67
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3414 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-07-05 09:48:30 +00:00
Peter Stuge e9dcb8931e flashrom: Add PCI IDs for EPIA-CN
Uses the 0.0 Host bridge CN700/VN800/P4M800CE/Pro and 11.0 ISA bridge devices
with their 1106:aa08 subsystem id:s for autodetection.

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3413 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-07-05 04:12:37 +00:00
Uwe Hermann 1a20cdec2c Minor cosmetics, e.g. make stuff fit in 80 chars/line etc. (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3412 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-07-03 19:26:44 +00:00
Carl-Daniel Hailfinger 3244b984e2 Mark SST49LF040B as tested.
Thanks to Paul Seidler and Ward Vandewege for testing.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3411 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-07-03 19:08:52 +00:00
Uwe Hermann 4321f8be6e Mark the SST SST49LF040 as OK (tested by me), all operations (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3410 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-07-03 18:58:58 +00:00
Peter Stuge 8fe1a42e7d flashrom: Winbond W25x80 TEST_OK PROBE READ ERASE WRITE
Per test report from Björn Gerhart. Thanks!

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3409 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-07-03 16:54:05 +00:00
Carl-Daniel Hailfinger 039b848066 Improve coreboot image detection heuristic in flashrom. It's not
absolutely perfect, but the likelihood of this check to fail is
0.000000000000000000000000013 (1.3*10^-26) which is good enough for me.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de> 


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3408 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-07-03 14:40:06 +00:00
Peter Stuge f74c208256 flashrom: probe_flash() cleanup for better code readability
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3407 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-07-02 17:15:47 +00:00
Stefan Reinauer cac7286c0b set w39v080fa to fully supported. I'm am flashing this chip several times a
day.
Also enable unlocking which is only needed when running coreboot, that slipped
in the original commit and through the original review ;-) So it must be
trivial enough.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3406 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-07-02 13:33:09 +00:00
Peter Stuge c3c4472bd1 flashrom: Update to TEST_OK for Winbond W39V040FA PROBE READ
Thanks to Jake for the test report!

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3405 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-07-02 03:07:46 +00:00
Peter Stuge 1ae669771c flashrom: Don't rm *~ in make clean, who knows what files that could be
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3404 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-07-02 03:03:58 +00:00
Peter Stuge 39a582569a flashrom: Unknown vendor:board message can be triggered by -m too
Thanks to Stefan for pointing this one out.

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3403 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-07-02 00:59:29 +00:00
Peter Stuge 12224acb6f flashrom: Case insensitive matching of vendor:board strings in coreboot table
Needed at least for GIGABYTE:m57sli in coreboot to match gigabyte:m57sli in
flashrom.

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3402 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-07-02 00:47:30 +00:00
Stefan Reinauer d9b7ae8bec First attempt to clean up SPI probing and create a common
construct: the flash bus.

At some point the flash bus will be part of struct flashchip.

Pardon me for pushing this in, but I think it is important to beware of further
decay and it will improve things for other developers in the short run.

Carl-Daniel, I will consider your suggestions in another patch. I want to keep
things from getting too much for now. The patch includes Rudolf's VIA SPI
changes though.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3401 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-06-30 23:45:22 +00:00
Rudolf Marek e16d43c041 Mine AMIC flash chip needs 4 bytes RDID. This enables to use the new probing code.
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3400 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-06-30 21:48:54 +00:00
Rudolf Marek d8a7e7d043 Mine AMIC flash chip needs 4 bytes RDID. Following patch adds support for that.
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3399 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-06-30 21:45:17 +00:00
Rudolf Marek 4a17e02003 This patch adds support for VIA SPI controller on VT8237S. It is similar with
few documented exceptions to ICH7 SPI controller.

Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3398 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-06-30 21:38:30 +00:00
Carl-Daniel Hailfinger 7b425c1c11 Add a debug marker after ICH SPI opcode programming.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3397 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-06-29 10:57:13 +00:00
Patrick Georgi c2e8fd42b0 Adds a field to the serial port descriptor about the configured line speed.
Signed-Off-By: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3396 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-06-29 06:41:12 +00:00
Peter Stuge 891f1a2650 flashrom: Fix ICH7 non-SPI that broke in r3393
r3393 assumed that ICH7 always used SPI. This patch resets ich7_detected back
to 0 when BOOT BIOS Straps indicate something else than SPI.

Also fixes a build error in ichspi.c with gcc 4.2.2.

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3395 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-06-29 01:30:41 +00:00
Carl-Daniel Hailfinger 50e4a095dd Use symbolic constants for PCI subsystem probing in flashrom.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3394 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-06-28 23:02:22 +00:00
Stefan Reinauer a1dd9142c6 * ICH7 SPI support
* fix some variable names in ichspi.c (Offset -> offset)
* Dump ICH7 SPI bar with -V
* Improve error message in case IOPL goes wrong. (It might not even be an IOPL)

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3393 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-06-27 16:28:34 +00:00
Stefan Reinauer 20e0599e69 indent according to development guidelines (trivial)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3392 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-06-27 15:18:20 +00:00
Uwe Hermann 98f32bf8ef Initial support for the A-Trend ATC-6240 board.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3391 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-06-26 19:42:25 +00:00
Jens Kühnel 8613d628d5 Winbond W39V080FA: Probe and Read are OK.
Signed-off-by: Jens Kühnel <coreboot@jens.kuehnel.org>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3390 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-06-26 11:57:27 +00:00
Peter Stuge d1cd7bc054 flashrom: Test status OK for ST M50FW040 PROBE READ
Per test report from Alex Perez. Thanks Alex!

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3389 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-06-24 08:18:13 +00:00
Peter Stuge dc64a270be flashrom: Test status OK for Macronix MX25L8005 PROBE READ ERASE WRITE
Per test report from Andrew Paprocki. Thanks Andrew!

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3388 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-06-24 04:17:14 +00:00
Peter Stuge 0667afd294 flashrom: Increase delay in probe_jedec() after Product ID Entry to 10ms
We should follow data sheet timing, even if chips have been tested to answer
faster in the field.

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3387 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-06-24 02:09:09 +00:00
Peter Stuge 606a207d9b flashrom: Slight restructure of SPI probe_ functions
Preparation for a probe optimization patch. This patch does not change any
functionality. spi_probe_rdid was tested to still work on my M57SLI rev 2.

The idea is to have error checks return error immediately when something
fails, rather than having code inside an if block where the condition
tests for success.

This means: Less indentation, more clear what the code is checking.

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Ward Vandewege <ward@gnu.org>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3386 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-06-24 01:22:03 +00:00
Uwe Hermann 12afdd82ac Some flashrom documentation fixes, and removal of duplicated info (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3385 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-06-22 18:50:25 +00:00
Peter Stuge 6f78cd6eba flashrom: A few changes were committed before the DoC remove, update README.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3384 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-06-22 17:54:03 +00:00
Stefan Reinauer 8b835974cd as per Peter's suggestion. clean binary in make clean
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3383 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-06-22 17:15:03 +00:00
Peter Stuge b05b6a2555 flashrom: Remove dead M-Systems Disk on Chip code
DOC support has been disabled by default for many years. The write function
does nothing but print text. It has a call to write_page_md2802() commented
out, but that function does not exist. This is dead code with ugly #ifdefs.

Updates README to reflect that there was a time when there was code, but it
didn't work. Removes M-Systems #defines and also includes svn rm msys_doc.*

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3382 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-06-22 17:06:41 +00:00
Ronald Hoogenboom fb73fa1bcb Enable hardware fan control for m57sli.
Tested on v1 and v2 of the board.

Signed-off-by: Ronald Hoogenboom <hoogenboom30@zonnet.nl>
Signed-off-by: Ward Vandewege <ward@gnu.org>
Acked-by: Ronald Hoogenboom <hoogenboom30@zonnet.nl>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3381 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-06-22 14:33:17 +00:00
Joseph Smith 14669ae023 This patch allows support for multiple so-dimms, single or double sided.
Signed-off-by: Joseph Smith <joe@settoplinux.org>
Acked-by: Peter Stuge <peter@stuge.se>

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3380 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-06-22 04:22:46 +00:00
Peter Stuge 67939dc75f flashrom: Update test status to TEST_OK_PREW for ST M50FLW080A and SST49LF008A
Many thanks to Julio Cesar Costa for the test report!

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3379 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-06-22 02:04:49 +00:00