Commit Graph

4361 Commits

Author SHA1 Message Date
Stefan Reinauer b8a89da213 These lines slipped in. Sorry for the inconvenience.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5068 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-30 10:58:30 +00:00
Stefan Reinauer c2ef1463b6 ifeq wants a space before the (
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5067 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-30 10:50:57 +00:00
Stefan Reinauer 68003b8d14 add Kbuild support to abuild and enable it per default;
use -o/--oldconfig to get the old behavior (and use that 
option in kbuildall to get the old config)

I changed the qa.coreboot.org autobuild system to use -o
for now so we get build reports from the old and new config,
still.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Myles Watson <mylesgw@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5066 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-30 10:44:28 +00:00
Stefan Reinauer e37785791a * fix crt0s/ldscripts paths to fix out of tree build.
* fix iasl output directory for i945 boards (patch
  for moving it to the mainboard directory will follow)
* coreboot_table.c: lb_mainboard can be static
* coreboot_table.c: dump memory table in debug and spew mode
* fix a warning in bootblock.c
* don't include arch/i386/init in arch/i386/Makefile.inc
* announce generation of crt0_includes.h
* allow overriding $(obj)
* drop unused src_types from Makefile
* correctly use hostname -s instead of hostname for COMPILE_HOST

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Myles Watson <mylesgw@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5065 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-30 09:47:18 +00:00
Joseph Smith 89e45773a9 RCA RM4100 and Thomson IP1000 auto.c rework.
Signed-off-by: Joseph Smith <joe@settoplinux.org>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5064 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-29 19:15:10 +00:00
Patrick Georgi 6bba29f84a Add the BSD-licensed getopt tool to crossgcc, to use
if there's no native getopt around.

Use $PATCH instead of the hardcoded "patch" for patching
files (after we already looked it up)

Ignore various temporary files via svn:ignore

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5063 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-29 17:40:52 +00:00
Patrick Georgi cccbb898e2 Make $(obj)/build.h an explicit dependency for all
object files, as it's dragged into the build by
-include $(obj)/build.h for pretty much everything.

Also, generate build.h atomically.

This fixes parallel build with kconfig on my box.

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5062 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-29 17:38:57 +00:00
Uwe Hermann 24ddfd4b7d Fix manual build of the ASUS A8N-E (trivial).
Without this patch the manual newconfig (not kconfig) build would fail with:

  #error "CONFIG_XIP_ROM_BASE is not a multiple of CONFIG_XIP_ROM_SIZE"

I tested an image on hardware, it starts booting now, but doesn't fully
succeed as there are other issues (I'm investigating).

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5061 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-28 22:25:49 +00:00
Patrick Georgi d9d5e345c0 reformat Kconfig file, too.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5060 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-27 19:55:01 +00:00
Edwin Beasant 4355beb893 Add the MSR writes that are needed to provide VGA legacy routing for the Geode LX
Add appropriate Kconfig defines to provide 8mb of VGA ram allocation
Add the Kconfig defines to cover TSC calibration from TIMER2 and UDELAY setup
Two small warning removals about excessive prototyping.

Signed-off-by: Edwin Beasant <edwin_beasant@virtensys.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5059 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-27 19:20:29 +00:00
Edwin Beasant 87d0c542b6 Change memory map of geode lx: 768kb-systop is a
single range.
This change allows both seabios and filo to boot
linux successfully (which was confused before)

Signed-off-by: Edwin Beasant <edwin_beasant@virtensys.com>
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5058 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-27 18:19:33 +00:00
Edwin Beasant 47afa44a9f Mark c0000-fffff as usable on geode-lx. SeaBIOS needs it.
a0000-bffff might be usable as well, but it won't hurt to
keep that range excluded.

Signed-off-by: Edwin Beasant <edwin_beasant@virtensys.com>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5057 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-26 15:34:15 +00:00
Stefan Reinauer c6d3ff6cdd use stdint types for structures, and don't use pointers
for fields defined 32bit in the multi processor specification.

Also, fix lots of trivial warnings in the code.

If you ever wondered, why you get odd or wrong mp tables on your x64
system: It's not because bios vendors neglected mp tables; it's because
we neglected 64bit systems. ;-)

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5056 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-26 14:09:30 +00:00
Edwin Beasant a9796ed362 - Clean up and comment writing of MSRs for cache control (Backport from v3)
- Invalidate Cache Tags (by means of in-place rewrite of cache data) which allows CAR data to be flushed to RAM
- Re-enable cache after flush of CAR to RAM


Signed-off-by: Edwin Beasant <edwin_beasant@virtensys.com>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5055 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-26 11:22:43 +00:00
Patrick Georgi e8d943f266 Fix ACPI build on a couple of boards (now that it's active)
Fix timer handling on amd/sc520 systems
Match UDELAY_* configuration of newconfig in Kconfig

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5054 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-25 15:17:11 +00:00
Stefan Reinauer 3e4a0b87c8 This code was copied from amdk8 and never really made usable.
It's supposed to be a userspace regression test for ram init, but
in fact, it doesn't even execute ram init. This was suggested by
Carl-Daniel on 2009-08-27
Thus, dropping it.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5053 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-25 13:15:17 +00:00
Patrick Georgi 2b962a3c39 More Kconfig changes to improve match with newconfig:
DIMM_SUPPORT
APIC_ID_OFFSET
ACPI_SSDTX_NUM
IRQ_SLOT_COUNT
MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
	(except msi/ms9185)
MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
MEM_TRAIN_SEQ
HAVE_ACPI_RESUME

Also remove MMX (kconfig specific) and HAVE_MOVNTI and IOAPIC
(which we deliberately differ in kconfig) from compareboard
report.

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5052 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-25 10:50:21 +00:00
Patrick Georgi 29647d97c5 Align several kconfig options to match newconfig:
HT_CHAIN_UNITID_BASE
HT_CHAIN_END_UNITID_BASE
SB_HT_CHAIN_ON_BUS0
SB_HT_CHAIN_UNITID_OFFSET_ONLY
MAX_CPUS
MAX_PHYSICAL_CPUS
ROM_SIZE
TSC_X86RDTSC_CALIBRATE_WITH_TIMER2

Also hook up asus/p2b-ds

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5051 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-25 07:56:01 +00:00
Uwe Hermann 480b37f8e9 Document CONFIG_PCI usage in the README (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5050 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-24 17:29:38 +00:00
Uwe Hermann 2ca94910d8 Update list of superiotool contributors to r5048 (trivial).
The list is mostly generated by grepping for Signed-off-by in 'svn log'.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5049 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-24 17:15:25 +00:00
Uwe Hermann 622fb793e5 Add missing files from the last commit (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5048 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-24 01:47:58 +00:00
Carl-Daniel Hailfinger bb38f3213b Add VIA VT82C686A/VT82C686B detection support to superiotool.
This adds an additional requirement to superiotool: libpci.
The PCI code is conditional on PCI_SUPPORT. You can set the
CONFIG_PCI variable in the Makefile to 'no' to disable it.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5047 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-24 01:40:46 +00:00
David Bartley 5142dcd530 Add detection support for the Winbond W83667HG Super I/O.
$ sudo ./superiotool
superiotool r4931
Found Winbond W83667HG (id=0xa5, rev=0x13) at 0x2e

Details: http://lists.lm-sensors.org/pipermail/lm-sensors/2008-July/023683.html

Signed-off-by: David Bartley <dtbartle@csclub.uwaterloo.ca>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5046 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-23 21:51:10 +00:00
Anders Juel Jensen b850eb8e47 Add detection support for ITE IT8510E/TE/G and IT8511E/TE/G.
Signed-off-by: Anders Juel Jensen <andersjjensen@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5045 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-23 15:50:12 +00:00
Stefan Reinauer 16f515adfc These two files accidently got a wrong license header.
Clarified with the authors

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>
Acked-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Harald Gutmann <harald.gutmann@gmx.net>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5044 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-20 18:44:30 +00:00
Stefan Reinauer 762a230dc0 Kontron 986LCD-M MP table:
When any of the onboard network cards are disabled, the bus numbers change 
and thus PCI devices in the riser wouldn't get their interrupts right if a
kernel without ACPI support is booted. This patch dynamically creates the 
correct bus numbers for the firewire and riser card entries

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5043 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-19 21:15:37 +00:00
Stefan Reinauer c6f2bd0d69 Add Yabel support (int 15 5fXX callbacks for vga bios) on the kontron 986lcd-m
so it's possible to use the LCD panel connector. Values are hard coded instead
of read from CMOS but it's a start.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5042 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-19 21:15:01 +00:00
Stefan Reinauer 775a766462 dev->rom_address was dropped a while ago which broke yabel. This patch fixes it
again.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5041 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-19 21:14:24 +00:00
Stefan Reinauer 8ed1b6d2dc drop COREBOOT_V2 and COREBOOT_V4 define. We're not sharing code with v3
anymore so this ugly hack is no longer needed.
 
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5040 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-19 21:13:44 +00:00
Patrick Georgi d5663bac2c Move all IOAPIC selection to southbridges, and remove them
from mainboards.
Some adaptations were necessary after the IOAPIC cleanup,
so this should fix the build.

Fix intel/d945gclf build, which was missing some ACPI component.

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5039 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-18 17:30:36 +00:00
Stefan Reinauer 2e97383b54 run preprocessor on DSDT of D945GCLF, otherwise
smart iasl will segfault.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5038 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-18 15:08:14 +00:00
Stefan Reinauer 6acc0a1795 ncurses is only a requirement for make menuconfig, not for Kconfig in general.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5037 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-18 12:01:10 +00:00
Stefan Reinauer 81d5b0ca30 add ncurses to list of requirements
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5036 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-18 11:10:03 +00:00
Stefan Reinauer 29c0ec10a6 get rid of Kconfig warning.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5035 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-18 11:09:24 +00:00
Paul Menzel 85bb83aeaf msrtool: Fix typo
Trivial!

Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Acked-by: Peter Stuge <peter@stuge.se>

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5034 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-17 21:59:27 +00:00
Peter Stuge cba6169515 msrtool: Read both MSR values from file in diff mode
Previously, msrtool would assume that MSR values should be compared
between stored value in file and current value in hardware which msrtool
was running on. This does not always fit the use case and with this
change msrtool can now compare two sets of MSR values stored in a file.
If only one MSR value is stored in the file, msrtool will behave as
before, and read the second MSR value from hardware.

This change means that msrtool does not always need access to the system
MSR functions so it can now be run as a regular user when using diff
mode with both MSR values stored in the file.

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5033 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-17 18:34:00 +00:00
Peter Stuge 34f2907a1b msrtool: Add endptr to str2msr() showing how many characters were parsed
This also introduces a small change in the user interface for immediate
mode (-i). Previously, whitespace could separate high and low words in
an MSR as such:

msrtool -i 4c00000f='f2f100ff 56960004'

That is no longer allowed, a space character now ends the MSR value. Any
other character can still be used as separator however, so the following
syntax still works as expected:

msrtool -i 4c00000f=f2f100ff:56960004

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5032 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-17 18:33:53 +00:00
Stefan Reinauer 838c5a5d80 Add support for the Roda RK886EX a.k.a Rocky III+ ruggedised notebook
http://www.roda-computer.com/en/products/notebooks/rocky-iii-rk886ex.html

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5031 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-17 14:08:17 +00:00
Stefan Reinauer f6eb88adfb Initial PCIe tuning: Enable Active State Power Management (ASPM)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5030 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-17 13:54:08 +00:00
Stefan Reinauer 2e73e19751 Add support for the Texas Instruments Cardbus+Firewire bridge TI PCI7420
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5029 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-17 13:52:50 +00:00
Stefan Reinauer f00052afbf Add support for Renesas M3885x Embedded Controller
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5028 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-17 13:51:48 +00:00
Stefan Reinauer 55426dfd57 Add support for the SMSC LPC47n227 SuperI/O chip
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5027 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-17 13:50:17 +00:00
Stefan Reinauer 7a3d095213 ICH7 update
* change the code to use macros names instead of constants in many places
* SMI/ACPI: rework power-off code to work with old Linux kernels (2.6.12.x)
* SMI: Add support for mainboard GPI handler
* SMI: immediate power-off on power button press, if OSPM is not active
* Add fix for some USB errata
* Some register tweaks for mobile systems
* Enable configure SCI on interrupt 9 correctly.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5026 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-17 13:49:07 +00:00
Stefan Reinauer 24b4df5f99 Support a few more i945 variants. With this framework in place it should
be possible to support i955 and i975 relatively easy, too.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5025 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-17 13:47:35 +00:00
Peter Stuge e6cf7c0d4f msrtool: More trivial rearrangement
Rename some variables
Remove the 'found' variable which turns out not to be needed anyway

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5024 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-16 18:39:35 +00:00
Stefan Reinauer 0401bd89b6 coreboot has 13 instances of IOAPIC setup distributed across a lot
of components. This patch is a rewrite of the generic IOAPIC setup code.
Additionally it drops the other 12 instances of IOAPIC setup code and
makes the components use the generic code.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5023 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-16 18:31:34 +00:00
Stefan Reinauer 9fe4d797a3 coreboot used to have two different "APIs" for memory accesses:
read32(unsigned long addr) vs readl(void *addr)
and
write32(unsigned long addr, uint32_t value) vs writel(uint32_t value, void *addr)

read32 was only available in __PRE_RAM__ stage, while readl was used in stage2.
Some unclean implementations then made readl available to __PRE_RAM__ too which
results in really messy includes and code.

This patch fixes all code to use the read32/write32 variant, so that we can
remove readl/writel in another patch.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5022 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-16 17:53:38 +00:00
Stefan Reinauer 984e0f3a0c ectool: Support for dumping EC "index ram"
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5021 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-16 17:50:55 +00:00
Peter Stuge 350ca4a94f msrtool: Remove indent by using continue inside for() to avoid an if block
The only actual code change is from
if (.. >= 1) {
}
to
if (.. < 1)
	continue
so this is pretty trivial.

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5020 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-16 17:21:17 +00:00
Stefan Reinauer 6ade161442 Update reference toolchain to
gcc 4.4.2
binutils 2.20
gdb 7.0

and add mingw support.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5019 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-16 16:44:20 +00:00