Be consistend with coding style at least within a function -- don't mix
sizeof with plain values.
Change-Id: Iefb5b7fe4f54977f5505fc9cea65c9c4af3e7f3a
Signed-off-by: Mathias Krause <mathias.krause@secunet.com>
Reviewed-on: http://review.coreboot.org/617
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
We don't use bitfields anymore.
Change-Id: I25ceec2024f659612871bcfe5f98df3a10789055
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/595
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marcj303@gmail.com>
EHCI port status reporting isn't very consistent on power-on,
so just looking for devices on all ports is the safest way to
find everything.
Change-Id: I26b4305016f0bed1d2c1b5cffc59d5813fa1cbbb
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/594
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marcj303@gmail.com>
When converting EHCI to not use bitfields, two offsets were converted
incorrectly.
Change-Id: I0bb4bad0eee42e54ad4fd53d6c35b107e227c41a
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/593
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marcj303@gmail.com>
Provide functions that pick the first CMOS variable defined
in the cmos layout, and from there, the next one.
Change-Id: Ie98146de7f6273089fc6fc0b232a4b94337cf8a3
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/587
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
options_checksum_valid can be used as a fast test to
identify invalid CMOS data by checking the checksum.
Change-Id: I44635d4c5d389579ad82435907ba8658e1bd44bb
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/586
Reviewed-by: Bernhard Urban <lewurm@gmail.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Add new functions that allow using string based key/value access to
CMOS, including support for enums.
Change-Id: Ibe238eff4c5230e5f61004c88221cd34393873aa
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/585
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Provide access to CMOS images in RAM or CBFS, such as cmos.defaults
Change-Id: Ifa70dea6206d94c0c271caf9ae1152fc76b5d51a
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/584
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
This will allow using libpayload functions to access CMOS data in
template files in RAM or CBFS.
Change-Id: I323ed625e657cbdc1fae8c279a82ee578e83ad00
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/583
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Two new functions allow switching the CBFS functions from using RAM
or ROM, with ROM as default.
Change-Id: I04d67ad622d25c5728ae9a63f5b8a3dc9bbacce6
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/550
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
We agreed that bitfields are a Bad Idea[tm].
Change-Id: If4c4cb748af340e2721b89fea8e035da0632971f
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/480
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Peter Stuge <peter@stuge.se>
We agreed that bitfields are a Bad Idea[tm].
Change-Id: I1b2bcda28c52ad10bbe9429e04d126b555f7828a
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/478
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Peter Stuge <peter@stuge.se>
We agreed that bitfields are a Bad Idea[tm].
Change-Id: Ic04f151091c359912835b8b3db488d2d41bd4bbb
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/479
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Peter Stuge <peter@stuge.se>
Instead of macros to access MAINBOARD record, use convenience functions.
Store pointers to MAINBOARD and HEADER for use outside of CB code.
Change-Id: I074e3a0df7d25726cbd942538bfdc5a63dd17e12
Signed-off-by: Philip Prindeville <philipp@redfish-solutions.com>
Reviewed-on: http://review.coreboot.org/502
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
The return status of get_coreboot_info() might be handy to a platform
driver calling lib_get_sysinfo() to test for the presence of coreboot.
Change-Id: I0176c93ee92c9dff733112026ee50f2ca797bdff
Signed-off-by: Philip Prindeville <philipp@redfish-solutions.com>
Reviewed-on: http://review.coreboot.org/503
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
MEM_RANGE_PTR() also needs to return a pointer to untyped memory.
Change-Id: I0ec64ad7bdb136d5e1a999bff3df6fa66eb29bf1
Signed-off-by: Philip Prindeville <philipp@redfish-solutions.com>
Reviewed-on: http://review.coreboot.org/500
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
When processing FORWARD records, we weren't accounting for the pointer
being in the physical address space and not the virtual space instead.
Change-Id: I35ef637fbec7886d4cfeac5fd650a17eae8d555a
Signed-off-by: Philip Prindeville <philipp@redfish-solutions.com>
Reviewed-on: http://review.coreboot.org/499
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
To avoid unnecessary casts, we can use untyped pointers when accessing
individual records.
Change-Id: I1d628d6e25f1e53b4fee34e7c2c4688a789c45a3
Signed-off-by: Philip Prindeville <philipp@redfish-solutions.com>
Reviewed-on: http://review.coreboot.org/498
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
That coreboot uses the IP checksum is an artifact, not a deliberate
requirement to be compatible with the Internet Protocole suite. Use
a wrapper to abstract the computation of coreboot's checksum.
Change-Id: I6491b9ba5efb9ffe5cb12a6172653a6ac80a1370
Signed-off-by: Philip Prindeville <philipp@redfish-solutions.com>
Reviewed-on: http://review.coreboot.org/497
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Having submitted a module based on coreboot to LKML for acceptance,
it was requested that fewer macros and more inlines be used (because
of their superior type-checking when performing pointer casts, etc).
This is the first of several changes to make the relevant parts of
coreboot comply to linux code standards.
Change-Id: Iffe7061fa62fa639e0cb6ccb9125eb3403d06b1a
Signed-off-by: Philip Prindeville <philipp@redfish-solutions.com>
Reviewed-on: http://review.coreboot.org/495
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Linking fails when using -Wl,--as-needed and/or esp. when forcing --as-needed
through a compiler specs file.
A proper compile/link command would look like: $(CC) $(CFLAGS) $(LDFLAGS) -o foo
$(OBJS) $(LIBS). So the *FLAGS must be passed *before* the objects while the
libraries/dependencies must be passed *after* the objects.
For more details see: http://www.gentoo.org/proj/en/qa/asneeded.xml
Change-Id: I5a5b05e1cab8a2d88ce56c92d9b2f991ca1ee6c0
Signed-off-by: Christian Ruppert <idl0r@qasl.de>
Reviewed-on: http://review.coreboot.org/494
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
It allows to change CMOS values from payloads
Change-Id: I4872fc27476923adafe13504126235b92b30de85
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/445
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
PDcurses wants set_blink to determine color count. Not exactly
obvious.
Change-Id: I8b2a32f0095d5900fa7e01f04f3f1d565dc2bedf
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/432
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
The PS/2 keyboard driver set and reset the caps LED to show the
keyboard status. Unfortunately, that configuration happens over
the same path used to transmit keypresses.
In face of certain error conditions, the keyboard stopped working.
This change makes keyboard handling more robust.
Change-Id: I0489a9983ea7dab00357220e09398dd1a8538839
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/430
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
So far it was empty and never published. It now exists and shuts down
all controllers (esp. EHCI which resets the port routers).
Change-Id: I81e355e8a05778d6397675417b085a094a6f48ee
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/397
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
EHCI can take over all ports (and then reroute devices to
companion controllers if needs be). We do that, and then never
reset it.
Consequence:
Systems with only USB1 HC drivers (OHCI/UHCI) never see any devices.
Change-Id: If1d91e9142a6618289b0b3f6b56587ec857158e3
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/396
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
We have fatal(), which is just as good.
Coccinelle script:
@@
expression E;
@@
-usb_fatal(E)
+fatal(E)
Change-Id: Iabecbcc7d068cc0f82687bf51d89c2626642cd86
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/395
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
The USB stack is pretty noisy. Reduce the output to a sane level.
Change-Id: I250949e5cf74a8c6d43822b2e7487143b2ae1c65
Signed-off-by: Mathias Krause <mathias.krause@secunet.com>
Reviewed-on: http://review.coreboot.org/393
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
OHCI works when USB_DEBUG is disabled, but not, when disabled.
This is because the controller requires some more time after a
schedule has finished.
Also improve compliance with the OHCI spec.
Change-Id: I4685cc485ff9c52b489fbaa352ab889671cff876
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/365
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
The frequency for the PC speaker has to be specified as
1193180 / frequency according to http://wiki.osdev.org/PC_Speaker
Change-Id: Iaca9d45807e080efe834611e719b350680b5fb90
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/337
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Add information about memory mapped/io mapped base addresses.
and fix up libpayload to use the same structures
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Change-Id: I5f7b5eda6063261b9acb7a46310172d4a5471dfb
Reviewed-on: http://review.coreboot.org/261
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Time for the brown paper bag: OHCI controllers are not happy when
told to send data, but with obviously wrong addresses. It helps
to write the addresses into the data structures.
Change-Id: Ic0967dc8939e64af119cfb89400a045a2c077171
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/306
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Doing a call before the payload has set up its stack is risky. The stack may
not be in a favorable location. Normally this is not an issue with coreboot
or other well behaved callers.
Change-Id: Ie6f6748a471324b29ebad045c807dfc9f4b92034
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: http://review.coreboot.org/240
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This function allows reading the nvram configuration table from
locations other than the cbtable.
Change-Id: I56c9973a9ea45ad7bf0185b70d11c9ce5d0e0e1b
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/213
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marcj303@gmail.com>
Keep in sync with coreboot's version.
Change-Id: I8a253446bd3b2ce9d05c6076a3f49f0260ecd5f9
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/158
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
libpci defines an arbitrary set of PCI vendor IDs, flashrom uses the
Intel definition. Add it.
flashrom also requires inttypes.h, so add the OpenBSD version
Change-Id: I9bffd8193f635c375ac4d6b6eae8d3d876b95f5f
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/154
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Some gcc versions seem to honor volatile at different places in a
struct declaration.
Change-Id: I0df2a3fb2eff4cee8cc1b8ac15d9cd9b86178752
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/155
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marcj303@gmail.com>
Add cbfs core from coreboot into libpayload, and to support lzma decode,
add coreboot's lzma code, too. Carl-Daniel agreed to relicense the
lzmadecode wrapper as BSD-l, solving licensing problems.
Change-Id: Id28990fe7e951d99447e265a4880d70a8f208dd2
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/115
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Marc Jones <marcj303@gmail.com>
PDCurses provides an alternative implementation of the curses library
standard in addition to tinycurses.
Where tinycurses is really tiny, PDCurses is more complete and provides
virtually unlimited windows and the full API.
The PDCurses code is brought in "vanilla", with all local changes
residing in curses/pdcurses-backend/
In addition to a curses library, this change also provides libpanel (as
part of the PDCurses code), and libform and libmenu which were derived
from ncurses-5.9.
As they rely on ncurses internals (and PDCurses is not ncurses), more
changes were required for these libraries to work.
The build system is extended to install the right set of header files
depending on the selected curses implementation.
Change-Id: I9e5b920f94b6510da01da2f656196a993170d1c5
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/106
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marcj303@gmail.com>
If you would try download FILO via svn, then you probably
get error message about libpayload install. This enables
manually installing libpayload in legacy style :)
Change-Id: I9f52be939303c5913611f21477d681e11d286382
Signed-off-by: Tadas Slotkus <devtadas@gmail.com>
Reviewed-on: http://review.coreboot.org/102
Tested-by: build bot (Jenkins)
Reviewed-by: Frank Vibrans III <frank.vibrans@amd.com>
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Change-Id: I419fcb16e0b10dee9195072e0e6befa6c9e61a69
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/105
Tested-by: build bot (Jenkins)
Reviewed-by: Frank Vibrans III <frank.vibrans@amd.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
I have observed two separate EHCI host bridges that do not tolerate
using C bit-fields to directly manipulate the portsc_t register. The
reason for this is that the EHCI spec says that port_enable must go
to 0 at the time that port_reset goes to 1. Naturally this cannot be
done using direct bit-field manipulation. Instead, we use a temporary
variable, change the bit-fields there, then atomically write the new
value back to the hardware.
Signed-off-by: Steven A. Falco <sfalco@coincident.com>
Change-Id: If138faee43e0293efa203b86f7893fdf1e811269
Reviewed-on: http://review.coreboot.org/101
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Define INT_MAX, EOF and make sure size_t is available.
Change-Id: I1b4b717d2545ea8312ec52339300307a5bd68f8a
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/104
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Mathias Krause