Eric Biederman
60216355d2
- With Xeon cpus it seems best to use the tsc calibrated with timer2 as
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the time source. The apic timer also has a variable time base.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1711 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-23 02:47:13 +00:00
Yinghai Lu
2560dbdd50
for S2735 support
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1708 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-22 21:33:08 +00:00
Yinghai Lu
ccf0bc01aa
s2735 half update
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1705 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-22 18:45:36 +00:00
Eric Biederman
fcd5ace00b
- Add new cvs code to cvs
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1657 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-14 19:29:29 +00:00