The registers associated with the MTRRs for Quark are referenced through
a port on the host bridge. Support the standard configurations by
providing a weak routines which just do a rdmsr/wrmsr.
Testing:
* Edit the src/mainboard/intel/galileo/Makefile.inc file
* Add "select DISPLAY_MTRRS"
* Add "select HAVE_FSP_PDAT_FILE"
* Add "select HAVE_FSP_RAW_BIN"
* Add "select HAVE_RMU_FILE"
* Place the FSP.bin file in the location specified by CONFIG_FSP_FILE
* Place the pdat.bin files in the location specified by
CONFIG_FSP_PDAT_FILE
* Place the rmu.bin file in the location specified by CONFIG_RMU_FILE
* Testing is successful if:
* The MTRRs are displayed and
* The message "FspTempRamExit returned successfully" is displayed
TEST=Build and run on Galileo
Change-Id: If2fea66d4b054be4555f5f172ea5945620648325
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/13529
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
Document the required files to perform a minimal coreboot/FSP build for
x86.
TEST=None
Change-Id: I65b2947114634fce982ce82fb7c577fd5f47ed10
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/13438
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
This fixes some spelling and whitespace issues that I came across
while working on various things in the tree.
There are no functional changes.
Change-Id: I33bc77282f2f94a1fc5f1bc713e44f72db20c1ab
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/13016
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
... and move them into the code using them, instead.
Change-Id: I2391234797ad00da8038dda198eadf0b0fcaedb2
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/13526
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Add the AMD A8-660K APU.
Change-Id: I210a8ba962529c26a535965689672a46b09e325f
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/13510
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Trivial fix for syntax highlighting in editors. Some get confused by
the double quote that doesn't have a close quote and stop highlighting
at that point. This comment closes the quote and the paren pair so
that they can recover.
Change-Id: I566e8e0f4412009f679ab079f20ae30c2049b502
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/13435
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
If the GPLv2 or GPLv2+ license header is being used on a
coreboot file, make sure it has two paragraphs as specified by
the Common License Header section in the developer guidelines
in the coreboot wiki.
Change-Id: Ifffa0fa7272f5a4b129d4b7b8a515f8795bc2401
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/13119
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Add a single target to do the full coreinfo build using default Kconfig
values for both coreinfo and libpayload.
Change-Id: Id622fb2df480e826f6d868dbe01385d76587be26
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/13426
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
- Add CONFIG_ prefix to two symbols.
- Remove the use of the third symbol as it will never be matched.
Change-Id: Ifa7f6884001cb05fb8397f193c4b08a0161f498c
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/13539
Tested-by: build bot (Jenkins)
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
The COVERAGE_MAGIC macro has a trailing `4' on it, which makes it a
64-bit large integer, as opposed to a 32-bit unsigned integer, as
originally designated in `util/cbmem/cbmem.c'. Remove this number so
building with CODE_COVERAGE will succeed.
Change-Id: Ib5d7f2704a4c092c3eca6f62e219edb30950d793
Signed-off-by: Jean Lucas <jean@4ray.co>
Reviewed-on: https://review.coreboot.org/13520
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
Under certain conditions when the APs are still executing during
MCT setup the system can hang. This was the root cause of most
of the S3 resume failures on this platform; waiting for AP stop
before MCT setup allows for reliable S3 resume.
Change-Id: I329eea9a8912d7b57efe6aae327d24fd6c3fd782
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: https://review.coreboot.org/13169
Tested-by: build bot (Jenkins)
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Reviewed-by: Martin Roth <martinroth@google.com>
Under certain conditions, such as when microcode updates are
being performed, it is important to make sure all APs have
finished updates and are halted before continuing with the
boot process.
Add a new wait_ap_stopped() function to allow for this
functionality to be added to the appropriate mainboard
romstage source files.
Change-Id: Ib455c937888a58b283bd3f8fda1b486eea41b0a7
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: https://review.coreboot.org/13168
Tested-by: build bot (Jenkins)
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Reviewed-by: Martin Roth <martinroth@google.com>
On certain Winbond SuperIO devices, when a PS/2 mouse is not
present on the auxiliary channel both channels will cease to
function if the auxiliary channel is probed while the primary
channel is active. Therefore, knowledge of mouse presence
must be gathered by coreboot during early boot, and used to
enable or disable the auxiliary PS/2 port before control is
passed to the operating system.
Add auxiliary channel PS/2 device presence detect, and update
the Winbond W83667HG-A driver to flag the auxiliary channel as
disabled if no device was detected.
Change-Id: I76274493dacc9016ac6d0dff8548d1dc931c6266
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: https://review.coreboot.org/13165
Tested-by: build bot (Jenkins)
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Reviewed-by: Martin Roth <martinroth@google.com>
The IOMMU/HT device was not routed correctly; add the proper APIC
mappting to the mptable generation code. Also clarify comments
surrounding the pin mappings.
Change-Id: I72ceb0f22dabdfa71a1f6231ccb841face08ff7a
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: https://review.coreboot.org/13163
Tested-by: build bot (Jenkins)
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Reviewed-by: Martin Roth <martinroth@google.com>
The existing code did not allow for the second core of the BSP to
reside on an APIC ID other than 1, leading to a boot hang on Family
15h processors when APIC_ID_OFFSET was set to anything other than 0.
Furthermore, insufficient AP stack space was allocated for AP start.
Change-Id: I4ded3cfb3736149e2265848014352d7622d5042a
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: https://review.coreboot.org/13158
Tested-by: build bot (Jenkins)
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Add the ability to release a given commit id, and normalize the tarballs
to use coreboot/1000 for owner and group, and the last commit date as
mtime for all files.
Change-Id: Ia349f429090fe9804f7f14c226812646e2f712be
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/13514
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Not much testing, update mostly so we can test with the
latest scan-build.
Change-Id: I50d28b7e0dfd31f9ae565c8515d5ab1760ca4c62
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/13516
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
The compiler really supports a whole line of ARM CPUs, not just
ARMv7a:
arm-eabi-gcc: note: valid arguments to '-march=' are: armv2 armv2a
armv3 armv3m armv4 armv4t armv5 armv5e armv5t armv5te armv6 armv6-m
armv6j armv6k armv6s-m armv6t2 armv6z armv6zk armv7 armv7-a armv7-m
armv7-r armv7e-m armv7ve armv8-a armv8-a+crc iwmmxt iwmmxt2 native
So let's reflect this in the cross compiler name.
Change-Id: I717760d80954655b2de9ae019b813d81e9a75762
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/13515
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Since this code is pulled in through commonlib, it will break compilation
of cbfstool on OSX.
Change-Id: I342bfa7e755aa540c4563bb5cd8cccacee39d188
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/13525
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
The readme describes the operation and usage of kconfig_lint.
It also lists all the notes, warnings, and errors that kconfig_lint
looks for.
Change-Id: I873f394ff93fce42cd9638cbbad6134f1aef3a6a
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/13464
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Don't warn on Kconfig.orig and Kconfig~ files when trying to verify
that all the Kconfig files in the coreboot source tree are being loaded.
Change-Id: Ie7babe60b29735e5ccc5f93f4e42ad82dfb47044
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/13462
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
- The prompts were not getting incremented, so each prompt for a symbol
would overwrite the previous.
- Record the menu each prompt is in.
Change-Id: Ia282a30344d5e135f4f2027be9aff0e49a4e5edb
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/13461
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Although there's no reason we COULDN'T use tristate types, we haven't
up to this point. If there's a good reason to use them in the future,
this check can be removed.
Change-Id: I5f1903341f522bc957e394bc0fd288ba1adab431
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/13460
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
The code had originally been using standard grep to look through the
coreboot tree for Kconfig symbols. When this was switched to git grep,
the --exclude-dir options didn't work, and nothing was added to exclude
the directories that shouldn't be searched for symbols. This resulted
in invalid warnings as it searched directories that had Kconfig symbols
for other projects.
This merges the exclusion list for both the regular and git versions
of grep for consistent behavior.
Change-Id: I7fed8b9fa827cb14f7373e7b774acc56e43cb6ff
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/13459
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This fixes at least one kconfig_lint warning.
Change-Id: I35edf57e90315a8372aaf3b41e923cd8dad7386a
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/13458
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
The configuration that coreboot uses for setting selected symbols
typically involves a structure like this:
config BLEH_SPECIFIC_OPTIONS
def_bool y
select SYMBOL
This leads to an an extra kconfig symbol BLEH_SPECIFIC_OPTIONS
that is never referenced by anything else, generating a warning.
Since this is currently the construct that coreboot uses, filter it
out of the warnings for now.
Change-Id: I85a95e4c4e8469870c7f219f2a92955819845573
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/13457
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
The code had originally been using standard grep to look through the
coreboot tree for Kconfig symbols. When this was switched to git grep,
the --exclude-dir options didn't work, and nothing was added to exclude
the directories that shouldn't be searched for symbols. This resulted
in invalid warnings as it searched directories that had Kconfig symbols
for other projects.
This merges the exclusion list for both the regular and git versions
of grep for consistent behavior.
Change-Id: I69a1e0b30fecca152e02a511c82248b6091b3d8b
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/13456
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This is the very very minimum needed to compile the code.
Change-Id: I7f9e5f564181071591a4640019f59f91a4c456c6
Signed-off-by: Alexandru Gagniuc <alexandrux.gagniuc@intel.com>
Reviewed-on: https://review.coreboot.org/13297
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Some newer x86 systems can boot from non-memory-mapped boot media
(e.g. EMMC). The bootblock may be backed by small amounts of SRAM, or
other memory, similar to how most ARM chipsets work. In such cases, we
may not have enough code space for romstage very early on. This means
that CAR setup and early boot media (e.g. SPI, EMMC) drivers need to
be implemented within the limited amount memory of storage available.
Since the reset vector has to be contained in this early code memory,
the bootblock is the best place to implement loading of other stages.
Implement a bootblock which does the minimal initialization, up to,
and including switch to protected mode. This then transfers control
to platform-specific code. No stack is needed, and control is
transferred via a "jmp" such that no stack operations are involved.
Change-Id: I009b42b9a707cf11a74493bd4d8c189dc09b8ace
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: https://review.coreboot.org/13485
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Lee Leahy