Commit Graph

3860 Commits

Author SHA1 Message Date
Stephan Guilloux f5f0c69628 flashrom: MX25L1605 and 1635 accept Chip Erase opcodes 60 and C7
Signed-off-by: Stephan Guilloux <stephan.guilloux@free.fr>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4139 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-19 23:24:26 +00:00
Stephan Guilloux 15bbfb8418 Add MX25L1635D support, as discussed on #coreboot.
Signed-off-by: Stephan Guilloux <stephan.guilloux@free.fr>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4138 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-19 23:04:00 +00:00
Ronald Hoogenboom b5843ffcb0 There is a typo in amdk8/raminit_f.c regarding the preprocessor symbol QRANK_DIMM_SUPPORT in line 2208, which caused the protected code fragment never to be included for compilation.
Signed-off-by: Ronald Hoogenboom <hoogenboom30@zonnet.nl>
Acked-by: Marc Jones <marcj303@gmail.com>

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4137 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-18 23:04:28 +00:00
Stefan Reinauer 4365659fda drop the ChangeLog.cvsimport document from the transition from CVS
to GNU arch. Does anyone remember that? What a fun! 
All history is in the SVN repository, including the CVS and TLA parts,
so nothing is lost.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4136 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-18 18:10:38 +00:00
Uwe Hermann c90bb4a1d9 Drop long-obsolete HOWTO, it's still available in wikified form at
http://www.coreboot.org/VIA_EPIA-M.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4135 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-18 17:22:11 +00:00
Uwe Hermann d2a5a5abef s/LinuxBIOS/coreboot/.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4134 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-18 14:18:20 +00:00
Uwe Hermann 1458228b2e Add support for the ASUS P2B-D mainboard.
This is a pretty standard "yet another 440BX" target, so the code
is pretty straight-forward. It's a dual-CPU machine, which might need
some fixing, I'm booting with 'maxcpus=0' for now. It does boot
successfully up to a Linux login prompt, though.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4133 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-18 14:02:00 +00:00
Peter Stuge b1ec2ac62d flashrom: Add VIA PC3500G board. It has SPI flash behind ITE8716 on LPC.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: illdred <illdred@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4132 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-17 23:01:45 +00:00
Myles Watson d1be3ba633 Add include to config.g
Usage: 

include path

path can be relative to the current directory or absolute starting at /src.

I tested it with:

include /config/absolute.lb
include relative.lb

in /src/northbridge/amd/amdk8/Config.lb
which included
   /src/northbridge/amd/amdk8/relatvie.lb
   /src/config/absolute.lb

Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4131 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-17 17:58:34 +00:00
Uwe Hermann 0346c22de6 Improvements for the coreboot v2 README:
- Point to the 'Payloads' wiki page for more info.
 
 - Document (most of) the build requirements of v2.

 - Point to the wiki for build instructions (wiki needs more docs, though).

 - Mention QEMU for testing coreboot, also point to wiki page.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4130 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-17 17:11:39 +00:00
Ronald G. Minnich ef5f8a73b4 Updating documentation as I get ready to put v3-style startup in (which
I have working in an early version in my tree).

Corrections welcome.

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4129 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-17 16:18:02 +00:00
Myles Watson 1eb1a61e07 There are two identical cfgfile rules in config.g. Remove one of them.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4128 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-17 16:11:24 +00:00
Myles Watson a80a61049b This patch allows you to add lines of the form
pci_rom PATH vendor_id = # device_id = #

to Config.lb files.  No more changing the ROM_SIZE to add an option ROM, and no more manual prepending.

Examples:

pci_rom ../ragexl.rom vendor_id = 0x1002 device_id = 0x4752
pci_rom ../nic.rom vendor_id = 0x1100 device_id = 0x4152

Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4127 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-17 13:43:46 +00:00
Stefan Reinauer aeba92ab5b Add VIA CX700 support, plus VIA vt8454c reference board support.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4126 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-17 08:37:18 +00:00
Ronald G. Minnich 56c51bd120 This needed to be removed.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4125 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-17 02:40:20 +00:00
Rudolf Marek e4be46b4c3 Following patch flushes the instruction queue when we set PE=0. This is normally
done by FAR JMP, but here it is more tricky because we run at EIP>1MB. Many
thanks to Marc and Kevin to tell me how to fix it

The trick is to use 0x66 prefix (done with ljmpl) it will allow to jump in real
mode to any EIP addresses  ;) 

Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4124 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-16 21:09:56 +00:00
Myles Watson f9fab37ecb I deleted mptable.c in my patch, but forgot to svn rm it.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4123 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-16 16:42:05 +00:00
Peter Stuge 13e19216ef v2/src romfs->cbfs rename
romfs.c has been replaced by cbfs.c.

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4121 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-15 21:40:08 +00:00
Myles Watson 472f3ffcf8 This patch cleans up mpspec.h and allows it to be included when
HAVE_MP_TABLE=0

It also removes the artifacts from the Asus m2v-mx_se that were
necessary before the change.

Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>




git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4120 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-15 21:25:21 +00:00
Uwe Hermann 4e006407ec Add -r|--remove option to force abuild to remove the output directory
after every board build, in order to save disk space if you don't need
the actual output files.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4119 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-15 16:07:27 +00:00
Uwe Hermann d086e5d966 Some coding style and consistency fixes (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4117 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-15 10:52:49 +00:00
Stefan Reinauer 82144571ad r4097 broke the tree and it remains unfixed :-(
Repeat: Cosmetic patches shall not break the tree for 20 revisions.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4116 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-15 06:00:01 +00:00
Peter Stuge 57f6c08837 EPIA-CN does not have any ACPI tables. Fixes manual and auto build here.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4115 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-14 20:51:41 +00:00
Peter Stuge 45ae92ff1a util/cbfstool/tools/rom-mk*->cbfs-mk* rename
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4114 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-14 19:48:32 +00:00
Peter Stuge 483b7bbd77 v2/src romfs->cbfs rename
This also has the config tool changes in v2/util.

Rename romfs.[ch]->cbfs.[ch] and sed romfs->cbfs romtool->cbfstool ROMFS->CBFS

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4113 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-14 07:40:01 +00:00
Stefan Reinauer 3935b19d9f fix up the tree.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4112 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-14 06:38:15 +00:00
Peter Stuge ef4d7d4a67 util: romfs->cbfs rename
I noticed this before sed, but forgot to change it back after sed.

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4111 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-14 00:26:24 +00:00
Peter Stuge 1d862ded11 v2/util: romfs -> cbfs rename
It's all sed here. romfs->cbfs, ROMFS->CBFS, romtool->cbfstool

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4110 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-14 00:08:34 +00:00
Peter Stuge 450b23fb2e v2/documentation: romfs -> cbfs rename
This is svn mv romfs.txt cbfs.txt and sed romfs->cbfs, ROMFS->CBFS along with
one manual change: CBFS_file->cbfs_file

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>                                


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4109 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-14 00:01:34 +00:00
Rudolf Marek 299a00feb8 Fix the build. This error was introduced by change in acpi.c, the acpi_slp_type exists only conditionally.
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Rudolf Marek <r.marek@assembler.cz>
 


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4108 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-13 21:42:49 +00:00
Uwe Hermann 5c4f8392e0 Fix typo. Add missing copyright year.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4107 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-13 21:35:49 +00:00
Ronald G. Minnich c824b5844f Emergency fix. Most targets now build.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4106 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-13 21:19:58 +00:00
Rudolf Marek 743b635ca3 I need to do uses HAVE_ACPI_RESUME for each board. Here we go.
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Rudolf Marek <r.marek@assembler.cz>

It should fix the build break introduced in r4101



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4105 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-13 20:07:26 +00:00
Rudolf Marek 0fb21c4af9 The wake_vec must be HAVE_ACPI_RESUME guarded because PPC uses -Werror on this file.
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Self ack, trivial fix:
Acked-by: Rudolf Marek <r.marek@assembler.cz>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4104 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-13 18:44:06 +00:00
Rudolf Marek 6bb6e03912 Following patch adds support for the ACPI resume on Asus M2V-MX SE. The ACPI
code just blinks the leds. The motherboard resources are use to reserve coreboot
used memory.

Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4103 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-13 18:37:17 +00:00
Rudolf Marek 15bf50d820 Following patch adds resume (exit from self refresh) support for AMD K8 revF
CPUs. It handles both type of erratas on those CPUs.

Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4102 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-13 18:34:35 +00:00
Rudolf Marek 33cafe5bfb Following patch implements ACPI resume support for coreboot. The hardware main
hook will come in separate patch perhaps.

Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4101 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-13 18:07:02 +00:00
Rudolf Marek 497c8effce Following patch adds support for resume on VT8237 based motherboards. The NB
part of this patch adds support for resume well NVRAM. In which DQS values are
stored.

Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4100 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-13 18:00:09 +00:00
Rudolf Marek a572f83e71 Following patch adds necessary hooks and as well the compile time checks for
ACPI suspend/resume.

The memory cleared now is just the coreboot memory not the low memory.

Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4099 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-13 17:57:44 +00:00
Carl-Daniel Hailfinger 3f04dade05 Fix the following errors:
In file included from
src/mainboard/asus/a8v-e_se/cache_as_ram_auto.c:93:
src/northbridge/amd/amdk8/raminit.c: In function ‘sdram_set_spd_registers’:
src/northbridge/amd/amdk8/raminit.c:2123: error: implicit declaration of
function ‘activate_spd_rom’

In file included from
src/mainboard/asus/a8v-e_se/cache_as_ram_auto.c:101:
src/cpu/amd/model_fxx/init_cpus.c: In function ‘init_cpus’:
src/cpu/amd/model_fxx/init_cpus.c:319: error: implicit declaration of
function ‘soft_reset’

In file included from
src/mainboard/asus/m2v-mx_se/cache_as_ram_auto.c:98:
src/northbridge/amd/amdk8/raminit_f.c: In function ‘sdram_set_spd_registers’:
src/northbridge/amd/amdk8/raminit_f.c:2848: error: implicit declaration of
function ‘activate_spd_rom’

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4098 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-13 16:21:16 +00:00
Carl-Daniel Hailfinger 6dcbe7f540 This patch cleans up the calls to $CC in mainboard Config.lb files. They
now all have the same parameter order.

action "$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS)
-I$(TOP)/src -I. -nostdinc -nostdlib -fno-builtin -Wall -Os -c -S
$(MAINBOARD)/$(CACHE_AS_RAM_AUTO_C) -o $@"

The idea behind this parameter order is:
- *FLAGS at the beginning.
- Use a common set of *FLAGS.
- Include files and directories listed afterwards.
- nostdinc, nostdlib, no-builtin tell the compiler this is standalone
  code.
- Warnings. They do not influence source or compilation.
- Compilation strategy (small) and output mode (asm or binary).
- File to be compiled.
- Output name.
- $(DEBUG_CFLAGS) and -S are only used for asm output.


Other changes in this patch:

- src/supermicro/h8dme/Config.lb now uses $DEBUG_CFLAGS instead of
hardcoding the respective flags.

- $DEBUG_CFLAGS was added to asm outputting $CC calls:
supermicro/h8dme/Config.lb
lippert/roadrunner-lx/Config.lb

- $DISTRO_CFLAGS was added to some $CC calls in:
iwill/dk8_htx/Config.lb (CAR AP code)
supermicro/h8dmr/Config.lb (CAR AP code)
supermicro/h8dme/Config.lb (CAR AP code)
gigabyte/m57sli/Config.lb (CAR AP code)
gigabyte/ga_2761gxdk/Config.lb (CAR AP code)
amd/serengeti_cheetah_fam10/Config.lb (everywhere)
msi/ms7135/Config.lb (everywhere)
nvidia/l1_2pvv/Config.lb (CAR AP code)
-$CFLAGS was added to all $CC calls in:
amd/db800/Config.lb
amd/dbm690t/Config.lb
amd/norwich/Config.lb
amd/pistachio/Config.lb
amd/serengeti_cheetah/Config.lb
amd/serengeti_cheetah_fam10/Config.lb
arima/hdama/Config.lb
artecgroup/dbe61/Config.lb
asus/a8n_e/Config.lb
asus/a8v-e_se/Config.lb
asus/m2v-mx_se/Config.lb
broadcom/blast/Config.lb
digitallogic/msm800sev/Config.lb
gigabyte/ga_2761gxdk/Config.lb
gigabyte/m57sli/Config.lb
ibm/e325/Config.lb
ibm/e326/Config.lb
iei/pcisa-lx-800-r10/Config.lb
iwill/dk8_htx/Config.lb
iwill/dk8s2/Config.lb
iwill/dk8x/Config.lb
kontron/986lcd-m/Config.lb
lippert/roadrunner-lx/Config.lb
lippert/spacerunner-lx/Config.lb
msi/ms7135/Config.lb
msi/ms7260/Config.lb
msi/ms9185/Config.lb
msi/ms9282/Config.lb
newisys/khepri/Config.lb
nvidia/l1_2pvv/Config.lb
pcengines/alix1c/Config.lb
sunw/ultra40/Config.lb
supermicro/h8dme/Config.lb
supermicro/h8dmr/Config.lb
technexion/tim8690/Config.lb
tyan/s2735/Config.lb
tyan/s2850/Config.lb
tyan/s2875/Config.lb
tyan/s2880/Config.lb
tyan/s2881/Config.lb
tyan/s2882/Config.lb
tyan/s2885/Config.lb
tyan/s2891/Config.lb
tyan/s2892/Config.lb
tyan/s2895/Config.lb
tyan/s2912/Config.lb
tyan/s2912_fam10/Config.lb
tyan/s4880/Config.lb
tyan/s4882/Config.lb

- Use $@ wherever appropriate.

- Kill that evil CACHE_AS_RAM_AUTO_C variable.

- Trailing whitespace fixups on lines which were touched anyway.

We now only have 6 remaining different calls to $CC whereas before there
were 20.
If I am allowed to rename src/mainboard/kontron/986lcd-m/auto.c to
src/mainboard/kontron/986lcd-m/cache_as_ram_auto.c, we're down to 4
different calls.
If we can decide on the use of $CPU_OPT, we are down to 3 different
calls.

One additional point I'd like to clear up:
if ASSEMBLER_DEBUG
makedefine DEBUG_CFLAGS := -g -dA -fverbose-asm
end

"-dA -fverbose-asm" is only useful for asm output. For these flags,
DEBUG_CFLAGS is a total misnomer. What about calling them
DEBUG_ASMCFLAGS or somesuch?
"-g" should be controllable by a separate switch. It is useful even for
object code.


The following targets are broken by this patch because they contain
implicit declarations, but the error did not trigger due to missing
CFLAGS:
amd/serengeti_cheetah
asus/a8v-e_se
asus/m2v-mx_se
digitallogic/msm800sev
pcengines/alix1c
supermicro/h8dme
supermicro/h8dmr


Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4097 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-12 21:47:09 +00:00
Rudolf Marek e86c65b62e The IT8712F needs to have the configuration bits changed to handle the power for
memory correctly during suspend.s

Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4096 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-12 18:01:55 +00:00
Carl-Daniel Hailfinger 7845fb59a2 Bring S2912 and S2912_Fam10 Config.lb in line with each other.
- Use $(CACHE_AS_RAM_AUTO_C) instead of cache_as_ram_auto.c
- Compile apc_auto.c with $(DISTRO_CFLAGS)
- Clean up whitespace

If anyone can explain the remaining differences in Config.lb which are
NOT caused by the K8/Fam10 switch, I'd be glad to hear them.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4095 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-11 18:58:17 +00:00
Ward Vandewege a3ec56c17a This patch fixes an edge case for K8 raminit. Specifically, it brings the code
in line with the K10 code.

I was trying to use DDR2 800 (CL6) memory on an m57sli, but booting failed.
Marc Jones found this bug (thanks!), which fixes booting with this specific
memory. For the record, it was Crucial CT2KIT25664AA800.

I put the machine through a few days of use. It also succesfully passed a run
of http://people.redhat.com/dledford/memtest.shtml:

  $ ./memtest
  TEST_DIR:               /tmp
  SOURCE_FILE:            linux-2.6.29.1.tar.bz2
  NR_PASSES:              20
  MEGS_PER_COPY:          270
  NR_COPIES:              45
  PARALLEL:               no
  COMPRESS_RATIO:         5
  COMPRESS_FLAG:          j
  COMPRESS_PROG:          /bin/bzip2
  EXTRACT:                yes

  Creating comparison source...done.
  Starting test pass #1: unpacking, comparing, removing, done.
  Starting test pass #2: unpacking, comparing, removing, done.
  Starting test pass #3: unpacking, comparing, removing, done.
  Starting test pass #4: unpacking, comparing, removing, done.
  Starting test pass #5: unpacking, comparing, removing, done.
  Starting test pass #6: unpacking, comparing, removing, done.
  Starting test pass #7: unpacking, comparing, removing, done.
  Starting test pass #8: unpacking, comparing, removing, done.
  Starting test pass #9: unpacking, comparing, removing, done.
  Starting test pass #10: unpacking, comparing, removing, done.
  Starting test pass #11: unpacking, comparing, removing, done.
  Starting test pass #12: unpacking, comparing, removing, done.
  Starting test pass #13: unpacking, comparing, removing, done.
  Starting test pass #14: unpacking, comparing, removing, done.
  Starting test pass #15: unpacking, comparing, removing, done.
  Starting test pass #16: unpacking, comparing, removing, done.
  Starting test pass #17: unpacking, comparing, removing, done.
  Starting test pass #18: unpacking, comparing, removing, done.
  Starting test pass #19: unpacking, comparing, removing, done.
  Starting test pass #20: unpacking, comparing, removing, done.

Signed-off-by: Ward Vandewege <ward@gnu.org>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4094 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-11 18:09:03 +00:00
Carl-Daniel Hailfinger ebdc7c7cfe Kill remaining unneeded CAR/ROMCC if-blocks.
Lots of Config.lb files still have "if USE_DCACHE_RAM" sections although
USE_DCACHE_RAM is always set for them. Such checks are not only
pointless, they actively make the files hard to read.

A full abuild run confirmed that compilation did not change with this
patch applied.

The patch does not change whitespace of the remaining code to ease
review and svn blame.

With this change, it should be possible to have two or three Config.lb
variants in total (except the actual hardware config). Right now, some
Config.lb have comments, some don't, some have empty lines for better
readability, some don't, some have leading whitespace, some don't. This
is an utter mess and unifying these files would certainly reduce the
headaches I have when looking at them.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4093 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-11 14:51:49 +00:00
Uwe Hermann 4eb37059ce Mention a few more flash chip packages in README/manpage.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4092 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-11 13:59:00 +00:00
Stefan Reinauer 1da9a79a06 move architecture override before cross compiler detection, or the Sandpoint
skeleton will have get a cross compiler before it gets the architecture set 
to SKIP. Pretty much build system internal, so self-acked.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4091 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-10 23:02:48 +00:00
Uwe Hermann 708ccac6ee Add a note that 'modprobe msr' might be required.
Remove trailing whitespace. Fix typos.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4090 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-10 21:05:56 +00:00
Uwe Hermann cd2cbf7200 Fix typo.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4089 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-10 14:49:14 +00:00
Uwe Hermann a0eeef324f Various manpage / README fixes:
- Improve description a bit, especially wrt chip packages and
   protocols.

 - Add some missing parameters to manpage option descriptions.

 - Remove long obsolete DoC support note.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4088 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-10 14:41:29 +00:00