Commit Graph

81 Commits

Author SHA1 Message Date
Philipp Deppenwiese 57df088816 Dokumentation: Sphinx add RST in markdown support
* This feature embedds RST into markdown for
table generation.

For more information, see
http://recommonmark.readthedocs.io/en/latest/index.html#autostructify

Change-Id: Iefebb3b7857bc98818e345f7d0e95fbf987305a8
Signed-off-by: Philipp Deppenwiese <zaolin@das-labor.org>
Reviewed-on: https://review.coreboot.org/26190
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-11 08:58:08 +00:00
Jonathan Neuschäfer 7a11c900b6 Documentation: Add HiFive Unleashed documentation
Change-Id: Ic97955e36feeaa18b5a0dbd502c722c06dcc1b31
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/25792
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2018-05-08 03:07:36 +00:00
Nico Huber 3de303179a {mb,nb,soc}: Remove references to pci_bus_default_ops()
pci_bus_default_ops() is the default anyway.

Change-Id: I5306d3feea3fc583171d8c865abbe0864b6d9cc6
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/26055
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-05-08 03:01:04 +00:00
Subrata Banik 55b183f112 Documentation/Intel: Add MultiProcessorInit documentation
Add documentation for MP service PPI using EFI interface
on Intel 9th Gen Platforms.

Documented so far:
* Problem Statement
* New Design Proposal
* API interface
* Code Flow changes
* Benefits

BRANCH=none
BUG=b:74436746
TEST=none

Change-Id: I5b6096ef31d8a523c00cbad39ab9d4884e735fde
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/25921
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-08 02:58:26 +00:00
Elyes HAOUAS 8b6c2e548b Documentation/Doxyfile.coreboot: Remove trailing whitespace
Change-Id: I9218766d14b971c1703ac8de9766138b71728eee
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/25836
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
2018-04-27 09:10:27 +00:00
Elyes HAOUAS 302700e04d Documentation/COPYING: Remove trailing whitespace
Change-Id: I796159f055a19537247652ecb3e86a03f3104a3c
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/25835
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
2018-04-27 09:10:20 +00:00
Elyes HAOUAS 0c80d2f8e3 Documentation/Intel/NativeRaminit: Remove trailing whitespace
Change-Id: I1d38aea07e2d9ffb89115410603a5beac5e4d44d
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/25831
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-04-27 09:09:27 +00:00
Jonathan Neuschäfer 5e48c75fca Documentation: Add support for building with Sphinx
This commit adds the necessary infrastructure to convert the Markdown
files in the Documentation directory to HTML using Sphinx[1] and
recommonmark[2]. I selected "sphinx_rtd_theme" as the theme, because it
offers a useful navigation sidebar, and because it's already used for
the Linux kernel[3].

Makefile.sphinx was auto-generated by sphinx-quickstart. conf.py was
auto-generated and manually adjusted.

[1]: http://www.sphinx-doc.org/en/stable/
[2]: https://recommonmark.readthedocs.io/en/latest/
[3]: https://www.kernel.org/doc/html/latest/index.html

Change-Id: Ie4de96978e334c598cf5890775807d3e15c29c4d
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/25787
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-04-26 12:25:03 +00:00
Jonathan Neuschäfer f895216c4f Documentation: SandyBridge_registers.md: Add a title
This fixes the following error when using "make -C Documentation sphinx":

/.../Documentation/Intel/NativeRaminit/Sandybridge.md:32: WARNING:
toctree contains reference to document
u'Intel/NativeRaminit/SandyBridge_registers' that doesn't have a title:
no link will be generated

Change-Id: Id273b8dbc96465833b8e2b2e78c3bac8cd217d4b
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/25788
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
2018-04-26 11:58:12 +00:00
Jonathan Neuschäfer 3eee533d93 Documentation: Sandybridge RAM init: Fix links for Sphinx/recommonmark
Add a dash before the links to other files to mark those files as
subpages, and avoid the following error:

  reading sources... [ 33%] Intel/NativeRaminit/Sandybridge
  Exception occurred:
    File "/usr/lib/python2.7/dist-packages/recommonmark/states.py", line 134, in run_role
      content=content)
  TypeError: 'NoneType' object is not callable

While at it, also spell these filenames correctly: Only
SandyBridge_registers.md is spelled in camel-case.

Change-Id: If92be7d2b61229d0315e1cc5204e951171612fee
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/25786
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
2018-04-26 11:57:14 +00:00
Jonathan Neuschäfer 0bb93707c8 Documentation/timestamp.md: Fix markdown formatting
Fix the headline levels (only the document's title should be a top-level
document), and use "# " instead of "====" to mark headlines, because
it's more obvious what the different levels of that are. Also fix some
other things.

Arguably, the explicit table of contents could be removed.

Change-Id: Ie29b6393e9d7871ea3c900e016b5c3ed415538ac
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/25680
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
2018-04-17 17:18:23 +00:00
Jonathan Neuschäfer 7719d50352 Documentation/Intel: Adjust heading levels
Adjust the headings so that there is only one h1 tag per file.

Change-Id: I53f9ee47957fcde521b64c0123dac10f051c681c
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/25684
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
2018-04-17 17:18:07 +00:00
Paul Menzel 0cdaad36eb Use git HTTP URLs without `/p` in it
Change-Id: I9972b138c6dd2a289880c4ec8b3fe64fc3baa66b
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
Reviewed-on: https://review.coreboot.org/25545
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-04-17 10:38:06 +00:00
Jonathan Neuschäfer 9f79d60910 Documentation/acpi/gpio.md: Fix formatting of table
The table in Documentation/acpi/gpio.md is currently detected as
free-form text (at least by GitHub and recommonmark), instead of a
table. Wrap it in a code formatting block to preserve the manual
formatting.

Change-Id: If460d7f1ba1a6198d949886f0f55fd6254bc2f7a
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/25679
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
2018-04-16 08:45:40 +00:00
Jonathan Neuschäfer b709b50a36 Documentation/acpi/gpio.md: Fix markdown heading levels
Only the document title should be a top-level heading ('#'). Everything
else should be a second- over lower-level heading ('##').

Also remove the '#' sign at the end of heading lines. "# Foo #" is
mentioned as a valid syntax variant at [1], but it's quite uncommon.

[1]: https://daringfireball.net/projects/markdown/syntax#header

Change-Id: Ida16c3ecaa22e8439007673cb943d04952e19471
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/25678
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2018-04-16 08:45:16 +00:00
Jonathan Neuschäfer 8ee93ae267 Documentation: Fix a bunch of typos
Change-Id: I25dca2e231343cfdad61a638f0302726a6aa3f8b
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/25571
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-04-10 10:50:06 +00:00
Jonathan Neuschäfer 7fa9f73ac7 Documentation: Rename submodules.txt to submodules.md
This will help static site generators that can turn Markdown into HTML
but can't easily turn plain text into HTML.

Change-Id: Iabdbbecd0badddbca2221c6164b254ca163555ad
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/25560
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2018-04-10 10:49:07 +00:00
Jonathan Neuschäfer 9f9f7a23d9 Documentation: Convert abi-data-consumption.txt to Markdown
This will help static site generators that can turn Markdown into HTML
but can't easily turn plain text into HTML.

Change-Id: Id186db140503f3c2759d579b18476fff021988c8
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/25559
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2018-04-10 10:48:57 +00:00
Patrick Rudolph bf8db8d45b Documentation/Intel: Add NativeRaminit documentation
Add documentation for Intel native raminit on Intel SandyBridge.
Documented so far:
* Register
* Read training
* Frequency selection
* SMBIOS type 17 memory reporting
* Various Kconfig options and features

Change-Id: I3b977460ecb29c9a54e3fab82349982fca9918e7
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/22275
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-12-09 16:59:16 +00:00
Werner Zeh cbdf9762d7 Documentation/Intel/vboot: Remove double word *after*
Change-Id: I5332c5760987d6ca6e92ac8aae7f3d43e09e8e4e
Signed-off-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-on: https://review.coreboot.org/22442
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2017-11-14 15:27:46 +00:00
Alexander Couzens 0d29a30093 Documentation: add thinkpad/codenames.csv
Collect all known codenames for thinkpads.

Change-Id: Iae44ceb29675511ec562c275e750087eca5d2f27
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
Signed-off-by: Sebastian "Swift Geek" Grzywna <swiftgeek@gmail.com>
Reviewed-on: https://review.coreboot.org/21364
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2017-11-03 16:20:11 +00:00
Paul Menzel 0cdb505d26 Documentation/Intel/vboot: Fix spelling of *following*
Change-Id: I26cf3cb049fb5520c59316ff7397b0bcfe6ee48d
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
Reviewed-on: https://review.coreboot.org/22178
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-11-03 15:25:44 +00:00
Nico Huber 504d1eff4b 3rdparty/lib{hwbase,gfxinit}: Update to latest master
Simplifies our C interface function gma_gfxinit(), due to the following
changes:

* *libgfxinit* knows about the underlying PCI device now and can
  probe MMIO addresses by itself.
* The framebuffer mapping is now completely handled inside the
  library where we validate that we neither overflow
  - the stolen memory,
  - the GTT address space, the GTT itself nor
  - the aperture window (i.e. resource2 of the PCI device)
    that we use to access the framebuffer.

Other changes:

* Fixes and a quirk for DP training.
* Fix for DP-VGA adapters that report an analog display in EDID.
* Fixes for Skylake support with coreboot.
* DDI Buffer drive-strength configuration for Haswell, Broadwell and
  Skylake.
* `gfx_test` can now be run from X windows (with glitches).
* Compatibility with GCC 7 and SPARK GPL 2017.

TEST=Booted lenovo/t420 and verified that everything works as usual.

Change-Id: I001ba973d864811503410579fd7ad55ab8612759
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/20606
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2017-10-28 19:46:17 +00:00
Evelyn Huang 824c85c9a5 Documentation: Update Lesson2.md
Update Lesson2.md to include information about updating a commit after
it has been pushed to the remote repository.

Change-Id: Iebf86113b13d859d9c9e3db51e22ea44cb1144f6
Signed-off-by: Evelyn Huang <evhuang@google.com>
Reviewed-on: https://review.coreboot.org/20948
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
2017-09-05 03:54:54 +00:00
Logan Carlson fea92167f9 Documentation: Add binary extraction documentation
Added documentation on how to extract binaries from a ROM image,
including:

- Using ifdtool to extract binaries.
- Using cbfstool to extract binaries.
- Changing menuconfig to use the extracted binaries.

Change-Id: Ia31b01afc66789f95c7d21a0d41b532bc19a6430
Signed-off-by: Logan Carlson <logancarlson@google.com>
Reviewed-on: https://review.coreboot.org/20753
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
2017-08-10 20:11:16 +00:00
Evelyn Huang 67ce5052fe Documentation: Create Lesson2.md
Lesson 2 goes over:
-Setting up an account on gerrit
-Cloning coreboot
-Submiting a commit using git

Change-Id: I756b273cf832fc014ba2077a5a4fe4d8009aae6d
Signed-off-by: Evelyn Huang <evhuang@google.com>
Reviewed-on: https://review.coreboot.org/20212
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2017-08-01 23:01:08 +00:00
Stefan Reinauer 6a00113de8 Rename __attribute__((packed)) --> __packed
Also unify __attribute__ ((..)) to __attribute__((..)) and
handle ((__packed__)) like ((packed))

Change-Id: Ie60a51c3fa92b5009724a5b7c2932e361bf3490c
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/15921
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-07-13 19:45:59 +00:00
Martin Roth 4b18a922f0 Documentation: change coreboot to lowercase
The word 'coreboot' should always be written in lowercase, even at the
start of a sentence.

Unfortunately, some external websites and projects are spelling coreboot
with an uppercase C, so references to those pages can't be changed
without breaking the link.

Change-Id: I79824da8a9ed36a1e4fe23a1711a89535267bf5f
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/20031
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2017-06-12 04:06:40 +02:00
Nico Huber 2e7f6ccafc fsp/gop: Add running the GOP to the choice of gfx init
The new config choice is called RUN_FSP_GOP. Some things had to happen
on the road:

  * Drop confusing config GOP_SUPPORT,
  * Add HAVE_FSP_GOP to chipsets that support it,
  * Make running the GOP an option for FSP2.0 by returning 0
    in random VBT getters.

Change-Id: I92f88424004a4c0abf1f39cc02e2a146bddbcedf
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/19815
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-06-08 14:58:29 +02:00
Paul Menzel a8843dee58 Use more secure HTTPS URLs for coreboot sites
The coreboot sites support HTTPS, and requests over HTTP with SSL are
also redirected. So use the more secure URLs, which also saves a
request most of the times, as nothing needs to be redirected.

Run the command below to replace all occurences.

```
$ git grep -l -E 'http://(www.|review.|)coreboot.org'
| xargs sed -i 's,http://\(.*\)coreboot.org,https://\1coreboot.org,g'
```

Change-Id: If53f8b66f1ac72fb1a38fa392b26eade9963c369
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: https://review.coreboot.org/20034
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-06-07 12:04:50 +02:00
Nico Huber b40e5c72b7 Documentation: Describe libgfxinit hook-up
Change-Id: Ieeb53a1694193cd19b5e9aa5bee25e36a60e56bd
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/19054
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-06-06 18:08:17 +02:00
Patrick Georgi 04edaefad7 util/hugo: Add framework to build www.coreboot.org/Documentation
www.coreboot.org/Documentation is now built with hugo (www.gohugo.io)
based on files in this repo's /Documentation directory.

Also clarify that new additions to Documentation are under CC-BY 4.0 terms.

Change-Id: I000e15b29a182bb88b40de3d0178bf8cc54ba8af
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: https://review.coreboot.org/19881
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2017-05-25 23:04:36 +02:00
Lee Leahy dcc4d43151 Documentation/Intel: Add vboot documentation
Add documentation which describes how to build and sign a coreboot image
which enables vboot.

TEST=None

Change-Id: Ie17b8443772f596de0c9d8afe6f4ec3ac4d4fef8
Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Reviewed-on: https://review.coreboot.org/19534
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-05-03 23:05:59 +02:00
Patrick Georgi 852debe648 Documentation: Add technote/design doc for mitigating ReBAR issue
Change-Id: Icba9d7910dfd46f32a2c46b6fd064a9cc8e3beac
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/19242
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-05-01 00:47:09 +02:00
Martin Roth ccfea16cd4 Documentation: Reflow Kconfig.md
The original document was written and committed with no regard to line
lengths.  This makes it easier to write.  Now it needs to be easier to
read, so wrap the lines at 80 characters where possible.

- A couple of headings had to be rewritten to keep them under 80
characters.  This required the addition of a new paragraph that had
the old header.
- Remove URL text that was just duplicating the URL.
- All other text is the same, just wrapped.

Change-Id: I44833c28750714fccb87296868c1ff78ab7f1d07
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: https://review.coreboot.org/19076
Tested-by: build bot (Jenkins)
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2017-04-11 16:18:57 +02:00
Martin Roth 0090192ddd Documentation/core: Update Kconfig documentation
- Remove document history.  Since the document is now stored in git,
this is no longer needed.
- Fix spacing for the kconfig_lint help output
- Add license information to the bottom of the document.

Change-Id: I9854602a6ad9b4a99bf3988e1d7662b3b426e608
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: https://review.coreboot.org/19075
Tested-by: build bot (Jenkins)
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-04-04 14:19:44 +02:00
Martin Roth b1574e3b4a Documentation: Add doxygen_platform target
Create a doxygen target that builds documentation just for the platform
that is currently selected in Kconfig.  This gives us something that is
much more useful to most people.

Change-Id: I25c3cdac2dd383b89df6389ba9011dac913a0a9b
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/15577
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-03-23 21:19:34 +01:00
Furquan Shaikh bf4845dd3a arch/x86/acpigen: Provide helper functions for enabling/disabling GPIO
In order to allow GPIOs to be set/clear according to their polarity,
provide helper functions that check for polarity and call set/clear
SoC functions for generating ACPI code.

BUG=None
BRANCH=None
TEST=Verified that the ACPI code generated remains the same as before
for reef.

Change-Id: Ie8bdb9dc18e61a4a658f1447d6f1db0b166d9c12
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/18427
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
2017-02-22 22:19:29 +01:00
Martin Roth 42c1e43cb1 Documentation: Add Kconfig document
Change-Id: I99ca65343d52e99611644c0c65f4b7feb5c58436
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/16947
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Tested-by: build bot (Jenkins)
2016-11-13 21:41:44 +01:00
Furquan Shaikh 4ef7491b22 Documentation: Add documentation for GPIO toggling in ACPI AML
This document provides information about the different functions that a
driver can use for generating ACPI code for toggling GPIO. These
functions are expected to be implemented by the SoC. It also defines the
different constraints on use of Local variables in ACPI code while
implementing these functions.

BUG=chrome-os-partner:55988

Change-Id: Ibc03d766afb6d7b75bc0dc9f79920b561f1c4a78
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/17128
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-10-29 00:13:06 +02:00
Lee Leahy d677d9cedd Documentation/Intel/Soc: Update Quark FSP build instructions
Update the FSP build instructions for Quark:
* Discuss multiple types

BRANCH=none
BUG=None
TEST=Build Quark FSP using new instructions

Change-Id: Ibc4bfe32d0eb3877d3b988bc185c73be58d44878
Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Reviewed-on: https://review.coreboot.org/16826
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-09-30 01:18:04 +02:00
Patrick Georgi 1b52e2596e Documentation: add start of documentation of the build system
Change-Id: Ic4a4b4d71852bfe0b1fc52373e88d0a53b145844
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/16150
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-08-12 20:12:18 +02:00
Elyes HAOUAS e51387896f Documentation: Capitalize RAM, ROM and ACPI
Change-Id: I06c1d0fe0e3d429e54d3777de679f9fc641f4eed
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/15927
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-07-28 20:03:36 +02:00
Martin Roth 4934818118 Documentation: Fix doxygen errors
Change-Id: I195fd3a9c7fc07c35913342d2041e1ffef110466
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/15549
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-07-12 22:41:02 +02:00
Lee Leahy dc54270210 soc/intel/quark: Pass in the memory initialization parameters
Specify the memory initialization parameters in
mainboard/intel/galileo/devicetree.cb.  Pass these values into FSP to
initialize memory.

TEST=Build and run on Galileo Gen2

Change-Id: I83ee196f5fb825118a3a74b61f73f3728a1a1dc6
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/15260
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-07-08 17:59:20 +02:00
Lee Leahy 24ba659d08 Documentation/Intel: Add feature documentation table
Add table containing feature documentation:
* Feature name with link to specification or documentation
* Linux utility name with link to utility documentation
* EDK-II utility name with link to utility documentation

Change-Id: Ie33d8563320697c12b34974286bffcadf92c016e
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/15256
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
2016-07-08 17:58:52 +02:00
Lee Leahy 8b022dd884 Documentation: Add index.html
Add the initial index.html file.  The web server is currently not
converting .md files into html.  Instead they are being downloaded in
their raw .md file format.  Use the index.html file to enable the
web server to find and process the file.

TEST=None

Change-Id: I27334ccacdb34b56946a9061132acf2808d32175
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/15218
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
2016-07-08 17:58:39 +02:00
Lee Leahy 061e0fb9ac Documentation/Intel/Board: Update the Galileo checklist
Update the Galileo board implementation checklist.

TEST=Build and run on Galileo Gen2

Change-Id: I1c88e9500d304273a3176d8b034a805920aab9bb
Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Reviewed-on: https://review.coreboot.org/15137
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-06-12 12:28:57 +02:00
Lee Leahy 40b41bc799 Documentation/Intel/Board: Add Galileo checklist
Add the Galileo implementation checklist.

TEST=None

Change-Id: I47e87a496cf3ae125d45c09fe6a36200f5fe724f
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/15012
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-06-02 02:47:29 +02:00
Lee Leahy 2a8cc3064e Documentation/Intel/Board: Add analog switch link
Add link for TI TS5A23159 specification.

TEST=None

Change-Id: I2756ded963fc7597e4db1fa151bf62630b1108d9
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/15003
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-05-31 22:02:03 +02:00