Commit Graph

4255 Commits

Author SHA1 Message Date
Zheng Bao b035f58940 amdfwtool: Null check the pointers before using them
BUG=b:188769922

Reported-by: Coverity (CID:1438963)
Change-Id: Ia520e33c9e4065236478665fb0ef047fa47c9b81
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54999
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-06-14 05:52:40 +00:00
Wisley Chen 1852303682 util: Add DDR4 generic SPD for MT40A512M16TB-062E:R
Add SPD support for DDR4 memory part

BUG=b:190020997
TEST=none

Change-Id: I423131cb674e1e5ec699c7a28e5b5e6746247b2a
Signed-off-by: Wisley Chen <wisley.chen@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55164
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-06-14 05:27:39 +00:00
Benjamin Doron d593bf7dfe util/intelp2m/fsp: Fix wrong register decoding for direction and interrupt
Using the wrong registers to build the fields led to incorrect
GPIO direction and interrupt trigger values. Change the calls
to fix the tables.

Change-Id: Icbeeb1fec6a863d0f86659c21924e15ae6765d47
Signed-off-by: Benjamin Doron <benjamin.doron00@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54973
Reviewed-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-06-12 21:21:16 +00:00
Zheng Bao addf340adf amdfwtool: Add missing license header
Change-Id: Id466e733d421602cfe0403ead95e417f0bb37eb4
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55159
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2021-06-09 05:17:25 +00:00
Zheng Bao 6be1ab67e2 amdfwtool: Move EFS related definitions to header file
EFS: Embedded Firmware Structure

These structs and macros are defined in PSP specs(#55758).
They are supposed to be used by all C sources.

Change-Id: I8c7ed9fa626b249b4aa48544316a941dc2625c60
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54942
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2021-06-09 05:17:18 +00:00
Julius Werner 218906df66 lint: checkpatch: Add SUSPICIOUS_CODE_INDENT test
This patch adds a new test to checkpatch that identifies cases where a
line after a conditional statement is incorrectly intended (possibly
indicating the mistake of forgetting to add braces), like this:

 if (a)
   b;
   c;

Unfortunately, it seems like checkpatch is partially unmaintained in
upstream Linux at the moment with maintainers either not responding at
all or not even willing to look at new patches [1]. Since detecting this
error class is important to coreboot, let's just carry this feature
locally for now.

[1] https://lkml.org/lkml/2021/4/15/1488

Signed-off-by: Julius Werner <jwerner@chromium.org>
Change-Id: I7bb90b56dfc7582271d2b82cb42a2c1df477054f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51838
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2021-06-08 22:10:07 +00:00
Zheng Bao 826f1c4610 amdfwtool: Print the entry type when dumping the firmwares
Change-Id: I07bf10e16a42a2b2ab784ee6ac4a4465b7412da6
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54900
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2021-06-07 17:11:43 +00:00
Zheng Bao e8e6043489 amdfwtool: Set the region_type as 0 for entry "BIOS level 2"
This region_type is actually not used. But we need to set it
explicitly as a known value.

We can refer "PSP spec #55758" or the link below:
   https://doc.coreboot.org/soc/amd/psp_integration.html

Change-Id: I8b914f9f02beecce707aba86248826cd9208e6c0
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54871
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2021-06-07 17:11:24 +00:00
Angel Pons 427e435b9b sb/intel/bd82x6x: Drop P_LVLx support in FADT
IO MWAIT redirection is not enabled, and C-states are reported using the
_CST ACPI object, which overrides the P_LVLx values.

Change-Id: I737bd58bcda3e7c5f6591e4c2309530ff035e2c8
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55218
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2021-06-07 11:37:17 +00:00
Patrick Georgi 54f86a5a07 util/crossgcc: Avoid complex filename sets
bin/{foo,bar,baz} can fail if one of the files doesn't exist (depending
on the shell in use). Instead, cd into the directory and list the
files individually.

Change-Id: I042b2e45fded1b63551d8e65ead2a7bbbf96b1e7
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54060
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-06-06 13:08:37 +00:00
Patrick Georgi 5a76a53034 util/crossgcc: Update to clang 12
Change-Id: I38fc64fa872e2ecb0a10fb5378b3ce0d6a02443c
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55157
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-06-06 13:08:29 +00:00
Angel Pons 7014efd8cf Revert "util/vboot_lib: Add description.md"
This reverts commit 255b6f8646.

No longer needed after commit dd01e0131a
(Revert "util/lint: Add test for documentation in util dirs") has been
submitted. Plus, `util/vboot_lib/description.md` gets deleted whenever
one runs `make -C util/cbfstool clean`, which is rather annoying.

Change-Id: Ic93da096b6186d1d2af12243a74ec597694960c4
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55162
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-06-04 12:35:40 +00:00
Angel Pons b85393742d util/cbfstool/linux_trampoline.h: Fix typo in comment
inlucde ---> include

Change-Id: I38987119ddabb08c457c9a7c8aecb8025fe2d9d3
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55161
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-06-04 12:35:14 +00:00
Amanda Huang 4f870594aa util/spd_tools: Modify MT53E1G32D2NP-046 WT:B LPDDR4 config
CB:52586 ("util/spd_tools: Add MT53E1G32D2NP-046 WT:B LPDDR4 config")
incorrectly set ranks per channel to 1. However, MT53E1G32D2NP-046 WT:B
part has 2 channels per die and 2 physical dies. Each channel in each die shares DQ-DQS lines with the channel in other die and uses separate CS lines. Thus, number of ranks per channel is 2.

This change fixes the attribute ranksPerChannel for MT53E1G32D2NP-046 WT:B in LP4x global config by setting it to 2.

BUG=b:186616388

Change-Id: Iba87754ca04c2e026a9cbc8ef07412b467140cba
Signed-off-by: Amanda Huang <amanda_hwang@compal.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55000
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
2021-06-03 15:51:12 +00:00
Arthur Heymans 71971c9d7e cbfstool/linux_trampoline.S: Fix up the e820 table
The e820 type don't fully match the LB_TAG_MEMORY types, so change all
unknown types to e820 to '2', reserved memory.

TESTED with Linuxboot: e820 now shows the CBMEM region as reserved.

Change-Id: Ie0e41c66e002919e41590327afe0f543e0037369
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55074
Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Reviewed-by: Rocky Phagura
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-06-02 07:47:01 +00:00
Felix Held 4fbab545b2 mainboards using soc/amd/picasso: use aliases for PCIe devices on bus 0
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ia6199c70163d32467abe5ba5da55c73ff62ba10f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55103
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
2021-06-01 20:37:15 +00:00
Felix Held c4eb45fa85 soc/amd/picasso: introduce and use chipset device tree
The chipset devicetree only has the essential PCIe devices enabled that
are needed for the SoC code to work. It also defines aliases for all
PCIe devices that can be used to reference the devices in the mainboard-
specific devicetrees and devicetree overrides. To make the change easier
to review that part will be done in a follow-up patch.

Despite missing in the PPR, device pci 18.7 exists on Picasso.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I6b7c3fd32579a23539594672593a243172c161c7
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50626
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
2021-06-01 20:37:04 +00:00
Patrick Georgi 67d958b640 util/cbfstool/Makefile: Check out vboot before trying to use it
Change-Id: Ie2044d73b97663f7816964c4d908a46570aafdbc
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55072
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Idwer Vollering <vidwer@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2021-06-01 10:24:01 +00:00
Arthur Heymans f2b7104308 util/cbfstool/fit.c: Fix getting the topswap table
There is a function to fetch the fit table at both the regular address
and the TS address. So reuse that function instead of attempting to
find the TS fit using some pointer aritmetics that is incorrect.

Change-Id: I9114f5439202ede7e01cd0fcbb1e3c4cdb8698b0
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54680
Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Reviewed-by: Meera Ravindranath <meera.ravindranath@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-05-27 14:38:34 +00:00
Iru Cai 6e3f048111 autoport: add a go.mod file
Go 1.16 needs this when running `go build` without GO111MODULE=off.

Change-Id: I9dcb134a68b7a726f1466a472a415c9558f60524
Signed-off-by: Iru Cai <mytbk920423@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51175
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-05-25 12:27:00 +00:00
Furquan Shaikh e59ad2e0da sconfig: Emit probe_list in all stages
`probe_list` member in `struct device` is present in all stages,
however, util/sconfig emits the list only when !DEVTREE_EARLY. This
change ensures that `probe_list` is emitted in all stages. In follow
up changes, this is used to get the correct device state using probe
conditions.

Change-Id: I61f7e909d48b616ac2127a5a9f36bdf4817a5165
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54829
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
2021-05-24 16:55:14 +00:00
Dtrain Hsu c8b22418aa util/spd_tools/lp4x: Add new memory part to to global memory definition
This new definition is for MT53E512M32D1NP-046 WT:B used on Cret.

BUG=b:183057749
TEST=Generate SPDs

Signed-off-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com>
Change-Id: Ica5df61d96d2c4cbe62a560a53bd3bd08eb121f9
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54746
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
2021-05-22 05:42:45 +00:00
Patrick Georgi b2b5781bb4 util/crossgcc: Update acpica to 20210331
Change-Id: Ic517a2b9c9b7122d2a65f67380d3ce368303d725
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54061
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Idwer Vollering <vidwer@gmail.com>
2021-05-22 05:39:05 +00:00
Paul Fagerburg 0d2d9db143 util/mb/google: add support for brya
Add the file templates for creating a new variant of Brya.

BUG=b:177017247

Signed-off-by: Paul Fagerburg <pfagerburg@google.com>
Change-Id: If141d9b43ea5b845c1855f12e03e7d0cf535d2ec
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54489
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2021-05-18 19:20:43 +00:00
Jakub Czapiga 9482807f1d util/testing/Makefile.inc: Add new line as help section separator
coreboot test targets help section was missing an empty line at the end.
This caused the next help section to be visually merged with it.
Empty line makes help output more aesthetic.

Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Change-Id: I2f7202b0a636f62b60788215058611c9c86183de
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54367
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
2021-05-18 10:09:59 +00:00
Nikolai Vyssotski 1965f650ea amdfwtool:cezanne: use correct bootloader binary for whitelist support
PSP whitelist bootloader (PSPBTLDR_WL_FILE) should be copied to type
0x73 entry and not type 0x01 (stage1 bootloader). We will also need to
change WHL BL filename (Type0x01->Type0x73) in a separate CL.

BUG=b:181135622

Change-Id: I71539a2065546547edc8a2621474cd1388b6434b
Signed-off-by: Nikolai Vyssotski <nikolai.vyssotski@amd.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/53892
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
2021-05-18 10:00:13 +00:00
Zheng Bao 806892a347 amdfwtool: Remove the misleading option characters
Change-Id: I8b0d53d5e5eb494741b7fac32029cf16cabe66d8
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52657
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
2021-05-18 05:56:55 +00:00
Patrick Georgi f963a0f8e5 util/crossgcc: Update mpc to 1.2.1
Change-Id: Ic1422464d0a95c9cba1c417aaa05e4f1fe799d26
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54048
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2021-05-12 15:26:08 +00:00
Patrick Georgi 0afb90a73b util/crossgcc: Update gmp to 6.2.1
Change-Id: I871942f66e8fc496ebe523fdab539ea20950a202
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54047
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2021-05-12 15:26:01 +00:00
Martin Roth de0fd07ca7 util/genbuild_h: Update IASL location finding code
Update the iasl path finding code to use XGCCPATH if it's set, and to
look for iasl on the path if it's not set and not under util/crossgcc.

On the jenkins builders, iasl is in the path, not in util/crossgcc/xgcc.

On the systems of people who have multiple copies of coreboot, it makes
sense to just have a single copy of the toolchain and define XGCCPATH in
the environment to point to it.

Previously, either of these situations resulted in a warning from the
genbuild_h tool that iasl was not found under util/crossgcc, which was
true, but not particularly relevant, and generated confusion.

If xcompile already existed before make was run, the correct path would
be found, but on an initial build, this check couldn't find iasl.

BUG=None
TEST=Build with iasl in /util/crossgcc/xgcc/bin, in the path and in a
directory pointed to with XGCCPATH.

Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: Ic2f8dca0be8bfb54d3c672fab6cf6f005bb394c3
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54001
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2021-05-12 15:14:28 +00:00
Idwer Vollering 9a05601341 util/cbfstool: Do not set -D_XOPEN_SOURCE on FreeBSD
Fixes compilation on FreeBSD CURRENT, and possibly other releases.

The compiler, clang, complained about:
util/cbfstool/cbfstool.c:181:40: error: implicit declaration of function 'memmem' is invalid in C99 [-Werror,-Wimplicit-function-declaration]
util/cbfstool/cbfstool.c:181:31: error: incompatible integer to pointer conversion initializing 'struct metadata_hash_anchor *' with an expression of type 'int' [-Werror,-Wint-conversion]

Signed-off-by: Idwer Vollering <vidwer@gmail.com>
Change-Id: I45c02a21709160df44fc8da329f6c4a9bad24478
Reviewed-on: https://review.coreboot.org/c/coreboot/+/53996
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-05-10 23:01:52 +00:00
Jonathan Zhang 4caa05e4ce inteltool: add initial support for Emmits Burg PCH
Signed-off-by: Jonathan Zhang <jonzhang@fb.com>
Change-Id: I6a4027bf51b3a189e64211e77621b3dd6c80b00d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52864
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2021-05-10 14:13:10 +00:00
Jonathan Zhang b18e194257 inteltool: add initial suppot for Sapphire Rapids Scalable Processor
Intel Sapphire Rapids Scalable Processor is a 4th generation
processor of Intel Xeon Scalable Processor family.

Signed-off-by: Jonathan Zhang <jonzhang@fb.com>
Change-Id: Idf492d6e7993b9d55d6cd865e721c81876cee9a4
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52863
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-05-10 14:12:57 +00:00
Arthur Heymans ee85d00ed6 util/intelp2m: Set GO111MODULE environment parameter explicitly
With go1.16 the default for GO111MODULE changed to on which break
building this tool.

Change-Id: I93a516ff76c8da4b7f37157d58ecd4c0b09c582c
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52862
Reviewed-by: Jonathan Zhang <jonzhang@fb.com>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Reviewed-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-05-05 22:46:18 +00:00
Tim Wawrzynczak 54c3662a57 util/sconfig: Fix null pointer dereferences
Should use `name` instead of `field->name`, because `field is supposed
to be NULL at this point.

TEST=add new field from bits 29-64 to volteer, ensure sconfig prints an
error instead of segfaulting.

Change-Id: I933330494e0b10e8494a92e93d6beb58fbec0bc1
Found-by: Coverity CID 1452916
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52888
Reviewed-by: Duncan Laurie
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-05-05 20:26:38 +00:00
Tim Wawrzynczak 13e240c602 util/sconfig: Add support for discontiguous FW_CONFIG fields
Sooner or later, some board was going to need extra FW_CONFIG bits for
a field that was already in production, so this patch adds support for
adding extra (unused) bits to a field.

The extra are appended via a syntax like:
`field FIELD_NAME START0 END0 | START1 END1 | START2 END2 ...`
and the suffixed bits are all treated as if they are contiguous when
defining option values.

BUG=b:185190978
TEST=Modified volteer fw_config to the following:
field AUDIO 8 10 | 29 29 | 31 31
        option NONE 0
	option MAX98357_ALC5682I_I2S 1
        option MAX98373_ALC5682I_I2S 2
	option MAX98373_ALC5682_SNDW 3
        option MAX98373_ALC5682I_I2S_UP4 4
        option MAX98360_ALC5682I_I2S 5
        option RT1011_ALC5682I_I2S 6
        option AUDIO_FOO 7
	option AUDIO_BAR 8
        option AUDIO_QUUX 9
        option AUDIO_BLAH1 10
        option AUDIO_BLAH2 15
        option AUDIO_BLAH3 16
        option AUDIO_BLAH4 31
end

which yielded (in static_fw_config.h):
 FW_CONFIG_FIELD_AUDIO_MASK 0xa0000700
 FW_CONFIG_FIELD_AUDIO_OPTION_NONE_VALUE 0x0
 FW_CONFIG_FIELD_AUDIO_OPTION_MAX98357_ALC5682I_I2S_VALUE 0x100
 FW_CONFIG_FIELD_AUDIO_OPTION_MAX98373_ALC5682I_I2S_VALUE 0x200
 FW_CONFIG_FIELD_AUDIO_OPTION_MAX98373_ALC5682_SNDW_VALUE 0x300
 FW_CONFIG_FIELD_AUDIO_OPTION_MAX98373_ALC5682I_I2S_UP4_VALUE 0x400
 FW_CONFIG_FIELD_AUDIO_OPTION_MAX98360_ALC5682I_I2S_VALUE 0x500
 FW_CONFIG_FIELD_AUDIO_OPTION_RT1011_ALC5682I_I2S_VALUE 0x600
 FW_CONFIG_FIELD_AUDIO_OPTION_AUDIO_FOO_VALUE 0x700
 FW_CONFIG_FIELD_AUDIO_OPTION_AUDIO_BAR_VALUE 0x20000000
 FW_CONFIG_FIELD_AUDIO_OPTION_AUDIO_QUUX_VALUE 0x20000100
 FW_CONFIG_FIELD_AUDIO_OPTION_AUDIO_BLAH1_VALUE 0x20000200
 FW_CONFIG_FIELD_AUDIO_OPTION_AUDIO_BLAH2_VALUE 0x20000700
 FW_CONFIG_FIELD_AUDIO_OPTION_AUDIO_BLAH3_VALUE 0x80000000
 FW_CONFIG_FIELD_AUDIO_OPTION_AUDIO_BLAH4_VALUE 0xa0000700

Change-Id: I5ed76706347ee9642198efc77139abdc3af1b8a6
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52747
Reviewed-by: Duncan Laurie <duncan@iceblink.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-05-03 07:40:57 +00:00
Zheng Bao 6f0b361aee amdfwtool: Cleanup the message of help
1. Wrap the long lines.
2. Align the message.
3. Add new SOC name, Cezanne.
4. Fix the cases.

Change-Id: Id537d7c9b77641289274c1b2b6f606e2be37ac6b
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52697
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2021-04-30 23:15:26 +00:00
Daniel Campello bd64f8ef2e migrate out of flashrom deprecated options
This change replaces --diff and --fast-verify for the supported
equivalent flashrom options

Signed-off-by: Daniel Campello <campello@chromium.org>
Change-Id: I8c48c7f819f968c3ddd94278415e5e9e0ef93924
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52717
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
2021-04-29 01:05:29 +00:00
Martin Roth 7e241bff18 util/spd_tools: Add MT53E1G32D2NP-046 WT:B LPDDR4 config
The revision B version of the MT53E1G32D2NP-046 memory chip will be used
in the next guybrush build.  It has a different internal layout than the
Revision A part, with 2 ZQ lines per module instead of 1.

BUG=b:186027256
TEST=Build only

Signed-off-by: Martin Roth <martinroth@chromium.org>
Change-Id: I066f40eb890648a9be17cfe0cee20d299000c11a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52586
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
2021-04-23 15:26:53 +00:00
Nico Huber 2d82195f97 util/kconfig_lint: Update handle_expressions()
More relational operators were added to Kconfig in 2015. Now we can
make use of them.

Change-Id: I640e5c3ee1485348f09fcb0b0d5035eb53a2c98e
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52068
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-04-18 20:35:37 +00:00
Nico Huber f6b2baa3e8 util/kconfig_lint: Turn handle_expressions() into a parser
I wished there was a way to do this in smaller steps, but with
every line fixed an error somewhere else became visible. Here
is a (probably incomplete) list of the issues:

* Only one set of parentheses was supported. This is a hard
  to solve problem without a real parser (one solution is to
  use an recursive RE, see below).

* The precedence order was wrong. Might have been adapted just
  to give a positive result for the arbitrary state of the tree.

* Numbered match variables (e.g. $1, $2, etc.) are not local.
  Calling handle_expressions() recursively once with $1, then
  with $2, resulted in using the final $2 after the first
  recursive call (garbage, practically).

Also, symbol and expression parsing was mixed, making things
harder to follow.

To remedy the issues:

* Split handle_symbol() out. It is called with whitespace
  stripped, to keep the uglier REs in handle_expressions().

* Match balanced parentheses and quotes when splitting
  expressions. In this recursive RE

    /(\((?:[^\(\)]++|(?-1))*\))/

  the `(?-1)` references the outer-most group, thus the whole
  expression itself. So it matches a pair of parentheses with
  a mix of non-parentheses and the recursive rule itself inside.
  This allows us to:

* Order the expression matches according to their precedence
  rules. Now we can match `<expr> '||' <expr>` first as we should
  and everything else falls into its place.

* Remove the bail-out that silenced the undefined behavior.

Change-Id: Ibc1be79adc07792f0721f0dc08b50422b6da88a9
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52067
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-04-18 20:35:18 +00:00
Patrick Georgi 39891c00da checkpatch_json: Mark robotic comments as robotic
Gerrit now knows to differentiate between "regular" comments and
"robot" comments, with some later changes to the UI in the pipeline
(e.g. to filter out robot messages)

Change-Id: I3a545d1cf6c04b331964becd2b24eb38018394eb
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51504
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
2021-04-15 19:08:00 +00:00
Michael Niewöhner a0c7f34302 maintainers.go: Work around common mistake in MAINTAINERS
Gerrit is able to add reviewers based on entries in the `MAINTAINERS`
file. For inclusion and exclusion matches either paths or regular
expressions can be used. The syntax is described in the header of the
file.

When matching a path, there are two sensible possibilities:
  - `path/to/file`  matches a file.
  - `path/to/dir/`  matches a folder including its contents recursively.
  - `path/to/dir/*` matches all files in that folder, without recursing
                    into its subfolders.

The trailing slash in the second example is essential. Without it, only
the directory entry itself matches when, for example, the folder gets
deleted, renamed or its permissions get modified. Reviewers in the list
won't get added to changes of any files or directories below that path.

However, from time to time entries get added without this trailing
slash. Thus, implement a workaround in `maintainers.go` to check, if a
path entry is actually a directory. In such case a trailing slash gets
appended, so that the contents will match, too.

Example: `path/to/dir` will become `path/to/dir/`

Tests:
1. output before and after does not differ
2. manual test of resulting regex when running `maintainers.go`

Change-Id: Ic712aacb0c5c50380fa9beeccf5161501f1cd8ea
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52276
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-04-14 12:18:58 +00:00
Michael Niewöhner 158fed9ee7 maintainers.go: correct handling of globs
maintainers.go does not handle globs as described in MAINTAINERS.
Instead of only matching the files inside a directory, it also matches
everything below. Also, a glob used in between (`e.g. path/to/*/dir`)
could lead to matching many more paths unexpectedly.

This is caused by the way paths using globs are converted to regegular
expressions for use with gerrit:

1. The script converts all paths with trailing slash to a path with
   trailing glob. That means, a recursive match on a directory gets
   converted to match only the files in the directory (at least
   according to the documentation - if there wasn't 2).

   Example: `path/to/dir/` becomes `path/to/dir/*`

2. When converting the path to a regex, all globs get converted to
   prefix matching by replacing the glob by `.*`. Instead of only
   matching the files in the directory, everything below matches,
   which is a) not what the documentation states and b) the opposite
   of what 1. did first.

   Example: `path/to/dir/*` becomes `^path/to/dir/.*$`

In sum, this leads to all sorts of issues. Examples:
  - `path/*/dir`    becomes `^path/.*/dir$`
  - `path/to/dir/*` becomes `^path/to/dir/.*$`
  - `path/to/*.c`   becomes `^path/to/.*\.c$`

This change fixes that behaviour by:
- dropping the wrong conversion from 1. above.
- fixing glob matching by replacing `*` by `[^/]`.
- handling paths with trailing `/` as prefix, as documented.

The change was not split because these changes depend on each other and
splitting would break recursive matching between the commits.

Tests:
1. diffed output before and after is equal (!= the same)
2. manual testing of glob matching

Change-Id: I4347a60874e4f07e41bdee43cc312547bea99008
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52275
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2021-04-14 10:50:18 +00:00
Nico Huber 7cc14ac25d Rename do_printk() to printk()
The indirection seems unnecessary. The macros throw features like
`-Wmisleading-indentation` off, though.

Default build for QEMU/Q35 is unchanged.

Change-Id: Ie4eab935a367b5ad6b38225c4973d41d9f70ef10
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51887
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-04-14 10:38:09 +00:00
Michael Niewöhner 64d31f48d2 lint: MAINTAINERS: check path matches to not only cover the directory
Gerrit is able to add reviewers based on entries in the `MAINTAINERS`
file. For inclusion and exclusion matches either paths or regular
expressions can be used. The syntax is described in the header of the
file.

When matching a path, there are two sensible possibilities:
  - `path/to/file`  matches a file.
  - `path/to/dir/`  matches a folder including its contents recursively.
  - `path/to/dir/*` matches all files in that folder, without recursing
                    into its subfolders.

The trailing slash in the second example is essential. Without it, only
the directory entry itself matches when, for example, the folder gets
deleted, renamed or its permissions get modified. Reviewers in the list
won't get added to changes of any files or directories below that path.

Thus, add a linter script to ensure a path match on a directory always
ends with `/` or `/*` as shown above.

Change-Id: I9873184c0df4a0b4455f803828e2719887e545db
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52210
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2021-04-13 14:29:43 +00:00
Alexander Couzens cf68f34fc2 util/genbuild_h: add COREBOOT_BUILD_EPOCH seconds since epoch
To use SOURCE_DATE_EPOCH for the kernel build, extend genbuild_h to
contain COREBOOT_BUILD_EPOCH.

Change-Id: Iaa79d3e7df8101a1ba1b37a361d8992f7eab2d52
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51362
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2021-04-09 06:08:10 +00:00
Martin Roth a789607f84 util/bincfg/Makefile: change ./bincfg to $(abspath $(TARGET))
This change was promised as a follow-up in
change ID: Ic0302f663cbc931325334d0cce93d3b0bf937cc6

Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: I9a41b46cc90684746e2b240c8ee442df1b3d7cf5
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52111
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2021-04-07 08:49:03 +00:00
Julius Werner 514a4bcb23 lint: checkpatch: Only exclude specific src/vendorcode/ subdirectories
Some of the src/vendorcode/ directories are used to import a whole
codebase from somewhere else which uses a completely different coding
style. For those directories, excluding them from checkpatch makes
sense. However, other directories are simply implementing
vendor-specific extensions that were written by coreboot developers
specifically for coreboot in coreboot's coding style. Those directories
should be covered by checkpatch.

This patch narrows the existing blanket exception of src/vendorcode/ to
the amd, cavium, intel and mediatek directories (which actually include
large amounts of foreign source). The eltan, google and siemens
directories (which seem to contain code specifically written for
coreboot) will now be covered by checkpatch.

Signed-off-by: Julius Werner <jwerner@chromium.org>
Change-Id: I1feaba37c469714217fff4d160e595849e0230b9
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51827
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-04-06 16:04:41 +00:00
Martin Roth 7014f8258e util/crossgcc: Add date to the toolchain revision
With the current version method, it's not possible to determine if
a different version is older or newer than the current version without
digging into the repository and finding the dates for the version
numbers.

This change adds the commit date to the start of the toolchain version
which will let us tell at a glance how old or new the toolchain is.

It's not perfect because multiple toolchain commits can go in on the
same day, but adding the time made the string even longer, and really
doesn't help that much.

Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: I9c6d27667b922dc15e7a6e132e1beff69eed839c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48901
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2021-04-06 07:52:22 +00:00