Commit Graph

887 Commits

Author SHA1 Message Date
Patrick Georgi 6388d49143 Flashrom is now moved over to its own repository.
Add a note to the coreboot-v2 version of the tree that
contains the new location.

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4215 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-26 18:17:40 +00:00
Patrick Georgi 79cba771fc Trivial: allow "," in filenames
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4213 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-26 07:15:19 +00:00
Stephan Guilloux baa4374cad The flashrom makefile wants to redirect both stdout and stderr to
/dev/null for one compile test.
The old variant of using &>/dev/null works on bash and zsh, but not on
dash and tcsh. dash and tcsh interpret it as "background command and
truncate /dev/null" which is not what we want. >& works on tcsh and
bash, but it is not POSIX compliant.
Since make uses /bin/sh and /bin/sh has to be POSIX compliant, we can
use the POSIX variant of stderr and stdout redirection.

>/dev/null 2>&1
is POSIX compliant. This is specified in SuSv3, Shell Command Language,
sections 2.7.2 and 2.7.6.

Signed-off-by: Stephan Guilloux <stephan.guilloux@free.fr>
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ward Vandewege <ward@gnu.org>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4211 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-25 22:07:28 +00:00
Myles Watson 72631a01fa The master cbfs record was located at the end of the flash and overwrote
anything that was there.  For ck804 or mcp55-based machines that was the
romstrap.

The fix is simple:
1. Put the master cbfs record above the bootblock instead of on it.

Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4209 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-25 12:39:04 +00:00
Patrick Georgi fe62016512 Enable cbfs payload compression (the "l" flag) if payloads are
supposed to be compressed (with lzma only, as cbfstool lacks
nrv2b compression support for now)

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4208 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-25 07:33:25 +00:00
Uwe Hermann a5de85cb86 MAX may already be defined. Also, fix smaller cosmetics (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4205 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-24 16:17:41 +00:00
Stephan Guilloux 6a30a5f891 flashrom: Support MX25L3235D
Signed-off-by: Stephan Guilloux <stephan.guilloux@free.fr>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4200 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-23 22:51:56 +00:00
Uwe Hermann 424638e7bb Add 'install' target for ectool (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4199 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-23 22:22:47 +00:00
Myles Watson 06db2c4482 Fix an uninitialized variable. If it didn't end up being zero it sometimes
caused a seg fault, sometimes executed somewhere else.  Also add an error if
the algorithm is unknown.

Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Ward Vandewege <ward@gnu.org>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4198 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-23 18:46:32 +00:00
Myles Watson 436b9de0a3 This patch cleans up Makefile generation. It removes the
coreboot.romfs file since CBFS will eventually be the standard.

Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4197 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-23 17:01:37 +00:00
Uwe Hermann a44228c435 Don't duplicate option description in README, the manpage already has
that info. Also, additional small cosmetic fix.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4196 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-23 14:57:55 +00:00
Stefan Reinauer 476053356b Instead of just
coreboot-v2 $ util/abuild/abuild -t kontron/986lcd-m $PWD

you can now also say 

  coreboot-v2 $ util/abuild/abuild -t kontron/986lcd-m/Config-myconf.lb $PWD

and instead of using Config-abuild.lb or creating a temporary Config-abuild.lb,
abuild will use the existing Config-myconf.lb to build your image. 

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>




git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4192 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-22 23:39:19 +00:00
Stefan Reinauer f182456013 mini fix to reliably compile inteltool on darwin, and on Linux both on x86/x86_64.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4190 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-22 23:17:44 +00:00
Myles Watson 6315274cc8 This patch fixes the parser. '|' has special meaning so [|] is used.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4187 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-22 22:25:45 +00:00
Carl-Daniel Hailfinger e5b44ab4dc All "unknown xy SPI chip" entries claim to have status UNTESTED for
probe/read/erase/write. That is incorrect.

A bit of confusion comes from how the #defines are named. We call them
TEST_BAD_*, but the message printed by flashrom says:
"This flash part has status NOT WORKING for operations:"

Something that is unimplemented is definitely not working.

Neither of the chip entries mentioned above has erase or write functions
implemented, so erase and write are not working.
Since their size is unknown, we can't read them in. That means read is
not working as well.
Probing is a different matter. If a chip-specific probe function had
matched, we wouldn't have to handle the chip with the "unknown xy SPI
chip" fallback. I'm tempted to call that "not working" as well, but I'm
open to discussion on this point.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4177 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-22 13:33:43 +00:00
Uwe Hermann 257ae3f520 Quick 'indent' run on ectool with some additional manual cosmetic fixes.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4174 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-22 12:28:14 +00:00
Stefan Reinauer 0408bdd240 don't ignore return values (trivial)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4173 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-22 12:14:39 +00:00
Stefan Reinauer 73d5daaf97 * Allow coreboot to use the full 256 bytes of CMOS memory
* Make functions out of the accessor macros in mc146818rtc.c
* don't hide reserved cmos entries from coreboot, only from the user.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4170 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-22 09:03:08 +00:00
Patrick Georgi 18d7320d17 Remove the requirement for payload.sh files to be executable. This
helps if the file is generated from patches, esp. if that happens
often (eg. with quilt)

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4165 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-22 08:10:48 +00:00
Stefan Reinauer b5ab323a40 A small utility to dump the RAM of a laptop's Embedded/Environmental
Controller. Nothing fancy, does not know any laptops, EC types, or what
the values mean. It just dumps them. For the dump method, have a look at
the ACPI 3.0b spec.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4163 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-22 07:23:00 +00:00
Carl-Daniel Hailfinger c6236edd47 flashrom: Add support for Gigabyte GA-MA790FX-DQ6. This board uses
IT8718F LPC->SPI translation for the flash chip.

Tested by Mateusz Murawski.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Mateusz Murawski <matowy@tlen.pl>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4161 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-21 23:03:20 +00:00
Patrick Georgi 2d3e712d56 Add an "-l <num>" argument to abuild that sets the LOGLEVEL variables
to the specified value.

Only change Config-abuild.lb, as the others are for manual buildtarget
use - adding __LOGLEVEL__ there would kill the build as it isn't
replaced by the actual content.

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4153 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-21 20:31:18 +00:00
Patrick Georgi 16cdbb244c Eliminate various issues brought up by scan-build.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4152 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-21 20:14:31 +00:00
Patrick Georgi 5cda45d5ec scan-build prefers -include over --includes=, gcc knows both.
With this change, romcc knows -include and the build system uses it.

Also use a full path to settings.h because scan-build has trouble
finding it otherwise.

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Joseph Smith <joe@settoplinux.org>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4151 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-21 12:41:55 +00:00
Stephan Guilloux 7bd658873c flashrom: Support Macronix MX2512805D flash chip
Signed-off-by: Stephan Guilloux <stephan.guilloux@free.fr>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4150 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-21 01:47:16 +00:00
Stephan Guilloux b9ceb65434 flashrom: Trivial indent fix
Signed-off-by: Stephan Guilloux <stephan.guilloux@free.fr>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4149 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-21 01:46:07 +00:00
Stephan Guilloux 1089509725 After verification in datasheets, all MX25 accept the same opcodes
0x60 and 0xC7 for Chip Erase.

Signed-off-by: Stephan Guilloux <stephan.guilloux@free.fr>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4146 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-20 22:54:13 +00:00
Myles Watson feaaedc1cf This patch adds
cbfstool extract [FILE] [NAME]

It also factors out the csize calculation in rom_add, and fixes rom_delete so
that it can handle deleting the last entry.

Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4144 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-20 21:38:11 +00:00
Luc Verhaegen caf884ca8c flashrom: board_enables: reconstruct table.
This patch restores the pciid based board matching table. It makes this
table readable and hackable again, and the only disadvantage is that the
right margin is way beyond the rather dogmatic 80. All 0x0000 pci ids have
been string replaced by 0 to more easily spot missing ids, and extra
comments have been added to explain how the various entries are used.

Signed-Off-By: Luc Verhaegen <libv@skynet.be>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4142 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-20 12:38:17 +00:00
Peter Stuge 4399d3c832 flashrom: Trivial README change Flashrom->flashrom
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4141 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-20 12:34:30 +00:00
Stephan Guilloux f5f0c69628 flashrom: MX25L1605 and 1635 accept Chip Erase opcodes 60 and C7
Signed-off-by: Stephan Guilloux <stephan.guilloux@free.fr>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4139 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-19 23:24:26 +00:00
Stephan Guilloux 15bbfb8418 Add MX25L1635D support, as discussed on #coreboot.
Signed-off-by: Stephan Guilloux <stephan.guilloux@free.fr>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4138 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-19 23:04:00 +00:00
Peter Stuge b1ec2ac62d flashrom: Add VIA PC3500G board. It has SPI flash behind ITE8716 on LPC.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: illdred <illdred@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4132 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-17 23:01:45 +00:00
Myles Watson d1be3ba633 Add include to config.g
Usage: 

include path

path can be relative to the current directory or absolute starting at /src.

I tested it with:

include /config/absolute.lb
include relative.lb

in /src/northbridge/amd/amdk8/Config.lb
which included
   /src/northbridge/amd/amdk8/relatvie.lb
   /src/config/absolute.lb

Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4131 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-17 17:58:34 +00:00
Myles Watson 1eb1a61e07 There are two identical cfgfile rules in config.g. Remove one of them.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4128 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-17 16:11:24 +00:00
Myles Watson a80a61049b This patch allows you to add lines of the form
pci_rom PATH vendor_id = # device_id = #

to Config.lb files.  No more changing the ROM_SIZE to add an option ROM, and no more manual prepending.

Examples:

pci_rom ../ragexl.rom vendor_id = 0x1002 device_id = 0x4752
pci_rom ../nic.rom vendor_id = 0x1100 device_id = 0x4152

Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4127 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-17 13:43:46 +00:00
Uwe Hermann 4e006407ec Add -r|--remove option to force abuild to remove the output directory
after every board build, in order to save disk space if you don't need
the actual output files.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4119 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-15 16:07:27 +00:00
Uwe Hermann d086e5d966 Some coding style and consistency fixes (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4117 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-15 10:52:49 +00:00
Peter Stuge 45ae92ff1a util/cbfstool/tools/rom-mk*->cbfs-mk* rename
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4114 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-14 19:48:32 +00:00
Peter Stuge 483b7bbd77 v2/src romfs->cbfs rename
This also has the config tool changes in v2/util.

Rename romfs.[ch]->cbfs.[ch] and sed romfs->cbfs romtool->cbfstool ROMFS->CBFS

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4113 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-14 07:40:01 +00:00
Peter Stuge ef4d7d4a67 util: romfs->cbfs rename
I noticed this before sed, but forgot to change it back after sed.

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4111 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-14 00:26:24 +00:00
Peter Stuge 1d862ded11 v2/util: romfs -> cbfs rename
It's all sed here. romfs->cbfs, ROMFS->CBFS, romtool->cbfstool

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4110 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-14 00:08:34 +00:00
Uwe Hermann 5c4f8392e0 Fix typo. Add missing copyright year.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4107 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-13 21:35:49 +00:00
Uwe Hermann 4eb37059ce Mention a few more flash chip packages in README/manpage.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4092 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-11 13:59:00 +00:00
Stefan Reinauer 1da9a79a06 move architecture override before cross compiler detection, or the Sandpoint
skeleton will have get a cross compiler before it gets the architecture set 
to SKIP. Pretty much build system internal, so self-acked.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4091 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-10 23:02:48 +00:00
Uwe Hermann 708ccac6ee Add a note that 'modprobe msr' might be required.
Remove trailing whitespace. Fix typos.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4090 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-10 21:05:56 +00:00
Uwe Hermann cd2cbf7200 Fix typo.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4089 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-10 14:49:14 +00:00
Uwe Hermann a0eeef324f Various manpage / README fixes:
- Improve description a bit, especially wrt chip packages and
   protocols.

 - Add some missing parameters to manpage option descriptions.

 - Remove long obsolete DoC support note.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4088 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-10 14:41:29 +00:00
Mondrian nuessle 712f325237 Fixed the typo should indeed be a 0x2e.
Tested on an iWILL DK8-HTX board.

Signed-off-by: Mondrian nuessle <nuessle@uni-hd.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4086 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-09 14:28:36 +00:00
Stefan Reinauer d40f7db2d9 Only build romfs on those target that have CONFIG_ROMFS enabled.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4083 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-08 06:41:06 +00:00