Commit Graph

5084 Commits

Author SHA1 Message Date
Felix Singer 806951a1bc util/testing/Makefile.inc: Add missing dash to scanbuild switch
The test-abuild target fails since the `scan-build` switch is missing a
dash. Fix it.

Change-Id: Iae10f639c43fed7709698e620e732cddce5658d8
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74240
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
2023-08-21 17:49:53 +00:00
Martin Roth 536bb0bebc util/testing: Separate ccache option from abuild options
scanbuild and ccache don't work together, so separate ccache from the
rest of the abuild options. All of the other tests get ccache, but
scanbuild never does.

Signed-off-by: Martin Roth <gaumless@gmail.com>
Change-Id: If057ed20c687ac8b501d20c6b4af91f8c0ab84b7
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77326
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
2023-08-21 17:49:39 +00:00
Martin Roth 1e193d01ea util/docker/jenkins-node: Don't install python modules as root
When installing the python modules with pip3 as root, the installer
throws a lot of warnings about conflicts and recommends that it not
be run that way.  This change installs the python modules as the
coreboot user instead. The --break-system-packages argument can now
be removed.

It takes along some other changes made to the coreboot home directory
which also don't need to be run as root, and now adds the .local/bin
directory into the path.

The trailing docker PATH configuration is discarded as cleanup - it
doesn't have any effect.  Nothing uses it in the Dockerfile, and it
doesn't end up updating the path, which is set by /etc/profile.

Change-Id: Ie8273009bb527e267584bba84504191aa7294ca3
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76855
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-08-21 17:05:29 +00:00
Martin Roth 50a09cfe8a util/docker: Update the coreboot-sdk from libfreetype6 to libfreetype
The libfreetype6-dev has been a transitional package pointing at
libfreetype-dev for a while now. The libfreetype6-dev package is
currently out of date in debian sid, so it's a good time to switch
away from it.

TEST=Rebuild coreboot-sdk

Signed-off-by: Martin Roth <gaumless@gmail.com>
Change-Id: If40e9eacf871d3840745ea18ec2ff5975cc62da7
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77328
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-08-21 16:08:36 +00:00
Nicholas Chin 8d45f9aaae util/board_status: Switch branch to main for uploading results
The default branch for the board-status repo was renamed to main, and
thus the -u option for board_status.sh no longer works as it tries to
push to master. Update the branch accordingly.

TEST: board_status.sh is able to upload results to review.coreboot.org
using the -u flag.

Change-Id: Ic90e95d8701e21c4ae30a7ac85560eebe7658d79
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77324
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
2023-08-21 12:14:56 +00:00
Arthur Heymans 563f7afa04 util/amdfwtool: Add Genoa support
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Change-Id: I83e3c383faec0fd7b2cf768b7a4c237edd986666
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76469
Reviewed-by: Varshit Pandya <pandyavarshit@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
2023-08-21 12:11:57 +00:00
Felix Singer ebb1694e85 util/docker/coreboot-sdk: Exclude recommended packages from installation
Excluding the "recommended" packages reduces the size of the container
image from ~8.40GB to ~7.23GB.

Install the following packages in addition as they are useful for one or
the other case, or at some point even required:

  * ca-certificates
  * less
  * neovim
  * openssh-client

Change-Id: Ic38ba75765e3a0c21bbfe3f380880c9ac575d0d2
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76085
Reviewed-by: Nicholas Chin <nic.c3.14@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-08-20 21:51:43 +00:00
Felix Singer bbb2f30ba5 util/docker/coreboot-sdk: Install an explicit version of GNAT
While Debian Sid provides GCC version 13, GNAT is still on version 12.
To keep them in sync, install GNAT 13 explicitly instead of the meta
package that is still referring to GNAT 12.

The coreboot toolchain including GNAT still compiles fine.

Change-Id: Ifb2b4c5fbaf3c0a8a78f6ebe244e2ccfec664b41
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77191
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
2023-08-20 21:51:19 +00:00
Martin Roth 873ebf201f util/lint/kconfig_lint: Exclude site-local directory by default
The site-local directory is not checked into the coreboot tree, so this
change excludes it by default. By adding the site-local directory,
an issue could be missed in the rest of the coreboot tree.

This change also adds a new command-line argument of -S or --site_local
that re-enables the site-local checking.

Signed-off-by: Martin Roth <gaumless@gmail.com>
Change-Id: I95efa3e7b2cbb84e5c84d263222d8e914626d314
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77138
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2023-08-17 21:31:45 +00:00
Martin Roth 54216dd9aa util/docker: Add docker-jenkins-shell target
The docker-shell target was originally intended to point at the
docker-jenkins-node image, and was documented as such. It was actually
split into two targets - docker-shell and docker-jenkins-shell.

This fixes the documentation for docker-shell and adds new help
for docker-jenkins-shell. The docker-jenkins-shell target is also
noted as phoney now.

Signed-off-by: Martin Roth <gaumless@gmail.com>
Change-Id: Ib3ce82f6a73a2f81e5ae51ce8063ae4e59ef67db
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76854
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
2023-08-15 16:49:12 +00:00
Martin Roth 3749c9f1c4 util/lint: Add SPDX checker for makefiles
Now that all of the makefiles under the src tree have SPDX headers,
add that expectation to the license header lint tool by removing
the exception for Makefile.inc.

Signed-off-by: Martin Roth <gaumless@gmail.com>
Change-Id: Iab9d3262621af09a1c625378ae2e61e8a736cdf8
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76952
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
2023-08-15 16:31:30 +00:00
Keith Hui 77c226ac9b Documentation: Bring back abuild documentation
Based on contents from coreboot wiki[1], this patch adds much needed
documentation for the very important abuild utility.

On top of what was there:
- Mainboard targets have been updated
- Added example for building one variant of one board
- Added example for building boards selectively and/or with custom
  configurations using --skip_set/--skip_unset, -K, and config files

[1] https://www.coreboot.org/Abuild

Change-Id: I69701eaeef616828bc30736aba2f617e844a3148
Signed-off-by: Keith Hui <buurin@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76775
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
2023-08-12 21:00:46 +00:00
Yu-Ping Wu 42af60c166 util/scripts/update_submodules: Fix branch name greping
The command "git branch -a | grep -q ${branch}" may not exit with 0 when
pipefail is set. "grep -q" exits immediately with exit code 0 as soon as
a match is found. However, at that point "git branch -a" may be still
writing to the pipe, leading to SIGPIPE. When pipefail is set,
PIPESTATUS 141 will be returned. Fix the problem by not using "grep -q".

Also fix the branch name in the generated commit subject.

Change-Id: Ic07efb5e2a4f3b7bbc6e76da9e026771bc685bdb
Signed-off-by: Yu-Ping Wu <yupingso@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77085
Reviewed-by: Yidi Lin <yidilin@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-08-10 12:40:54 +00:00
Michał Żygowski 472d83bb0a intetool: Add support for 700 series PCH
The change does the following:

- adds PCH IDs for 700 series chipsets per the DOC# 619362 rev 2.2
- updates GPIO table for PCH-S per the DOC# 618659 rev 2.1
- enables dumping GPIOs for 700 series PCH

Change-Id: I4509ad714772ce90cdee5135227c02640acb6085
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75873
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
2023-08-09 22:00:00 +00:00
Michał Żygowski 8c1154dc61 superiotool/ite: Add IT8784E support
IT8784E is basically a IT8786E stripped from serial ports 3-6.
There are very few minor register differences in EC IO space and GPIO
LDN, which are covered by this patch.

Based on IT8784E-I Preliminary Specification V0.7.1 (non-public).

TEST=Dump SIO configuration on Protectli VP4670 (vault_cml).

Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Change-Id: I5de8aeaff9697b854281391083f77a1083d12fe6
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74172
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
2023-08-09 21:59:02 +00:00
Elyes Haouas 281d6623f2 lint/checkpatch.pl: Check for 0-length and 1-element arrays
Use C99 flexible arrays instead of deprecated fake flexible arrays.
This reduce difference with upstream.

Change-Id: I24016493280e22f34ae5cce49fe7c1f520270f9a
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76869
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
2023-08-09 20:42:08 +00:00
Elyes Haouas b8c0e326a3 lint/checkpatch: Add check for unnecessary <signed> int declarations
This reduce the difference with linux v6.5-rc4.

Change-Id: I64bbc09b531ea217514601386dd517af92aa40f1
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70200
Reviewed-by: Martin L Roth <gaumless@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-08-09 20:41:37 +00:00
Elyes Haouas e572765be1 lint/checkpatch: Add check for old-style declarations
This reduce the difference with linux v6.5-rc4. and check for
const static or static <non ptr type> const declarations.

Change-Id: Ib4b37e130f2edbfe0385f0707a8c910a244bcfc7
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70202
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
2023-08-09 20:41:21 +00:00
Elyes Haouas dcb59dcec4 lint/checkpatch: Add check for initialized const char arrays
This reduces the difference with linux v6.5-rc4.

Change-Id: I9f0e9f12a177c32b401fda74cbb30c5c259b3744
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70201
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
2023-08-09 20:40:48 +00:00
Elyes Haouas 32cae13714 lint/checkpatch.pl: Update check for TRAILING_STATEMENTS
This reduces the difference with linux v6.5-rc4.

Change-Id: I59d9619f2e58f24e0a5474bcfa79351e3afb933d
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76870
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
2023-08-09 20:40:34 +00:00
Elyes Haouas d2bb4858f3 lint/checkpatch: Update 'check for illegal assignment in if conditional'
This reduce the difference with linux v6.5-rc4.

Change-Id: I63b3561471d3bd0ebfe7e5733c6dd6fb673904e0
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65829
Reviewed-by: Martin L Roth <gaumless@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-08-09 20:40:10 +00:00
Keith Hui 863d3eb935 abuild: Fix board variant handling
Problem:
Me: $ util/abuild/abuild -t asus/p2b -b p2b-ls
abuild: No such target: asus/p2b, variant: p2b-ls

Cause: We identify boards and variants using path names in tree, so
I type in the test command above. abuild identifies all board variants
the Kconfig way, in all caps and all underscores.

Result: Expectation gap and abuild can't find anything where we expect
it to. All variants with a hyphen in their names are affected.

Fix: Add a substitution to replace hyphens with underscores.

Test: I get my abuild with the command above, even a variant-specific
test config works.

Change-Id: I10d5b471dac41c50a85c4a309ec561b02687bb9a
Signed-off-by: Keith Hui <buurin@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41918
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
2023-08-06 19:47:33 +00:00
Elyes Haouas 9f59d2a906 coreboot-jenkins-node/Dockerfile: Upgrade lua5 from lua5.3 to lua5.4
Change-Id: Ic1450f0fa8eb69273aa907dea2eba8f7e7131ef1
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72510
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
2023-08-04 20:55:45 +00:00
Tom Hiller daf6b8bc76 util/docker/coreboot-sdk: add mrc extraction packages
Add packages required to extract the `mrc.bin` from a ChromeOS firmware
image as per the instructions provided in
https://doc.coreboot.org/northbridge/intel/haswell/mrc.bin.html

Change-Id: I81ed4ef55f0ba745a8a0a0cc85c2b00360f59297
Signed-off-by: Tom Hiller <thrilleratplay@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67160
Reviewed-by: Martin L Roth <gaumless@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
2023-08-04 20:54:42 +00:00
Martin Roth f1ee2f7dc3 util/docker: refactor out and fix docker cache dir test
The test for the docker cache directory was used by two different
targets, so turn it into its own target.

Add missing $ for whoami commands.

Signed-off-by: Martin Roth <gaumless@gmail.com>
Change-Id: Ic5e1d28110097eb502959e81bafe77faa0fc7fae
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76707
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
2023-08-04 20:54:22 +00:00
Martin Roth 18fd3a2315 util/docker: Update coreboot-sdk-test to coreboot-jenkins-test
The coreboot-jenkins-test docker image takes the coreboot-jenkins-node
docker image and runs a series of tests to verify that things build
properly.

This was original created to test the coreboot-sdk, but build functions
like the documentation have been moved from the sdk image into the
jenkins node, so the test needs to be renamed.

Add the makefile target to the help and phony target list at the same
time.

Signed-off-by: Martin Roth <gaumless@gmail.com>
Change-Id: I0e6282bbb163064f177c8e68e7180ba2bdc101f1
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76706
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
2023-08-04 20:53:47 +00:00
Karthikeyan Ramasubramanian abaca2a399 util/amdfwtool: Introduce support for Hash Table v2
Some stages in bootflow prefer to use 16 bytes UUID instead of
traditional 2 bytes FWID to identify the firmware components they
verify/validate. Hence add version 2 of hash table which identifies
firmware components using UUID. Other than UUID and a reserved field for
alignment reasons, the format of the hash table is very similar to hash
table v1.

BUG=b:277292697
TEST=Build and boot to OS in Myst with PSP Verstage enabled. Ensure that
the hash table v2 is built and installed into BIOS image for the
components that are configured in amdfw.cfg file. Ensure that the
validation by PSP is successful for all the relevant components during
the boot flow.

Change-Id: I2899154086cf8e90c3327178157b07ead034b16e
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76586
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Reviewed-by: Tim Van Patten <timvp@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-08-04 20:51:53 +00:00
Karthikeyan Ramasubramanian 24b5227091 util/amdfwtool: Support multiple firmware identifier types
Currently this tool generates a hash table to verify signed binaries,
with a 2 byte FWID as the only kind of identifier. Going forward some
binaries are going to adopt 16 byte UUID identifiers and more binaries
will follow in the future SoCs. Hence add support for handling multiple
firmware identifier types. While at this remove the unused fwid from the
PSP FW table.

BUG=b:277292697
TEST=Build BIOS image and boot to OS in Myst & Skyrim.

Change-Id: I5180dc0fe812b174b1d40fea9f00a85d6ef00f2f
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76585
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
2023-08-04 20:49:55 +00:00
Elyes Haouas 33201ab49f docker/coreboot-sdk/Dockerfile: Remove old workaround
Remove old workaround for automake and aclocal.

Change-Id: Ifc00a479fd08d9ee4d97df6da8762bae2d097827
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76740
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
2023-08-03 18:36:35 +00:00
Elyes Haouas fda10a44b6 util/docker: Remove manual symlink python3 to python
Debian sid symlinks already python3 to python.

Change-Id: Ibc3b2b047df7e1066624d4dd8aa9664ab1869222
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75875
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
2023-08-03 18:35:46 +00:00
Nico Huber 6e133fa470 linux_trampoline: Handle 64-bit framebuffer addresses
To support full 64-bit addresses, there is a new field `ext_lfb_base`
since Linux 4.1. It is unclear, however, how a loader is supposed to
know if the kernel is compatible with this. Filling these previously
reserved bits doesn't hurt, but an old kernel would probably ignore
them and not know that it's handling a clipped, invalid address. So
we play safe, and only allow 64-bit addresses for kernels after the
2.15 version bump of the boot protocol.

Change-Id: Ib20184cf207f092062a91ac3e6aa819b956efd33
Signed-off-by: Nico Huber <nico.h@gmx.de>
Co-authored-by: Bill XIE <persmule@hardenedlinux.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76479
Reviewed-by: Bill XIE <persmule@hardenedlinux.org>
Reviewed-by: Tim Wawrzynczak <inforichland@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-08-03 17:55:01 +00:00
Kyösti Mälkki 6a50e555fc util/abuild: Add per-build statistics tarfile
Change-Id: Icb9a5bdf94013fe493dc8ec634cf3094bcff2838
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75803
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2023-08-03 15:21:22 +00:00
Matt DeVillier fdb4503e62 Revert "util/amdfwtool: Add some PSP entries to both levels"
This reverts commit 91f5da4776.

Commit breaks booting on MDN (and likely others). Boot hangs on:
[NOTE ]  MRC: no data in 'RW_MRC_CACHE'

Change-Id: Id8042690af2764d6e46fe01287be598091b1a239
Signed-off-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76718
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Varshit Pandya <pandyavarshit@gmail.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2023-08-01 20:28:53 +00:00
Nico Huber 295f6bf8d4 linux_trampoline: Handle coreboot framebuffer
Translate the coreboot framebuffer info from coreboot tables to
the Linux zero page.

Tested in QEMU/Q35 with a kernel w/ efifb enabled.

Change-Id: I2447b2366df8dd8ffe741c943de544d8b4d02dff
Signed-off-by: Nico Huber <nico.h@gmx.de>
Co-authored-by: Bill XIE <persmule@hardenedlinux.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76431
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <inforichland@gmail.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Bill XIE <persmule@hardenedlinux.org>
2023-08-01 13:37:19 +00:00
Elyes Haouas fc2f304f06 util: Use C99 flexible arrays
Use C99 flexible arrays instead of older style of one-element or
zero-length arrays.
It allows the compiler to generate errors when the flexible array does
not occur at the end in the structure.

Change-Id: I6b87680ec9f501945ae266ae4e4927efd2399d56
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76815
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-08-01 12:51:25 +00:00
Felix Held ee004de969 util/sconfig: rework help text printing
Drop the program name and split the printf call with multiple lines of
text into separate printk calls.

Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I43df1fd02ce0fdbb6b22e1d4eda45017811c48d8
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76774
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-07-31 14:00:52 +00:00
Arthur Heymans 166de9997a util/sconfig: Don't hardcode PCI device domain
Use the domain number in static references to pci device so that

  device domain 0x20 on
          device pci 00.0 on end
  end

results in

  DEVTREE_CONST struct device *const __pci_32_00_0 = &dev_#something;

in static.c

Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Change-Id: I7a98b2325ee08feb1a3d1d4b333f3f4e53934b00
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76466
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
2023-07-31 14:00:34 +00:00
Arthur Heymans 91f5da4776 util/amdfwtool: Add some PSP entries to both levels
Some SoC like Genoa require this.

Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Change-Id: I01ff792e8016b16f34bc69722469b63cae5a42ff
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76468
Reviewed-by: Martin L Roth <gaumless@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Varshit Pandya <pandyavarshit@gmail.com>
2023-07-31 13:55:49 +00:00
Arthur Heymans 93aa0903a0 amdfwtool: Add early vga BIOS ID to enum
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Change-Id: Ife8c166350030cb89d794ac42834d79ec933f278
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76467
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
2023-07-24 15:13:12 +00:00
Martin Roth baf82808ae util/docker: Update libncurses5-dev to libncurses-dev package
The libncurses5-dev package no longer seems to be available in debian
sid. It's been marked as a transitional package, pointing to
libncurses-dev (ncurses 6) for since 2018, so this patch updates the
package to the new name.

Signed-off-by: Martin Roth <gaumless@gmail.com>
Change-Id: I81e1a174ab25f573a7d7711eeeb26ef22fd3854b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76705
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
2023-07-23 20:59:19 +00:00
Nick Vaccaro ea025af4dc spd_tools: bring README up to date
bug=b:260128250
TEST=none

Change-Id: I412044a13f636e87db1d2266b33c9134e746e1a2
Signed-off-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76543
Reviewed-by: Subrata Banik <subratabanik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-07-18 18:40:40 +00:00
Nico Huber f9aec6e298 Makefile,genbuild: Provide length for abbreviated commit hashes
The original default, minimum abbreviated hash length was 7. It dif-
fers on newer systems, however. This breaks reproducibility, so set
an explicit length. 12 hex digits should be good enough.

Note: This sets only a minimum. With a high enough number of commit
objects in the repository, Git could still decide to use a longer
hash, again breaking reproducibility. 12 digits will hopefully pro-
vide enough margin.

Change-Id: Ia86e9cc41e27a0a57d498dcb13aec954c4ea0f04
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76560
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
2023-07-18 14:57:11 +00:00
Nico Huber 99eee16a13 Center bootsplash on bigger framebuffers
In the JPEG decoder, use `bytes_per_line` instead of `width` for
address calculations, to allow for bigger framebuffers. When
calling jpeg_decode(), add an offset to the framebuffer address
so the picture gets centered.

Change-Id: I0174bdccfaad425e708a5fa50bcb28a1b98a23f7
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76424
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
2023-07-17 14:49:04 +00:00
Arthur Heymans 9b186e0ffe util/xcompile: Add NASM to xcompile
Reason: opensil uses nasm code.

Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Change-Id: Ib8d89354bfd21113f77927186e418e2ec3eab44c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76465
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-07-17 14:18:29 +00:00
Patrick Georgi e4d660b2dc crossgcc: Enable rv32iafc-ilp32 configuration
rv32iafc-ilp32 is compatible with rv32iac-ilp32 for library
implementation, so add a reuse rule allowing the default configuration
to support rv32iafc.

-IAFC is an unusual configuration (much less common than -IMAFC),
but multilib reuse has essentially no cost: this change is useful to
users of platforms that support hardware floating-point but cannot
use hardware multiply/divide for any reason. To avoid generating a
new set of libraries this is limited to the soft-float ABI.

Tested by verifying that `gcc -march=rv32iafc -mabi=ilp32
--print-search-dirs` refers to the rv32iac/ilp32 library directory
as expected, rather than just the root library directory as occurs
when an unsupported target is selected (for instance, rv32id).

Change-Id: Ie056ba6488a138fe0876eebf7cbc59477b3c3518
Signed-off-by: Peter Marheine <pmarheine@chromium.org>
Signed-off-by: Patrick Georgi <patrick@coreboot.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76539
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
2023-07-17 13:57:12 +00:00
Elyes Haouas ba7fee9159 util/intelmetool: Remove useless break after a break
Change-Id: Ifb76d8fa09585ad6da9bfb1488a15bf853c4da99
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76475
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2023-07-15 06:06:48 +00:00
Felix Singer ebafd4b905 util/crossgcc: Update GCC version from 11.3 to 11.4
Change-Id: Ia9063af4495735a0e47f4cab1179441185d888b3
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76364
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
2023-07-14 18:04:14 +00:00
Yu-Ping Wu d5e336720d util/lint/checkpatch_json.py: Make output message verbatim
Some of the error messages of checkpatch.pl contain "*". Since now
Gerrit supports markdown, messages with "*" will be rendered
incorrectly. For example,

 foo* bar should be foo *bar

will be shown as

 foo bar should be foo bar

with "bar should be foo" being in italics. Fix the problem by
surrounding the output message with "`" to make it verbatim.

Change-Id: I02d0e894adf7f94a9e154f99321f51d4097963a5
Signed-off-by: Yu-Ping Wu <yupingso@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76392
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yidi Lin <yidilin@google.com>
2023-07-14 14:29:48 +00:00
Felix Singer 90753398b6 util/crossgcc: Fix broken link by Intel to acpica tarball
All requests to acpica.org are redirected to an intel.com site now,
which breaks our buildgcc script as it's unable to download the source
tarball. Use GitHub again as it's a more reliable source.

*rant*

Change-Id: Ie4570539d6c8abe59295e5a29b323b091e939f90
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76399
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Nicholas Chin <nic.c3.14@gmail.com>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Krystian Hebel <krystian.hebel@3mdeb.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-07-11 17:10:44 +00:00
Rob Barnes d6b58d5c76 util/apcb: Add apcb edit tool for phoenix
Add a new apcb edit tool, apcb_v3a_edit.py, that injects SPDs into
an APCB for phoenix platform.

The tool makes several assumptions:
 * Each SPD only uses blocks 0, 1, 3 and 5. All other blocks are zero.
 * Each block is 64 bytes.
 * Dimm and socket are always 0
 * Unused SPD entries are zero'd

BUG=b:281983434
BRANCH=None
TEST=build, flash, boot myst

Change-Id: Ifb50287de77138170714a702ab87d56427aacfef
Signed-off-by: Rob Barnes <robbarnes@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76188
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-07-06 17:46:08 +00:00
Sergii Dmytruk 6da62684de util/cbmem: add parsing of TPM logs per specs
CBMEM can contain log in different forms (at most one is present):
 - coreboot-specific format (CBMEM_ID_TPM_CB_LOG exported as
   LB_TAG_TPM_CB_LOG)
 - TPM1.2 format (CBMEM_ID_TCPA_TCG_LOG)
 - TPM2 format (CBMEM_ID_TPM2_TCG_LOG)

The last two follow specifications by Trusted Computing Group, but until
now cbmem couldn't print them.  These formats were added not so long ago
in:
 - commit 4191dbf0c9 ("security/tpm: add TPM log format as per 1.2
   spec")
 - commit 53db677586 ("security/tpm: add TPM log format as per 2.0
   spec")

These changes make cbmem utility check for existence of TPM1.2/TPM2 logs
in CBMEM and add code necessary for parsing and printing of their
entries.

TEST=`cbmem -L` for CONFIG_TPM1=y case
TCPA log:
	Specification: 1.21
	Platform class: PC Client
TCPA log entry 1:
	PCR: 2
	Event type: Action
	Digest: 5622416ea417186aa1ac32b32c527ac09009fb5e
	Event data: FMAP: FMAP

TEST=`cbmem -L` for CONFIG_TPM2=y case
TPM2 log:
	Specification: 2.00
	Platform class: PC Client
TPM2 log entry 1:
	PCR: 2
	Event type: Action
	Digests:
		 SHA256: 68d27f08cb261463a6d004524333ac5db1a3c2166721785a6061327b6538657c
	Event data: FMAP: FMAP

Change-Id: Ib76dc7dec56dd1789a219539a1ac05a958f47a5c
Ticket: https://ticket.coreboot.org/issues/425
Signed-off-by: Krystian Hebel <krystian.hebel@3mdeb.com>
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68749
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-07-04 13:07:13 +00:00
Jakub Czapiga 00d71ffca8 util/sconfig: Improve usage and long options
Move usage function closer to main(), remove excessive printf() calls,
use descriptive argument flags.

Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Change-Id: If5252de63692c5e43bfbde4d7d93e1d7a84e8dff
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70524
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
2023-07-03 13:00:19 +00:00
Felix Singer 318f629fca util/docker/coreboot-sdk: Drop legacy libftdi package
flashrom does not support libftdi 0.20 anymore and it's not used by
anything else. Its build systems (Makefile and Meson) only reference
libftdi1 and it still compiles fine without the legacy package. Thus,
drop it from the package list.

Change-Id: If1b575bc9abfd192e93811a83d8615bed61eba0c
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76084
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2023-07-02 21:09:13 +00:00
Felix Singer 2d9ae536fe util/docker/coreboot-sdk: Drop legacy libusb package
flashrom does not support libusb 0.1 anymore and it's not used by
anything else. Its build systems (Makefile and Meson) only reference
libusb1 and it still compiles fine without the legacy package. Thus,
drop it from the package list.

Change-Id: Ib9b7530e5b707e12fbf3f8058999456dc1f8dff4
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76083
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Thomas Heijligen <src@posteo.de>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2023-07-02 21:08:55 +00:00
Elyes Haouas afa5383fdc crossgcc: Upgrade IASL from 20230331 to 20230628
Changes: https://acpica.org/node/204

Change-Id: I4a1be7ffa6cb363d3fe0cddc59f0f4283fcc5257
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76164
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
2023-07-02 11:46:53 +00:00
Felix Singer 62c62885ea util/docker/coreboot-sdk: Install GNAT meta package instead gnat-12
The versions of both GCC and GNAT need to be in sync and the meta
package for GCC is already used. So use the meta package for GNAT as
well.

Change-Id: Ifcd6960731bc02c70a510e520b385ca300caf88f
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76086
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
2023-06-27 17:40:27 +00:00
Felix Singer 796b61c2a1 util/docker/coreboot-sdk: Drop subversion package
Subversion is not used anywhere (anymore?). Thus, drop it from the
package list.

Change-Id: Ibf8073c7878c130ff688102e850bbdcd66e3becc
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76082
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
2023-06-26 17:50:14 +00:00
Felix Singer 2b4d2edfd6 util/crossgcc: Update LLVM from version 16.0.5 to 16.0.6
Change-Id: I68f776c676b1c3c5562e9209c68c7a840198e36f
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76080
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
2023-06-24 21:54:22 +00:00
lilacious 40cb3fe94d commonlib/console/post_code.h: Change post code prefix to POSTCODE
The prefix POSTCODE makes it clear that the macro is a post code.
Hence, replace related macros starting with POST to POSTCODE and
also replace every instance the macros are invoked with the new
name.

The files was changed by running the following bash script from the
top level directory.

  sed -i'' '30,${s/#define POST/#define POSTCODE/g;}' \
  src/commonlib/include/commonlib/console/post_codes.h;
  myArray=`grep -e "^#define POSTCODE_" \
  src/commonlib/include/commonlib/console/post_codes.h | \
  grep -v "POST_CODES_H" | tr '\t' ' ' | cut -d ' ' -f 2`;

  for str in ${myArray[@]}; do
    splitstr=`echo $str | cut -d '_' -f2-`
    grep -r POST_$splitstr src | \
    cut -d ':' -f 1 | xargs sed -i'' -e "s/POST_$splitstr/$str/g";
    grep -r "POST_$splitstr" util/cbfstool | \
    cut -d ':' -f 1 | xargs sed -i'' -e "s/POST_$splitstr/$str/g";
  done

Change-Id: I25db79fa15f032c08678f66d86c10c928b7de9b8
Signed-off-by: lilacious <yuchenhe126@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76043
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
2023-06-23 15:06:04 +00:00
Michał Żygowski 95be012c11 soc/intel/alderlake/hsphy: Add possibility to cache HSPHY in flash
The patch adds a possibility to cache the PCIe 5.0 HSPHY firmware in
the SPI flash. New flashmap region is created for that purpose. The
goal of caching is to reduce the dependency on CSME and the HECI IP
LOAD command which may fail when the CSME is disabled, e.g. soft
disabled by HECI command or HAP disabled. This change allows to
keep PCIe 5.0 root ports functioning even if CSME/HECI is not
functional.

TEST=Boot Ubuntu 22.04 on MSI PRO Z690-A and notice PCIe 5.0 port
is functional after loading the HSPHY from cache.

Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Change-Id: I5a37f5b06706ff30d92f60f1bf5dc900edbde96f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68987
Reviewed-by: Krystian Hebel <krystian.hebel@3mdeb.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-06-23 08:59:50 +00:00
Nico Huber 558d8b79e6 util/qemu: Add config for AArch64
Most arguments taken from the Kconfig help. RAM needs to be >= 531M,
as coreboot is linked to reside between 512M..531M.

Tested `make qemu` with QEMU 7.2.0.

Change-Id: Id7f23918a786bc126188d5caf285e9f532dbb0ed
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76042
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
2023-06-23 08:48:29 +00:00
Kyösti Mälkki 6656f3151f util/abuild: Improve elapsed time measurement
Time elapsed for a single board build with ccache typically measures
well below 10 seconds. Improve the measurements to milliseconds
resolution using bash EPOCHREALTIME (pseudo) environment variable.

Change-Id: Iaedc470bb45cf9bb6f14ff8b37cd6f7ae3818a08
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75802
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2023-06-14 19:25:56 +00:00
Felix Singer 592700b5a6 util/docker: Add Alpine Dockerfile
Add a Dockerfile for Alpine to build-test with musl-libc.

Change-Id: If90412146acc94f01a89cd681539aad48e92dd2e
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75049
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jan Samek <jan.samek@siemens.com>
2023-06-14 12:43:32 +00:00
Stefan Reinauer c598fd8d4a Update goswid submodule to upstream master
Updating from commit id bdd55e4:
2022-08-11 13:59:07 +0200 - (Add json minify to remove comments in JSON files)

to commit id 567a1c9:
2023-01-18 20:38:13 +0100 - (Fix README.md uSWID table)

This brings in 5 new commits:
567a1c9 Fix README.md uSWID table
f5fd52f Add PlantUML Documentation
cd56b5b Add uSWID Documentation
1a294af Add more comprehensive example in README
b0e66ae Add plantuml output

Change-Id: Ib399578a20c5c64978edf4b6198439bf6983ea44
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75797
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
2023-06-12 00:51:50 +00:00
Stefan Reinauer b082e9ca36 Update cbootimage submodule to upstream master
Updating from commit id 65a6d94:
2019-07-17 17:47:14 -0600 - (Free image buffer on read error)

to commit id 80c499e:
2019-09-19 12:41:46 -0600 - (Correct spelling mistakes)

This brings in 1 new commits:
80c499e Correct spelling mistakes

Change-Id: I0557e7116052e98266ee1d078a078d698232bb2c
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75798
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-06-12 00:51:21 +00:00
David Hendricks 09b573ff75 board_status: Point to documentation in header
This adds a pointer to the README and to the wiki in the header of
board_status.sh.

Change-Id: I5877a3bf3544f175ac74a5e5a8e1ef1cab366ab8
Signed-off-by: David Hendricks <david.hendricks@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/21569
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-06-10 01:44:06 +00:00
Evgeny Zinoviev 88a54db592 util/inteltool: Fix building with musl libc
1. Make sure __always_inline is defined.
2. To test if we're on Linux, check presence of __linux__
   instead of __GLIBC__.

Change-Id: I2ccfc4d2ef4c60877e24508f9926b533cffec0ed
Signed-off-by: Evgeny Zinoviev <me@ch1p.io>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50412
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2023-06-10 00:52:54 +00:00
Peter Lemenkov ac0e7448e4 util/inteltool: suggest booting with iomem=relaxed
Signed-off-by: Peter Lemenkov <lemenkov@gmail.com>
Change-Id: Ib80efd7d1ba516cb0ae4bdb86f95877855195ce0
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63999
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-06-10 00:25:04 +00:00
Nico Huber b992df9891 util/qemu: Revise q35 configs
Add an NVMe drive and be more conservative with hotplug-capable PCIe
ports. QEMU treats everything as hotpluggable by default, so devices
can be added at runtime. However, this leads to unrealistic resource
allocations with PCIEXP_HOTPLUG enabled.

Tested recent allocator changes with QEMU/Q35 config and:

  $ make qemu QEMU_EXTRA_CFGS=util/qemu/q35-alpine.cfg

Change-Id: I23746b642329356c6767b04ec177cd9411e3adb9
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67026
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
2023-06-04 19:21:13 +00:00
Elyes Haouas 44f676afc9 crossgcc: Upgrade LLVM from version 16.0.4 to 16.0.5
Change-Id: I1f227bf55bac51e6226ca5d13156e54220e33629
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75635
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-06-04 18:29:42 +00:00
Elyes Haouas dea0f21c4b crossgcc: Upgrade CMake from version 3.26.3 to 3.26.4
Change-Id: Id6dca6be8f7a82eadcbc18b4736219faf51b843c
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75634
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
2023-06-04 18:29:20 +00:00
Karthikeyan Ramasubramanian d7a5d9e9da util/amdfwtool: Add ability to split hash table
Hash table containing hashes of all signed PSP binaries is compiled at
build time and installed into the concerned CBFS. During boot, PSP
verstage reads the hash table binary and passes it to PSP bootloader.
PSP bootloader in turn uses the hash table to verify the signed PSP
binaries. Currently the hashes for all the signed PSP binaries are
compiled into one hash table. On upcoming platforms with more number of
signed PSP binaries, PSP bootloader does not have resources to handle
one monolithic hash table. Instead PSP bootloader recommends splitting
them into smaller hash tables (currently limited to 3 hash tables).

Update amdfwtool tool to support splitting hash tables. This is done by
adding an optional hash table id to the entries in the amdfw.cfg file.
By default, one hash table binary is always compiled and it's name is of
the format ${signed_rom}.hash. If an entry has a hash table id defined,
then this utility will compile a separate hash table binary whose name
is of the format ${signed_rom}.${N}.hash where N is the hash table id.

BUG=b:277292697
TEST=Build Skyrim BIOS image and boot to OS. Ensure that the hash table
is identical with and without this change. Perform suspend/resume
cycles, warm/cold reset cycles for 50 iterations each.
TEST=Artificially inject hash table id against some entries in
amdfw.cfg and ensure that the concerned hash table binaries are getting
compiled.

Change-Id: I7ef338d67695a34c33b5c166924832939f381191
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75188
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
2023-06-02 22:19:44 +00:00
Martin Roth 5a4cedb9c1 util/docker: Split coreboot-sdk test into its own docker image
This allows the coreboot-sdk docker image to build properly even if the
testing fails, and keeps the added overhead out of the coreboot-sdk
image.

Signed-off-by: Martin Roth <gaumless@gmail.com>
Change-Id: I6488799256f57ad64e14c93e7317b7ad2a71781c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75494
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
2023-06-02 22:12:27 +00:00
Fred Reitberger 9d6008ea5b amdfwtool: Only use AMD_FW_RECOVERYAB_A on phoenix
BUG=285390041

Signed-off-by: Fred Reitberger <reitbergerfred@gmail.com>
Change-Id: I4321c6a8553b470096aec263fb4b15b831efae7f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74971
Reviewed-by: Tim Van Patten <timvp@google.com>
Reviewed-by: Jon Murphy <jpmurphy@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-06-02 20:14:26 +00:00
Grzegorz Bernacki dfdf81c32e amdfwtool: Add --output-manifest option
Passing this option tells amdfwtool to create a text file, containing
the versions of the blobs below:
- PSP bootloader (type 0x01),
- SMU firmware (type 0x08),
- AGESA bootloader 0 (type 0x30),
- PSP bootloader AB (type 0x73).

Created file can be embedded into CBFS which allows to read the version
of blobs at runtime. This way version of blobs used to build the
coreboot image can be verified at runtime and also from the binary file.

Format of manifest file is following:

    $ cat build/amdfw_manifest
    type: 0x01 ver:00.35.00.13
    type: 0x08 ver:00.5a.23.a6
    type: 0x30 ver:2a.14.b0.10
    type: 0x73 ver:00.35.00.13

BUG=b:224780134
TEST=Tested on Skyrim device

Change-Id: Idaa3a02ace524f44cfa656e34308bd896016dff6
Signed-off-by: Grzegorz Bernacki <bernacki@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74266
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
2023-06-02 17:35:56 +00:00
Elyes Haouas a84823d078 util/crossgcc: Update nasm from 2.15.05 to 2.16.01
Timeless build for QEMU (i440fx/piix4) does not modify the binary.
New patch is add to fix the build in a separate directory from the source.

Change-Id: Ib69437be8ee69ad62fb1dfbbafabc2c4c885b7b2
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73740
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
2023-05-29 21:06:41 +00:00
Subrata Banik 9cd85d0859 util/ifdtool: Add support for Intel 800 series chipset
This commit adds support for Intel 800 series chipset. The new chipset
can be uniquely identified by its SPI speed, eSPI speed, and
chipset name.

This commit message is clear and concise, and it accurately describes
the changes that were made to the code. It also includes the following
information:

- Specify the correct chipset name.
  "PCH Revision: 800 series Meteor Lake"
- Show the valid eSPI/EC frequency.
  "Read eSPI/EC Bus Frequency: 20MHz"

Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I70619d9e3ed2bcad86f84a0527e3a0ad13acd706
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75433
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
2023-05-27 04:01:45 +00:00
Felix Held 91795a6da1 libpayload;arch,cpu/x86: drop USE_MARCH_586 Kconfig option
Only the Intel Quark SoC selected this option and that SoC was dropped
in commit 531023285e ("soc/intel/quark: Drop support"), so drop this
Kconfig option too.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ic4f1c7530cd8ac7a1945b1493a2d53a7904daa06
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75473
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-05-27 00:29:02 +00:00
Zheng Bao e8183599ae commit-msg: Match the Signed-off-by line with name and mail address
The previous regular expression only matches the line starting with
"Signed-off-by:". If the name and mail address are missing, it can not
find out. The following words should be "name <mail@xxx.com>".

Change-Id: I42cc399e79b65928a6aef87c51e5476c7158d166
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73340
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
2023-05-26 21:16:32 +00:00
Elyes Haouas a28e2358c2 util/crossgcc: Update binutils-2.40 import set_entry_point patch
Import set_entry_point patch from https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=3539414584be0094b0a4fe56dfd64ea79d802edc
to fix issue in binutils 2.40 with LTO when applied to
PE/PE+ binaries (i.e. UEFI).

Change-Id: I3844b53c8761239932ce91c2ff19ed0402321d1a
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74974
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
2023-05-26 15:17:45 +00:00
Elyes Haouas 9c599c8b30 crossgcc: Upgrade IASL from 20221020 to 20230331
Changes: https://acpica.org/node/202

Change-Id: I43fc180bd51ff7cb06a67619c8350d28b086bc90
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74272
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
2023-05-25 20:18:36 +00:00
Felix Singer 38453784d7 util/crossgcc: Add empty directory for tarballs
A directory for tarballs is needed in any case but it's created at build
time. However, in reproducible build environments the sources are
downloaded before the buildgcc scripts runs and the directory needs to
be created.

Thus, to simplify that, add an empty tarballs directory.

Change-Id: Id3b4bf918c93f10c145f580684e916a4f8bae3b1
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75273
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
2023-05-24 21:11:21 +00:00
Zheng Bao 948c0b7947 amdfwtool: Set the minimum size of entry PSPL2 A/B
This is a PSP FW requirement.
This is only for recovery A/B without ISH header. That means only
Cezanne.

Change-Id: I62616d5a866f66fc71e6c0b31a23c62dc11cf3c6
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75161
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
2023-05-24 12:24:28 +00:00
Elyes Haouas cf993bd343 crossgcc: Upgrade LLVM version 15.0.7 to 16.0.4
Change-Id: I753bbcf3f03907b0cf966454c3dd6c9b61869599
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73792
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
2023-05-23 13:34:51 +00:00
Konrad Adamczyk d6b4db159b util: Use common ARRAY_SIZE define
Remove duplicated definitions of ARRAY_SIZE macro across util/ dir.
Instead of duplicates, use the one from commonlib/bsd/helpers.h file.

BUG=b:231765496
TEST=make -C util/cbfstool; make -C util/cbmem;
     make -C util/intelmetool; make -C util/superiotool

Change-Id: I29b776586b4f0548d4026b2ac77095791fc9f3a3
Signed-off-by: Konrad Adamczyk <konrada@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74474
Reviewed-by: Jakub Czapiga <jacz@semihalf.com>
Reviewed-by: Grzegorz Bernacki
Reviewed-by: Robert Zieba <robertzieba@google.com>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-05-22 19:24:27 +00:00
Krystian Hebel 9ab3a1fe4a util/kconfig: Fix default value getter for integer options
CB:37152 was supposed to be uprev to Linux's kconfig, but it got this
one case wrong, Linux never returned "0" [1]. As a result, when an
option has default value different than 0, and it was changed to 0,
savedefconfig skips saving it. However, during the build from such
defconfig the option is assigned default value.

TEST=Set SEABIOS_DEBUG_LEVEL to 0 and see that savedefconfig writes
it to defconfig file.

[1] 7cf3d73b43

Signed-off-by: Krystian Hebel <krystian.hebel@3mdeb.com>
Change-Id: I821e45dcec99904fab85f136298cbd0315237ff6
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72650
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
2023-05-22 12:34:50 +00:00
Felix Singer fb03140757 util/docker: Add Dockerfile for Arch Linux
Add a minimal Dockerfile that pre-installs necessary software which is
needed to work with coreboot.

Change-Id: I85f3dc7b28b77989f0f1400d1282ed4b17082f65
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74481
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
2023-05-17 19:55:18 +00:00
Caveh Jalali fe95f83fd8 util/chromeos: Add EC header update utility
This adds a new utility for copying ec_commands.h and ec_cmd_api.h from
the chrome EC repo with the appropriate copyright header adjustment.

It is invoked as:

 util/chromeos/update_ec_headers.sh [EC-repo]

where EC-repo is the top of the EC repo from which header files are to
be obtained.

The corresponding files in src/ec/google/chromeec are updated but not
committed. Also, a commit message is suggested with the original git
versions for reference.

BUG=b:258126464

Change-Id: Ib43c75d807dd925b2c4bff425c07a36b4b4582c4
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74879
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Boris Mittelberg <bmbm@google.com>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
2023-05-16 16:34:17 +00:00
Nicholas Chin 8bf53c0162 util/scripts/show_platforms.sh: Fix reStructuredText table output
reStructuredText grid tables require row separators otherwise the rows
get concatenated into a single cell for each column.

Representative output of previous behavior:
```eval_rst
+-------------------------+-------------------+------------+----------+
| Vendor/Board            | Processor         | Date added | Brd type |
+=========================+===================+============+==========+
| 51nb/x210               | INTEL_KABYLAKE    | 2020-03-16 | laptop   |
| acer/aspire_vn7_572g    | INTEL_SKYLAKE     | 2022-01-28 | laptop   |
| acer/g43t-am3           | INTEL_X4X         | 2020-09-28 | desktop  |
+-------------------------+-------------------+------------+----------+
```

Representative output of corrected behavior:
```eval_rst
+-------------------------+-------------------+------------+----------+
| Vendor/Board            | Processor         | Date added | Brd type |
+=========================+===================+============+==========+
| 51nb/x210               | INTEL_KABYLAKE    | 2020-03-16 | laptop   |
+-------------------------+-------------------+------------+----------+
| acer/aspire_vn7_572g    | INTEL_SKYLAKE     | 2022-01-28 | laptop   |
+-------------------------+-------------------+------------+----------+
| acer/g43t-am3           | INTEL_X4X         | 2020-09-28 | desktop  |
+-------------------------+-------------------+------------+----------+
```

Change-Id: I83be58dd2c34c65ae2c65cf2bd98330936fb6f6a
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72624
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
2023-05-11 16:53:23 +00:00
Maximilian Brune 8d1051f4aa util/inteltool: Add ADL-S device identifications
R680E, Q670E, H610E are the ADL-S IoT variants

see also:
commit a0bc90e4ab ("Add missing ADL-S device identification")

Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com>
Change-Id: I1dbfa0464bc22f9bcf91d9e9fa9eb79132600175
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74360
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
2023-05-11 13:05:45 +00:00
Karthikeyan Ramasubramanian dc4989351f util/amdfwtool: Consolidate entry line regex pattern
There are 2 regex patterns defined to process the lines from *fw.cfg:
1) for lines with mandatory entries
2) for lines with mandatory + optional entries

Consolidate the regex pattern. Add enums for matching regex caller
groups so that the human readable group IDs can be used instead of magic
numbers.

BUG=None
TEST=Build Skyrim BIOS which only have mandatory entries. Build Guybrush
BIOS image which have both mandatory and optional entries. Confirm that
the amdfw.rom built before and after this change have matching SHA in
both Skyrim and Guybrush images. This ensures that the optional level
entries in Guybrush are handled as expected. Boot to OS in Skyrim.

Change-Id: I7289ddbbec4d5daefe64f59b687ba3a4af46d052
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74950
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Van Patten <timvp@google.com>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
2023-05-08 13:15:53 +00:00
Fred Reitberger a194e6252f amdfwtool: Increase MAX_PSP_ENTRIES
The MAX_PSP_ENTRIES constant reserves space for the psp directory table
entries. This table is aligned to 4K and the next binary is also aligned
to 4K. The number of psp directory entries on Birman exceeds the
previous limit, so increase it to the maximum that will fit in a 4K
block.

TEST=timeless builds for Birman unchanged

Signed-off-by: Fred Reitberger <reitbergerfred@gmail.com>
Change-Id: I297edc9cccffde0ad1ce7461b375542f9f2f7c23
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73653
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Bao Zheng <fishbaozi@gmail.com>
Reviewed-by: Nikolai Vyssotski <nikolai.vyssotski@amd.corp-partner.google.com>
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
2023-04-28 15:12:47 +00:00
Maximilian Brune 2c895aaac3 util/ifdtool/ifdtool.c: Fix default FMAP generation
According to SPI programming guide, a region limit of 0 as well as
region base of 7FFFh indicates an unused/reserved region.

Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com>
Change-Id: I790d7f5631ecef3043b2c17c41430dc4fd854f72
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74735
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
2023-04-27 20:45:14 +00:00
Konrad Adamczyk 8120cb4166 util/cbmem: Add REG_NEWLINE flag to fix matching pattern
Match-any-character operators (eg. ".*") shall not match newline
characters for BANNER_REGEX, since given regular expression
matches newline explicitly.

Add REG_NEWLINE flag to `regcomp` call.

BUG=b:278718871
TEST=Boot firmware on skyrim, reboot.
Run `cbmem -2`.
`cbmem -2` returns second-to-last boot log.

Change-Id: I9e924349ead0fa7eea8b9ad5161138a4c4946ade
Signed-off-by: Konrad Adamczyk <konrada@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74742
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2023-04-27 00:39:12 +00:00
Felix Singer a87da91719 util/docker/jenkins-node: Drop Zephyr SDK
The version of the Zephyr SDK that is used is quite old and Zephyr
hasn't been really used. Thus, drop it and also its dependencies from
u-boot.

Change-Id: Ie498d687e1566133adf650166117d8f68fcfdaf6
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73979
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Patrick Georgi <patrick@coreboot.org>
2023-04-25 05:36:13 +00:00
Felix Singer fa41fef557 util/docker/jenkins-node: Allow pip to install packages system-wide
Call pip3 with `--break-system-packages` allowing it to install packages
system-wide. This fixes building the Docker container.

Change-Id: Id093f2c69fec43556c434fbca7b36095a7e6bd97
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74292
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
2023-04-25 05:36:03 +00:00
Felix Singer 98d7157a6d util/docker/jenkins-node: Merge package installations into first step
It's not necessary to have multiple steps for installing packages and
requirements. Just merge the two install steps to one.

Change-Id: Ibe620e5b20a5f1a5d4e1c4c98942c136f450f280
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74245
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
2023-04-25 05:35:57 +00:00
Kyösti Mälkki a9dd3c3fae lib/version: Move board identification strings
These strings are now only expanded in lib/identity.c.

This improves ccache hit rates slightly, as one built object file
lib/version.o is used for all variants of a board. Also one built
object file lib/identity.o can become a ccache hit for successive
builds of a variant, while the commit hash changes.

Change-Id: Ia7d5454d95c8698ab1c1744e63ea4c04d615bb3b
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74449
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2023-04-22 16:20:49 +00:00
Karol Zmyslowski b2f5a22c4a util/inteltool: Add support for Jasper Lake
Tested on: Intel N5105 (Jasperlake Family, Intel Celeron processor)
Based on Intel Pentium Silver and Intel Celeron Processor Datasheet,
        vol. 2 of 2 revision 001 (DOC# 634545)

Change-Id: If4134bd03f5544b5845cde998ee526e5ddd5b51d
Signed-off-by: Karol Zmyslowski <karol.zmyslowski@3mdeb.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73934
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
2023-04-21 15:22:21 +00:00
Elyes Haouas b68817d196 crossgcc: Upgrade CMake from version 3.26.2 to 3.26.3
Change-Id: Iab8d67632f97c596baa9b430228d4aae6fa48126
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74289
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
2023-04-17 23:43:12 +00:00
Bill XIE cd3545556e util/cbfstool: Qualify struct e820entry as packed
In order to accord with grub (see include/grub/i386/linux.h) and
comments for offsets of members of struct linux_params,
struct e820entry should be defined as __packed, otherwise,
sizeof(struct linux_params) will become 4224 (0x1080).

Fortunately, the affected area is usually not occupied.

Signed-off-by: Bill XIE <persmule@hardenedlinux.org>
Change-Id: I09955c90e4eec337adca383e628a8821075381d6
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74270
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2023-04-16 14:04:32 +00:00
YH Lin d76beb8129 mb/google/rex: add variant gpio tables for variant creation
BUG=b:276818954
TEST=new_variant_fulltest.sh rex0
BRANCH=None

Signed-off-by: YH Lin <yueherngl@google.com>
Change-Id: Iebc098f8d480ac3e1835b00861fd844d97f281a8
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74257
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
2023-04-13 17:40:26 +00:00
Julius Werner ea4d4c9c33 cbfstool: Add comment to define stability rules for cbfstool print -k
In CB:41119, I sort of made up a mechanism on the fly for how to make
the machine-parseable cbfstool print output extensible without breaking
backwards compatibility for older scripts. But I only explained it in
the commit message which is not very visible. This patch adds a comment
to the function that generates that output so that people who want to
change it can understand the intent.

Signed-off-by: Julius Werner <jwerner@chromium.org>
Change-Id: I0d18d59e7fe407eb34710d6a583cfae667723eb7
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74347
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
2023-04-13 00:43:23 +00:00
Arthur Heymans e84b095d3a util/sconfig: Remove unused ioapic and irq keywords
Ioapic information in the devicetree was only used to set up mptables
but this generic driver was removed (ca5a793 drivers/generic/ioapic:
Drop poor implementation).

This removes the unused remainders from mainboard devicetrees.
Remove ioapic setup from sconfig.

Change-Id: Ib3fef0bf923ab3f02f3aeed2e55cf662a3dc3a1b
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71789
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
2023-04-11 16:23:28 +00:00
Elyes Haouas af93336da3 ec/lenovo/pmh7/chip.h: Use 'bool' instead of 'int'
This to fix following error using Clang-16.0.0:
/cb-build/coreboot-toolchain.0/clang/LENOVO_W500/mainboard/lenovo/t400/static.c:135:22: error: implicit truncation from 'int' to a one-bit wide bit-field changes value from 1 to -1 [-Werror,-Wsingle-bit-bitfield-constant-conversion]
        .backlight_enable = 0x01,
                            ^~~~
/cb-build/coreboot-toolchain.0/clang/LENOVO_W500/mainboard/lenovo/t400/static.c:136:23: error: implicit truncation from 'int' to a one-bit wide bit-field changes value from 1 to -1 [-Werror,-Wsingle-bit-bitfield-constant-conversion]
        .dock_event_enable = 0x01,
                             ^~~~

Change-Id: Icd35224877fee355e1bbb8a8e838cb047604babb
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73810
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
2023-04-08 03:36:07 +00:00
Arthur Heymans fd4e676bb3 Revert "cbfstool/default-x86.fmd: Rename BIOS -> SI_BIOS"
This reverts commit 89b4f69746.

SI_BIOS is mostly used to indicate the BIOS region in Intel IFD. Not all
platforms are Intel platforms with an IFD, so revert this change. Also
tooling often depends on names not changing so renaming things should
not be done lightly. The default region should also be in sync with
non-x86 and made systematic across the tree.

Change-Id: I46f52494498295ba5e2a23d0b66b56f266293050
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74290
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Maximilian Brune <maximilian.brune@9elements.com>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
2023-04-07 15:14:04 +00:00
Felix Singer 74b4bd0e92 tree: Replace `egrep` with `grep -E`
For compatibility reasons, egrep is just a wrapper around grep today.
Thus, replace it with `grep -E`.

Change-Id: Ief08a22e4cd7211a3fee278492c95d37f9e058fa
Signed-off-by: Felix Singer <felix.singer@secunet.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74171
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
2023-04-06 19:54:44 +00:00
Arthur Heymans 5196aacb98 util/lint/stable-017: Update full config pattern matching
CONFIG_ARCH gives false positives for CONFIG_ARCH_X86_64_PGTBL_LOC so
use a different string: 'CONFIG_MAINBOARD_DIR'.

Change-Id: Ie5d4fc4693bc303afb16884c53c9ca4d1778a5cb
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74220
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Maximilian Brune <maximilian.brune@9elements.com>
2023-04-06 15:11:44 +00:00
Karthikeyan Ramasubramanian 9e45e32420 util/spd_tools: Add support for Phoenix platform
Update spd_gen and part_id_gen utilities to accommodate Phoenix platform
so that SPD can be generated for the memory parts used in that platform.
SPD requirements for Phoenix and Mendocino platforms are identical.

BUG=b:273383819
TEST=Run spd_gen and ensure that both Mendocino and Phoenix platforms
share the platform manifest for LP5 memory parts.

Change-Id: I7a12f73065864f08db8922c1a69eb503865a25b1
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74125
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jon Murphy <jpmurphy@google.com>
2023-04-05 10:01:15 +00:00
Felix Singer 3a5507fd31 util/crossgcc/buildgcc: Allow bootstrapping CMake with multiple threads
The main build process already runs multi-threaded, when requested.
Apply the same setting to the bootstrap / configure step.

Change-Id: I89d6728a0985946b702f83770bedf767afb12690
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74156
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-04-03 13:22:21 +00:00
Elyes Haouas 3453c313ac crossgcc: Upgrade CMake from version 3.25.2 to 3.26.2
Change-Id: I62078257fd84a64c699a7f930bc306e38d2f4058
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73791
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-04-02 02:28:09 +00:00
Felix Singer 0686c69802 util/crossgcc: Update binutils from 2.37 to 2.40
Change-Id: I34a20a999f7ea624c1add4750fcd116166953dd8
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66920
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
2023-04-01 20:17:39 +00:00
Felix Singer 0fb774024d util/docker/coreboot-sdk: Remove Python 2 package
Debian removed Python 2 from their Sid repository and so it needs to be
removed from the Dockerfile as well.

Built and tested the Dockerfile with Python 2 removed. Still works.

Change-Id: If4e298dc275c1dfaf57cd4c3f8e5f89410318ec0
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71711
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
2023-04-01 11:01:07 +00:00
Maximilian Brune 60c6a5a6fe util/cbfstool: Add usage information about verbose output
Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com>
Change-Id: Ica512d21d1cef8ccffbc093016c7a3bfcf901b14
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73488
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-03-28 13:28:15 +00:00
Maximilian Brune 89b4f69746 cbfstool/default-x86.fmd: Rename BIOS -> SI_BIOS
Currently ifdtool --validate will not correctly validate the FMAP
against the IFD regions, since it will compare the IFD bios region with
an FMAP region called SI_BIOS.

It's probably a good idea to define default name for the BIOS FMAP
region like we have for 'COREBOOT' or 'FMAP' FMAP region.

Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com>
Change-Id: I55eddfb5641b3011d4525893604ccf87fa05a1e2
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73449
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
2023-03-28 13:27:57 +00:00
Maximilian Brune 347596ae6e util/ifdtool: Add option to create FMAP template
On systems that do not provide their own *.fmd (Flashmap) file, we
fall back to a default flashmap file. That file however does not contain
the blobs (ME, GBE ...), that are usually placed below the BIOS Flashmap.
It can therefore easily happen that the placement of the blobs collides
with the placement of the BIOS region (e.g. if CBFS_SIZE is big enough).
The fmaptool can't catch that, since it does not know of the blobs
placement.

This patch basically maps the regions described in the IFD (Intel
Firmware Descriptor) to the default Flashmap.

Test: Build and see that build/fmap.fmd contains all blobs now (on intel
systems that are supported by the ifdtool)

Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com>
Change-Id: I82cb252fff456773af69943e188480a4998736fd
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73487
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
2023-03-28 13:27:50 +00:00
Zheng Bao 8dd34bd674 amdfwtool: Clean up table buffers before combo loop
Keep clean copies of PSP and BIOS table. Refresh the working tables
before they are filled with file names and other information at each
iteration.

Change-Id: Ie8339a4d66c38e02180cbf99e13914bfff66dc0f
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73628
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
2023-03-24 14:07:21 +00:00
Zheng Bao e3ebc4fe31 amdfwtool: Add missing help information for --combo-config1
Change-Id: I6b69965991daadaf8b4148b06d0715b087021c9b
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73928
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
2023-03-24 14:05:49 +00:00
Zheng Bao c25d5935d3 amdfwtool: Call wrapper funtion to write file
Don't call system call directly.

Change-Id: I6da31723bc2bfc1197fc31962053671c84ccc397
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73911
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
2023-03-24 14:05:27 +00:00
Zheng Bao f080cd5463 amdfwtool: Move some funtions to other categorized source files
To reduce the size of amdfwtool.c which is already too big.

Change-Id: Ib80eeb42f59a3dda04402b2feaadc1d178ed989e
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73910
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
2023-03-24 14:04:31 +00:00
Felix Held c5c7fa494b util/amdfwtool: remove unused union from embedded_firmware struct
Since commit 2f6b7d557d ("amdfwtool: Move the filling of table headers
into functions"), the combo_psp_directory union element in the
embedded_firmware is unused and the new_psp_directory element is used in
all places, so replace the union of new_psp_directory and
combo_psp_directory with just the new_psp_directory struct element.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I35d339b3084ec8f93210095c233f5e68296d0013
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73834
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
2023-03-21 18:02:47 +00:00
Felix Singer 0e2fc554a7 util/liveiso: Move NixOS configs to subdirectory
Move the NixOS configuration into a subdirectory so that configurations
for other distros can be added as well.

Change-Id: I0462c1a6541878c973be4302c5c5e9e9bfaed2a6
Signed-off-by: Felix Singer <felix.singer@secunet.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73684
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
2023-03-17 19:27:31 +00:00
Zheng Bao 3e7008df95 amdfwtool: Print which combo entry is being processed
Change-Id: I9e83a3ac56d5c42d8d6839cc4d961adf0b656fb5
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73725
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
2023-03-16 14:58:49 +00:00
Zheng Bao a7731cc0c9 amdfwtool: Remove meaningless double parentheses
Change-Id: I4a9192c55d63531621dd7bc49f1ead7f58dff893
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73648
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-03-16 14:40:16 +00:00
Zheng Bao 17551ae865 amdfwtool: Check combo_index before checking the combo_config
Otherwise Checking combo_config[++combo_index] causes Out-of-Bounds
access.

Change-Id: I50d466ee98edfb18c01fc7ba43e929640b33c7c1
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73647
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
2023-03-16 14:40:02 +00:00
Zheng Bao 7391722c40 amdfwtool: Add asserting before accessing array combo_config
Change-Id: Ia98fdbee4c4005562662313ebe2478d0aeb879bc
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73724
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
2023-03-16 14:39:41 +00:00
Martin Roth 6bb6ed9467 util/amdfwtool: Update config parser to accept full paths
This allows individual components to be placed in a location other than
what is specified by the FIRMWARE_LOCATION line.

Signed-off-by: Martin Roth <gaumless@gmail.com>
Change-Id: I3a83e52d081a5909d54eacc575dd2b40b09e4038
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73656
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jason Glenesk <jason.glenesk@gmail.com>
2023-03-15 19:35:54 +00:00
Karthikeyan Ramasubramanian 8d88561235 util/amdfwtool: Support not passing recovery/backup APCB
If Recovery/Backup APCB is not passed, then AMD_BIOS_APCB_BK entry is
not populated. But PSP expects that bios directory entry to be
populated. Also on mainboards where both APCB and recovery APCB are same
(eg. Skyrim), 2 copies of the same APCB are added to amdfw*.rom. Update
amdfwtool to support not passing recovery/backup APCB. If the recovery
APCB is not passed, then populate AMD_BIOS_APCB_BK entry and make it
point to the same offset as AMD_BIOS_APCB entry.

BUG=b:240696002
TEST=Build and boot to OS in Skyrim. Ensure that the device can enter
recovery mode. Perform multiple suspend/resume cycles.

Change-Id: I031ba817573cd35160f5e219b1b373ddce69aa6b
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73661
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-03-15 17:30:15 +00:00
Karthikeyan Ramasubramanian 225b4b3279 amdfwtool: Remove the initial alignment on newer SoCs
On newer SoCs the initial alignment is not required. So skip initial
alignment. This saves 64 KiB flash space on each firmware slots. This
also saves ~5 ms while loading amdfw.rom

BUG=b:240696002
TEST=Build and boot to OS in Skyrim.

Change-Id: I27cbfde2d7d58b62a4c0039c60babc3fb3bd95fa
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73654
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
2023-03-15 17:30:12 +00:00
Fabian Groffen 6e04d8570f util/inteltool: Fix build on musl-libc systems
use __linux__ instead of __GLIBC__ guard for Linux-specific includes

Signed-off-by: Fabian Groffen <grobian@gentoo.org>
Change-Id: Ifbf4552591c0df7811c5b37a9207c0901b6fd68f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73666
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-03-12 11:42:48 +00:00
Fabian Groffen 318ddb8aab util/superiotool: Fix build on musl-libc systems
- use __linux__ instead of __GLIBC__ guard for Linux-specific includes
- use POSIX ioperm instead of deprecated iopl

Signed-off-by: Fabian Groffen <grobian@gentoo.org>
Change-Id: I99613007aa9feddcb1041f31085cdeb195ff7a68
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73358
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
2023-03-12 11:42:38 +00:00
Zheng Bao 994ff52464 amdfwtool: Remove the option --list which nobody uses
It was used for printing the dependencies which is now taken by macro
DEP_FILES in soc/amd/common/Makefile.inc.

TEST=binary identical test on google/guybrush amd/chausie

Change-Id: I1b86df2cb2ed178cf0a263c50ccb3e2254a3852b
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73627
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-03-10 16:14:12 +00:00
Zheng Bao 4b6aa195b4 amdfwtool: Move PSP FWs padding into a loop for combo
Move main body of PSP padding into a loop which can add a new combo
entry. In the loop, get the FW files from each fw.cfg, create new pack
of PSP, and fill the combo header. Currently Feature COMBO is still
not fully functional. But the non-combo case will not be affected for
sure.

The real changes are
1. Add a do-while loop.
2. Remove a "TODO" comment.
All other changes are re-indenting and re-filling.

Change-Id: I351192a4bc5ed9ec0bfa3f2073c9633b8b44246d
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58554
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-03-10 16:12:45 +00:00
Zheng Bao 0e3d18b130 amdfwtool: Add combo index and combo config table
For now, combo index is 0, and only the first entry in config table is
used. The index will grow when there are more combo entries.

Add a command parameter to give fw.cfg for combo index 1. Process the
combo config in the future loop.

Change-Id: I00609d91defc08e17f937ac8339575f84b1bd37c
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73496
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
2023-03-10 13:41:16 +00:00
Zheng Bao 39cae56c41 amdfwtool: Add a wrapper function to open and process config file
And move the additional processing to this new function.

Change-Id: Id101d63e4d30a6e57ac1aa79665a4ba22b2956f1
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73509
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
2023-03-10 13:40:21 +00:00
Zheng Bao 9bb62cb364 amdfwtool: Add HW IPCFG file whose subprog is 1
And rename PSP_HW_IPCFG_FILE to PSP_HW_IPCFG_FILE_SUB0

Change-Id: Ia1ab8482074105de367905be2b4b0418066823d2
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73531
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
2023-03-10 13:39:23 +00:00
Karthikeyan Ramasubramanian bd9dd420d7 util/amdfwtool: Add option to indicate uncompressed BIOS binary
amdfwtool always assumes that the PSP BIOS binary (type 0x62 BIOS
directory entry) is always compressed. On boards using vboot, sometimes
PSP BIOS binary is uncompressed - specifically when CBFS verification is
enabled and verified boot starts in bootblock. Add an option to indicate
PSP BIOS binary is uncompressed.

BUG=b:261792282
TEST=Build Skyrim BIOS with x86 verstage and CBFS Verification enabled.
Boot to OS.

Change-Id: I4d56c0ba451b194043ebb5cdb0f2b27482beef1f
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71210
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
2023-03-09 21:41:31 +00:00
Maximilian Brune ab0e680c8e util/ifdtool/ifdtool.c: Clean up
- Remove functions that are only called in one place.
- Add warning if user doesn't supply a platform, since that can lead to
  dumps/layouts that do not include all IFD regions without the user
  even reliazing it.
- Inform the User if IFD or Flashmap is not found.
- Inform the User if there is not a single match between FMAP and IFD
  region
- Avoid printing usage if not specifically asked by the user.
  It tends to obfuscate the original error message.
- Keep indentation consistent throughout the file.
- Remove typedefs (coreboot coding style)

Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com>
Change-Id: I7bbce63ecb2e920530394766f58b5ea6f72852e9
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73448
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
2023-03-09 19:36:32 +00:00
Nikolai Vyssotski bfc9ca7f55 amdfwtool: move FW_MPIO to PSP Dir Level 2 where it belongs
Type 0x5d (MPIO Firmware) was mistakenly placed to PSP Level 1 directory.
It should be in Level 2 PSP directory instead.

Change-Id: Ic5ea00859f1055e0c91600c5f941c5d3acca36e2
Signed-off-by: Nikolai Vyssotski <nikolai.vyssotski@amd.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73556
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Bao Zheng <fishbaozi@gmail.com>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
2023-03-09 15:20:18 +00:00
Fred Reitberger 75191be8d4 amdfwtool: Support multiple inst entries
Use the inst field when adding entries to the psp tables. Otherwise,
entries that differ by the inst field will appear as duplicates with an
inst of 0.

Signed-off-by: Fred Reitberger <reitbergerfred@gmail.com>
Change-Id: I4a84a0730976f4c65902b5c24ed13e21e95b03bb
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73522
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
2023-03-09 12:19:44 +00:00
Zheng Bao 84fb9eac96 amdfwtool: combo: Add combo feature for BIOS table
It is similar to PSP combo.

Change-Id: If0523a4a0e1f31969e4bbaa6062dcc0f2d6da420
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66856
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
2023-03-08 12:59:50 +00:00
Zheng Bao 35cdffd6ea amdfwtool: Separate two cases of combo and non-combo clearly
If combo is used, fill the EFS header with address of COMBO header.
If not, fill with address of PSP header.

The old code fills with PSP headers all the time.

Change-Id: I0057165aea553d9dc8e4e719e2804557229a0002
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66855
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-03-08 12:56:37 +00:00
Zheng Bao b2ae6a5a3a amdfwtool: combo: Create the combo header earlier
There will be a loop to set up the combo layout. The combo header only
needs to be created once. This change is actually to move the creation
of combo header outside of the loop.

Change-Id: If6ba3d10dfc598133b9adbbb2b6658f356455608
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66854
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-03-08 12:55:15 +00:00
Zheng Bao 2f6b7d557d amdfwtool: Move the filling of table headers into functions
It is easier to understand what these statements are about.

Change-Id: Ib02c68c9f2ea84020b12682c41fb1a6f8f93d725
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66852
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-03-08 12:49:07 +00:00
Martin Roth 57f1162363 util/lint: Ignore braces around single line statements
In a recent coreboot leadership meeting, the decision was made to allow
(but not require) braces around single line statements if the author
wishes to put them in.

This patch removes the checks for single line statement blocks, while
still checking for other issues in braces.

Just because they're allowed now, please do not reformat the entire
codebase to add them. coreboot has a policy of not making widespread
changes to the entire codebase unless something actually violates the
style guidelines.

Signed-off-by: Martin Roth <gaumless@gmail.com>
Change-Id: I137b10889ec880959c4c1b035dc54bf8ebf32488
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73515
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-03-07 21:34:11 +00:00
Maximilian Brune b3a7c64532 lint/lint-stable-003-whitespace: Fix excludelist
Remove the last slash '/' from directories in excludelist, so that they
will be correctly filtered by grep.

Fixes:
grep: util/goswid: Is a directory
grep: util/nvidia/cbootimage: Is a directory

Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com>
Change-Id: I90cc2cff9a98bbd0af344156332b970bfd6430b9
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73396
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
2023-03-04 19:38:30 +00:00
Zheng Bao cd25ca09f0 amdfwtool: Remove the limit of spliting EFS and body
To support 32M flash, the non-vboot also need to split amdfw. Just as
the deleted comment says, we need this feature now.

This is one of series of patches to support 32/64M flash.
BUG=b:255374782

Change-Id: Ic058cfaeebd1a947227cfa9be2db4eb22702aa28
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69857
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
2023-03-02 20:18:00 +00:00
Zheng Bao 69ea83c3c5 amdfwtool: Change .rom.efs to .rom and .rom to .rom.body
To support 32M flash, the non-vboot also need to split amdfw.

The amdfw.rom is the default filename added to CBFS.
Keep the default filename and then we don't have to change all the
CBFS definition.

This is one of series of patches to support 32/64M flash.
BUG=b:255374782

Change-Id: Id77b11422d4549cf57a1cd8980c7a9cf3597d1bc
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72702
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
2023-03-02 20:17:33 +00:00
Wojciech Macek 9edaccd922 util/cbfstool/eventlog: Use LocalTime or UTC timestamps
Add a new flag "--utc" to allow the user to choose if
elogtool should print timestamps in Local Time or in UTC.
It is useful for generating automated crash reports
including all system logs when users are located in
various regions (timezones).

Add information about timezone to timestamps printed
on the console.

Signed-off-by: Wojciech Macek <wmacek@google.com>
Change-Id: I30ba0e17c67ab4078e3a7137ece69009a63d68fa
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73201
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jakub Czapiga <jacz@semihalf.com>
2023-03-02 13:05:35 +00:00
Zheng Bao fd51af6286 amdfwtool:combo: Move the filling of field "lookup" into function
This filling does not need to be done separately.

Change-Id: I53051349923dce40f4fc3f747ab41a93a3798823
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66853
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
2023-03-01 13:25:13 +00:00