Commit Graph

2128 Commits

Author SHA1 Message Date
Uwe Hermann aa8e9bd6d3 Fix typo which causes build error if CK804_USE_NIC is set (trivial).
This is tested with abuild so shouldn't break anything.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2800 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-22 19:51:48 +00:00
Morgan Tsai c49b834710 Add SiS device IDs for further update.
Signed-off-by: Morgan Tsai <my_tsai@sis.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2799 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-22 17:51:48 +00:00
Uwe Hermann d9ab798a2f Fix abuild for the MSI MS-7260 (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2798 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-21 23:13:28 +00:00
Uwe Hermann 970d06b10d Add support for the MSI MS-7260 (K9N Neo) mainboard.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Ward Vandewege <ward@gnu.org>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2797 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-21 15:56:05 +00:00
Uwe Hermann 420f6abc11 Add register dump capability for ITE IT8718F (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2796 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-21 14:48:04 +00:00
Uwe Hermann eddc473ce0 Add -D / --dump-readable option which prints the Super I/O register
contents in human-readable form (e.g. "COM1 enabled" etc.) instead
of the hex-table format from -d / --dump.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2795 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-20 23:57:44 +00:00
Uwe Hermann b4db2209f9 Decouple the ITE code from fintek.c, it doesn't belong there.
Add common 'enter configuration mode' function for most Winbond/Fintek/ITE
chips which use the 0x87 0x87 sequence for that reason.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2794 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-20 23:37:56 +00:00
Uwe Hermann 0702469f16 Fix up and generalize the ITE IT8708F code. It was only working out of
pure luck (and broken code elsewhere). Needs some more fixing.

Add more LDN descriptions to various Super I/Os.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2793 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-20 22:13:48 +00:00
Ward Vandewege 42670a75ef The s2891 ships with a 1MB rom chip. The targets/tyan/s2891/Config.lb file assumes a 1MB rom chip.
Hence the default position for the VGA bios should also assume a 1MB rom chip, instead of a 512KB chip.

Signed-off-by: Ward Vandewege <ward@gnu.org>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2792 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-20 15:01:14 +00:00
Uwe Hermann 2c290e3362 Superiotool: Add dump support to the Winbond W83697HF/F.
Minor coding style changes and code simplifications.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2791 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-20 00:00:49 +00:00
Uwe Hermann e474956590 Implement usage for --help and put the same information into the README, too.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2790 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-19 16:26:18 +00:00
Uwe Hermann 7e7e9ac607 Add support for the Winbond W83697HF/F and W83627EHF/EF/EHG/EG.
Various minor fixes and improvements (trivial).

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2789 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-19 15:52:23 +00:00
Uwe Hermann 3acf31e4ea Further code simplifications and improvements.
Add command line option handling code. The following options
are defined at the moment:

-d|--dump      Dump Super I/O registers.
-V|--verbose   Verbose mode.
-v|--version   Show the superiotool version.
-h|--help      Show a short help text.

Per default (no options) we just probe for a Super I/O
and print its vendor, name, ID, version, and config port.

Example:

$ ./superiotool
Found SMSC FDC37N769 Super I/O (id=0x28, rev=0x01) at port=0x03f0

$ ./superiotool -d
Found SMSC FDC37N769 Super I/O (id=0x28, rev=0x01) at port=0x03f0
idx 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f
val 20 90 80 f4 00 00 ff 00 00 00 40 00 0e 28 01 00 00 00 00 00 02 00 01 03 00 00 00 00 00 00 80 00 00 00 00 00 00 ba 00 00 03 00 00 23 03 03 00 00
def 28 9c 88 70 00 00 ff 00 00 00 00 00 02 28 NA 00 00 80 RR RR NA NA NA 03 RR RR RR RR RR RR 80 00 3c RR RR 00 00 00 00 00 00 00 RR 00 00 03 00 00

$ ./superiotool -s
./superiotool: invalid option -- s

$ ./superiotool -h
Usage: superiotool [-d] [-V] [-v] [-h]

$ ./superiotool -v
superiotool 0.1


Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2788 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-19 01:55:35 +00:00
Ward Vandewege 3ef9b740de Add support for a precompressed LZMA payload (trivial).
Signed-off-by: Ward Vandewege <ward@gnu.org>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2787 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-19 00:57:37 +00:00
Ward Vandewege 786b0c4ed6 Sorry, I mixed up two patches. Reverting this change.
Signed-off-by: Ward Vandewege <ward@gnu.org>
Acked-by: Ward Vandewege <ward@gnu.org>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2786 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-19 00:52:14 +00:00
Uwe Hermann 25a6c0f18c Split out enter_conf_mode_*()/exit_conf_mode_() functions, we'll soon need
them. Reduce code duplication a bit by improved 'no dump available' handling.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2785 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-19 00:48:42 +00:00
Ward Vandewege c73ea4d4fc Add support for a precompressed LZMA payload (trivial).
Signed-off-by: Ward Vandewege <ward@gnu.org>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2784 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-19 00:43:02 +00:00
Uwe Hermann de24a0e585 Use uint16_t and friends where appropriate (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2783 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-19 00:03:14 +00:00
Uwe Hermann d754d2c6c4 Make the code a bit more generic (trivial). Different Super I/Os
use different config ports.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2782 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-18 23:30:24 +00:00
Uwe Hermann 6ff6af7621 Superiotool: Add support for the SMSC FDC37N769.
Here's what a register dump looks like on my test system:

No Super I/O chip found at 0x002e
No Super I/O chip found at 0x004e
No Super I/O chip found at 0x002e
No Super I/O chip found at 0x004e
No Super I/O chip found at 0x002e
No Super I/O chip found at 0x004e
Super I/O found at 0x03f0: id=0x28, rev=0x01
SMSC FDC37N769
idx 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 
val 20 90 80 f4 00 00 ff 00 00 00 40 00 0e 28 01 00 00 00 00 00 02 00 01 03 00 00 00 00 00 00 80 00 00 00 00 00 00 ba 00 00 03 00 00 23 03 03 00 00 
def 28 9c 88 70 00 00 ff 00 00 00 00 00 02 28 NA 00 00 80 RR RR NA NA NA 03 RR RR RR RR RR RR 80 00 3c RR RR 00 00 00 00 00 00 00 RR 00 00 03 00 00 
Probing 0x0370, failed (0xff), data returns 0xff

I'm self-acking this as it's pretty simple stuff, but please let me
know if anything could be improved here, or if you think this
is not trivial enough to warrant self-acking.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2781 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-18 22:24:34 +00:00
Uwe Hermann d8a18a2adb Add a README for superiotool (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2780 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-18 00:01:27 +00:00
Uwe Hermann 519419b476 Split out a dump_superio() function from ite.c, and make it slightly more
generic, so that we can use it for other Super I/Os, too.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2779 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-16 20:59:01 +00:00
Uwe Hermann 4cb7e71732 Make 'struct superio_registers' globally available, pretty much
all Super I/Os can (and should!) use this (trivial).

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2778 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-16 18:17:44 +00:00
Uwe Hermann 0120e1a3d8 Split up superiotool.c into multiple source files, one per vendor.
As there will be lots more supported Super I/Os soon, the file is
really getting way too big...

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2777 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-16 18:11:03 +00:00
Yinghai Lu 18c70d7222 More range for HT_CHAIN_UNITID_BASE and HT_CHAIN_END_UNITID_BASE.
For example: in C51/MCP55 or C51/MCP51

Will allow
1. C51 at 0x10 to 0x14, and MCP at 0 to 4
2. C51 at 1 to 4, and MCP at 7 to 0x0a

The reason is c51/mcp51/mcp55 reported unitid is 0x0f (far beyond it
needed), and will prevent us from putting them on bus 0.

Typical values for c51/mcp55 or c51/mcp51:
HT_CHAIN_UNITID_BASE = 0x10 # for C51
HT_CHAIN_END_UNITID_BASE = 0 # for mcp

If only have mcp with c51, 
HT_CHAIN_UNITID_BASE = 0 # for MCP
#HT_CHAIN_END_UNITID_BASE = 0 # default value 0x20

Signed-off-by: Yinghai Lu <yinghai.lu@amd.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2776 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-14 14:58:33 +00:00
Uwe Hermann 3335adb771 This is a full rewrite of all the CS5530/CS5530A code. The previous code was
mostly undocumented, had a broken coding style, contained lots of dead
code and had several other problems, e.g. it enabled write access to the
ROM (why?), it unconditionally enabled primary/secondary IDE (which should
have a config option) and that even _twice_ (which is um... wrong).

The new code

 - has 'ide0_enable' and 'ide1_enable' config options (which actually
   work) to enable/disable the primary/secondary IDE interface in
   Config.lb.

 - Does _not_ enable write access to the ROM (or is there some good
   reason to do that? If so, it should at least have a config option).

 - Contains a bit more documentation.

 - Uses readable (and documented) #defines instead of hardcoded magic values.

 - aaand... it actually compiles ;-) Yep, that's right. The previous code
   wouldn't even build, as it hadn't been fully ported from v1 (still used
   v1 functions which are simply not available in v2).

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2775 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-14 00:09:29 +00:00
Stefan Reinauer 741e1e658f I still don't understand a word, but I tried to improve the documentation. (trivial)
Please fix this if you can.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2774 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-13 13:47:02 +00:00
Uwe Hermann dde1d709a4 Fix abuild run of the MSI MS-6178 (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2773 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-13 09:55:44 +00:00
Uwe Hermann a9838cf796 Add a common/global failover.c file which can be used by all
(or at least most) mainboards. This should put and end to
copy-paste'ing the same file again and again for every mainboard.

Fix the build for the MSI MS-6178 target (wrong location of the common
failover.c file).

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Corey Osgood <corey.osgood@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2772 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-13 08:38:24 +00:00
Uwe Hermann 41b88342b9 Add initial support for the Intel 810 based board MSI MS-6178.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Corey Osgood <corey.osgood@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2771 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-12 22:11:33 +00:00
Alex Beregszaszi 7798c888e8 Change out/in combinations to pci_read/write_byte in
sis630 chipset enable.

Signed-off-by: Alex Beregszaszi <alex@rtfs.hu>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2770 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-11 15:58:18 +00:00
Uwe Hermann f9b0f7fd91 Remove useless 'extern' keywords (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2769 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-09 20:24:29 +00:00
Uwe Hermann 863c1bf525 Add '(C)' where it's missing (for consistency reasons).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2768 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-09 20:21:05 +00:00
Uwe Hermann 09735cb517 Add missing license header to udelay.c.
I'm self-ack'ing this, as the origin of the code in udelay.c (and thus
the license and copyright owner) is pretty clear.

The code which is now in udelay.c was split out from flash_rom.c in r1428,
and flash_rom.c, in turn, has been around since the beginning and had a
'Copyright 2000 Silicon Integrated System Corporation' line as well as the
usual GPLv2-or-later license header.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2767 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-09 20:02:45 +00:00
Ronald G. Minnich cbc95f32fb Partial changes and fixup.
Removed reset.c and added copyright headers.
Remove debug.c. It is not used and should not be here.

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2766 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-09 19:43:31 +00:00
Ronald G. Minnich 6226f13c11 Welcome to PC Engines and the ALIX 1C!
This is a geode LX board. There are timing settings that are not right
yet, we are still trying to get our board to boot Linux :-)

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2765 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-08 18:32:53 +00:00
Uwe Hermann 9398958cfa Add a copy of the GPL in the flashrom repository as it's an independent
project (being packaged by distros, among other things).

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2764 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-08 14:36:01 +00:00
Uwe Hermann 98ef9cefc8 Small consistency fixes (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2762 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-01 21:20:29 +00:00
Uwe Hermann 2046ff92f0 Various coding style and whitespace fixes (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2761 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-01 21:02:44 +00:00
Carl-Daniel Hailfinger c4c54a5df3 Add ITE IT8716F support to probe_superio. This helps especially
GA-M57SLI board owners who wish to debug remaining problems or handle
SPI flash of newer board versions.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2760 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-01 20:24:30 +00:00
Uwe Hermann 1ae8e83baa Rename probe_superio.c to superiotool.c.
Flesh out Makefile with all the usual stuff, e.g. install targets etc.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2759 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-01 20:20:41 +00:00
Uwe Hermann 8c14e45bfd Move probe_superio into the global util/ directory.
Rename it to superiotool while we're at it.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2758 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-01 19:44:36 +00:00
Uwe Hermann bd26392f42 Add support for the ITE IT8708F.
Here's a dump from my test system which has an IT8708F:

No SuperI/O chip found at 0x002e
probing 0x002e, failed (0x87), data returns 0x87
SuperI/O found at 0x2e: id=0x8708, chipver=0x0
ITE IT8708
idx 07 20 21 22 23 24 25 26 27 28 29 2a 2e 2f 
val 02 87 08 00 00 00 00 00 03 01 01 00 00 00 
def NA 87 08 00 00 NA 3f 00 ff ff ff ff 00 00 
switching to LDN 0x0
idx 30 60 61 70 74 f0 f1 
val 01 03 f0 06 02 00 80 
def 00 03 f0 06 02 00 00 
switching to LDN 0x1
idx 30 60 61 70 f0 
val 01 03 f8 04 00 
def 00 03 f8 04 00 
switching to LDN 0x2
idx 30 60 61 70 f0 f1 f2 f3 
val 01 02 f8 03 00 50 01 7f 
def 00 02 f8 03 00 50 00 7f 
switching to LDN 0x3
idx 30 60 61 62 63 64 65 70 74 f0 
val 01 03 78 07 78 00 80 07 03 0b 
def 00 03 78 07 78 00 80 07 03 03 
switching to LDN 0x4
idx e0 e1 e2 e3 e4 e5 e6 e7 f0 f1 f2 f3 f4 f5 f6 
val 80 61 00 00 00 00 00 00 80 00 30 00 80 00 de 
def NA NA 00 00 00 00 00 00 00 00 00 00 00 NA NA 
switching to LDN 0x5
idx 30 60 61 62 63 70 71 f0 
val 01 00 60 00 64 01 02 0c 
def 01 00 60 00 64 01 02 00 
switching to LDN 0x6
idx 30 70 71 f0 
val 01 0c 02 00 
def 00 0c 02 00 
switching to LDN 0x7
idx 70 b0 b1 b2 b3 b4 b5 b8 b9 ba bb bc bd c0 c1 c2 c3 c4 c5 c8 c9 ca cb cc cd d0 d1 d2 d3 d4 d5 d6 d7 d8 d9 da db dc f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 fa fb fc 
val 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 03 01 01 00 00 00 03 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ff 7f 20 51 00 0e 00 00 00 00 00 00 00 
def 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 NA NA NA NA NA NA 00 00 00 00 00 00 00 00 00 00 00 NA 00 
switching to LDN 0x8
idx 30 60 61 
val 00 02 01 
def 00 02 01 
switching to LDN 0x9
idx 30 60 61 70 f0 
val 00 03 10 0b 06 
def 00 03 10 0b 00 
switching to LDN 0xa
idx 30 60 61 70 f0 
val 00 03 00 0a 40 
def 00 03 00 0a 00 
No SuperI/O chip found at 0x004e
No SuperIO chip found at 0x004e
No SuperIO chip found at 0x004e

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2757 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-01 19:42:42 +00:00
Uwe Hermann 8a5a264748 Fix typo for the ITE IT8712F (trivial).
The default for LDN 5 (keyboard), index 0xF0 is not 0x00
but rather 0x08 as per datasheet.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2755 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-08-31 20:51:00 +00:00
Torsten Duwe 2109010290 Add support for the Athlon64 x2 5000+ CPU.
A trivial one-liner for the CPU I happen to have. The sales docs said it's
a "G1 revision", but the Rev F code works just fine.

Signed-off-by: Torsten Duwe <duwe@lst.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2754 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-08-30 10:29:15 +00:00
Markus Boas 736c1d8618 Add support for the Winbond W29EE011.
Signed-off-by: Markus Boas <ryven@ryven.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2753 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-08-30 10:17:50 +00:00
Markus Boas 3b78de6887 Add support for the Winbond W29C040P.
Signed-off-by: Markus Boas <ryven@ryven.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2752 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-08-30 10:11:08 +00:00
Uwe Hermann 6c71f73786 Change all flashrom license headers to use our standard format.
No changes in content of the files.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2751 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-08-29 17:52:32 +00:00
Carl-Daniel Hailfinger b1786c2bce This patch makes ITE Super I/O probing/dumping a little bit more generic,
fixes minor coding style issues and prepares the table for supporting
more chips of the ITE IT87xx Super I/O family.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2750 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-08-28 10:43:57 +00:00
Carl-Daniel Hailfinger 7a7890aced This patch rewrites probe_superio almost completely.
Common code sequences have been factored out, the code has been made
more generic, has better handling of corner cases and is actually much
shorter.

It also adds probing for almost all recent (since 1999) ITE Super I/O
chips to probe_superio. I did verify against all ITE datasheets
(including those not available any more) that the probing was
non-destructive.

For the ITE IT8712F, the complete configuration is dumped and as
comparison the default value from the data sheet is printed.
More information can be extracted easily, however this needs loads of
datasheet surfing.

This code has been tested extensively, dumping for other ITE chips will
follow as a separate patch.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2749 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-08-27 07:28:28 +00:00