We have found a non-compliant USB hub (RealTek RTS 5413) that does not
set a port's Connect Status Change bit on its USB 3.0 half if the port
had already been connected while the hub was being reset. To work around
this bug, this patch adds code to initially request the status of every
port after a hub was enumerated, clear the Connect Status Change bit if
set, and then enumerate the port iff it is currently connected,
regardless of whether the change bit was set. A similar behavior can
also be found in the Linux kernel.
BRANCH=oak
BUG=b:35929438
TEST=Booted Elm with this change, my USB 3.0 sticks enumerate now even
if they had been plugged in since boot.
Change-Id: I8a28252eb94f005f04866d06e4fc61ea265cee89
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/18729
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Power button events are usually dropped because the button is not in
the keyboard matrix range. Add condition to forward it like other keys.
BUG=chrome-os-partner:61275
BRANCH=None
TEST=reboot and make sure power button selection
in depthcharge's detachable menus is processed on reef.
Change-Id: I86897fa8d73a56533ef62bba05458ac3d339237e
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 25654e214f0ab8685d445ced62612a02be851126
Original-Change-Id: I516a0043bd7730789728d5c5498d0a0f30a2acac
Original-Signed-off-by: Shelley Chen <shchen@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/428199
Original-Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://review.coreboot.org/18177
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
Currently we just disabled ohci interrupts when calling ohci_shutdown,
Which would not actually shutdown the ohci controller, for example it
may still written the increased HccaFrameNumber to Hcca buffer.
Perform a soft reset to ohci controller as the linux kernel ohci-hcd
driver does.
BUG=chrome-os-partner:60996
BRANCH=None
TEST=Checked on gru, no more "BUG: Bad page state" error in kernel.
Change-Id: I128ab6ba455ac5383a4d48be0bc12b8bb4533464
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 4749fc82fdd1b74ca3f2ed3fdf0ef53a5e161087
Original-Change-Id: I3f192aea627ba2fa69533bc0a4270466ca18f2a7
Original-Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/426338
Original-Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-on: https://review.coreboot.org/18125
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
This fixes the generic timer driver to get the current tick from the
high register, so that comparison with the high count value (obtained
previously from the same register) has a chance to succeed.
Change-Id: I5ce02bfa15a91ad34641b8e24813a5b7ca790ec3
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-on: https://review.coreboot.org/17929
Tested-by: build bot (Jenkins)
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Coverity considers this a copy&paste error, and maybe it is. In any
case, it makes sense to check the variable that (if the condition is
true) is changed, and the values are the same before that test, so the
change is harmless.
Change-Id: I163c6a9f5baa05e715861dc19643b19a9c79c883
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Found-by: Coverity Scan #1347376
Reviewed-on: https://review.coreboot.org/17837
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Chrome OS builds always have some inherent differences to "standard"
libpayload configurations: they don't want to use curses or things like
storage drivers, they always use the coreboot framebuffer and USB, etc.
This patch reintroduces CONFIG_LP_CHROMEOS as an option that only
affects Kconfig defaults. This allows Chrome OS builds to select most of
what they need in one go and reduces board-specific .config files to
only the options that are really specific to that board.
Also restricts the 8250_SERIAL_CONSOLE Kconfig to only default to yes on
x86 boards, which probably makes sense for all of libpayload (some but
far from all ARM boards use 8250-compatible UARTs, and we should
probably not default a platform option unless it's going to be correct
with very high probability).
BRANCH=None
BUG=None
TEST=Built and booted Jerry and Oak.
Change-Id: Ie0c0593ffd399608d2cbfb83d20891f6f1864914
Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Commit-Id: e558f59
Original-Change-Id: I609637cd2ea7dfb4558aa3c04c90b64038c9ab57
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/347970
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/17024
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Currently every non-x86 platform supported by libpayload needs to
provide its own timer driver. Most of the ones we have accumulated there
look almost identical: For the frequency, return a preset constant. For
the value, read a 32-bit register, possibly read another 32-bit register
and shift+OR it with the previous one, then return that.
Let's replace this with a single .c file that can easily handle all of
those cases. Menuconfig convenience can still be maintained by providing
several presets that select different defaults for the driver's
configuration options (register address(es) and frequency).
Removes an "enabled" check from Samsung MCT driver since coreboot always
unconditionally enables that timer anyway.
CQ-DEPEND=CL:344809
BRANCH=None
BUG=None
TEST=Booted Oak and Veyron, observed how dev-mode delay was still ~30s
Change-Id: I61cb7d2ffd4902aa841c57f9afa9cd991f770acd
Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Commit-Id: a036af6
Original-Change-Id: I9784e7c6aa5abd6d92478ea7ec1cf42c9a437546
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/347749
Reviewed-on: https://review.coreboot.org/17023
Tested-by: build bot (Jenkins)
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
All but ga-g41m-es2l/cmos.default had multiple final newlines.
ga-g41m-es2l/cmos.default had no final newline.
Change-Id: Id350b513d5833bb14a2564eb789ab23b6278dcb5
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/16361
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Antonello Dettori <dev@dettori.io>
Move the configuration of the timer, storage and USB drivers from the
main Kconfig to three separate ones stored in the respective
directories.
This reduces the LOC of Kconfig and makes it more manageable.
Change-Id: I0786dbc1d5d8317c8ccb600f5de9ef4a8243d035
Signed-off-by: Antonello Dettori <dev@dettori.io>
Reviewed-on: https://review.coreboot.org/15914
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This removes the newlines from all files found by the new
int-015-final-newlines script.
Change-Id: I65b6d5b403fe3fa30b7ac11958cc0f9880704ed7
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/15975
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
cbgfx currently makes a separate function call (recomputing some values)
for every single pixel it draws. While we mostly don't care that much
about display speed, this can become an issue if you're trying to paint
the whole screen white on a lowly-clocked Cortex-A53. As a simple
solution for these extreme cases, we can build a fast path into
clear_screen() that just memset()s the whole framebuffer if the color
and pixel format allow it.
BUG=chrome-os-partner:54416
TEST=Screen drawing speed on Kevin visibly improves (from 2.5s to 3ms).
Change-Id: I22f032afbb86b96fa5a0cbbdce8526a905c67b58
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/15524
Tested-by: build bot (Jenkins)
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
1. Make the xHCI driver to support xHCI controller v1.1
2. And a new function xhci_ring_doorbell(), it aims to
add a memory barrier before ringing the doorbell, to ensure
all TRB changes are written to memory.
BRANCH=none
BUG=chrome-os-partner:52684
TEST=boot from USB on Kevin rk3399 platform
Change-Id: Ife1070d1265476d0f5b88e2acf3299fc84af5832
Signed-off-by: Martin Roth <martinroth@chromium.org>
Original-Commit-Id: 0c21e92
Original-Change-Id: I4e38e04dc3c7d32ee4bb424a473c70956a3c3ea9
Original-Signed-off-by: Liangfeng Wu <wulf@rock-chips.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/346831
Original-Commit-Ready: Brian Norris <briannorris@chromium.org>
Original-Tested-by: Douglas Anderson <dianders@chromium.org>
Original-Reviewed-by: Douglas Anderson <dianders@chromium.org>
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/15111
Tested-by: build bot (Jenkins)
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
BUG=chrome-os-partner:49249
TEST=None. Initial code not sure if it will even compile
BRANCH=none
Change-Id: Ibf2c91be93e2567cc1262b6fb84461eef51ab3e0
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: b87157138302b017e64a28417a22421c880c1bcb
Original-Change-Id: I16a8324d3c8ef4ee729f4509fda5bfe703b24ce4
Original-Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/333304
Original-Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: https://review.coreboot.org/14656
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
BUG=chrome-os-partner:49249
TEST=Compiles and boots and detect USB storage
BRANCH=none
Change-Id: I9007399e1f785e6f1d2258225e3f7cc602053aed
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 1db43f53973d2124e41186777caa829aa346ace3
Original-Change-Id: I943d19a3a7d785bd075073b57ba6388662d7df90
Original-Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/333311
Original-Commit-Ready: David Hendricks <dhendrix@chromium.org>
Original-Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/14659
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
There is a lot of generic code in the 8250 driver that should
be available for non-8250 systems with serial ports as well.
Change-Id: I67fcb12b5fa99ae0047b3cbf1815043d3919437e
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/14371
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
This fixes serial on rk3288.
Change-Id: I3dbf3cc165e516ed7b0132332624f882c0c9b27f
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/13636
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
The more generic 8250 driver can handle both port-mapped and memory-
mapped 8250-compatible UARTs, with different register sizes. Thus, a
separate driver for MMIO32 is not needed.
The generic 8250 driver was tested to work for both output and input,
on Apollolake SoC, which only presents an MMIO32 UART.
Change-Id: Idab766588ddd097649a37de92394b0078ecc660a
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: https://review.coreboot.org/12524
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
during shutdown
DWC2 UDC controller always requires an active packet to be present in
EP0-OUT to ensure proper operation of control plane. Thus, during
shutdown ignore EP0-OUT for queue empty check if only 1 packet is
present.
BUG=b:24676003
BRANCH=None
TEST=Compiles successfully. "fastboot reboot-bootloader" reboots
device without timeout in udc shutdown.
Change-Id: Iafe46c80f58c4cd57f8d58f060d805b603506bbd
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 4e7c27d849c0411aae58e60a24d8170a27ab8485
Original-Change-Id: Ifa493ce0e41964ee7ca8bb3a1f4bb8726fa11173
Original-Signed-off-by: Furquan Shaikh <furquan@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/311257
Original-Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Original-Tested-by: Furquan Shaikh <furquan@chromium.org>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/12413
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins)
Existing Intel xHCI controllers require a delay of 1 ms,
after setting the CMD_RESET bit in command register, before
accessing any HC registers. This allows the HC to complete
the reset operation and be ready for HC register access.
Without this delay, the subsequent HC register access,
may result in a system hang, very rarely.
Verified CherryView / Braswell platforms go through over
1000 warm reboot cycles (which was not possible without
this patch), without any xHCI reset hang in depthcharge.
BRANCH=None
BUG=None
TEST=Verified CherryView / Braswell platforms go through
over 1000 warm reboot cycles, without any xHCI reset hang
in depthcharge.
Change-Id: I8eff5115ca52738bdcf8bc65fbfb2a5f60a0abe1
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 3e7ea70df36e3bf35a6ee1297640900ee76bfdac
Original-Change-Id: Id681a19d0eedb0e2c29e259c5467bcde577e3460
Original-Signed-off-by: Rajmohan Mani <rajmohan.mani@intel.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/310022
Original-Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/12325
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
Reviewed-by: Nico Huber <nico.h@gmx.de>
enqueue_packet already runs start_ep_transfer, which enqueues the next
job. It's pretty much guaranteed that the port will look busy.
BUG=none
BRANCH=none
TEST=no spurious ep 0-0 busy messages
Change-Id: I9cbfa7b51dd37564262295ddbcdd0755da40c05b
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 8997dbd78dc363334f4e22eaa61f25de1449ffba
Original-Change-Id: I8a39713fc1d6f16b80284e0f21dc95685716a9b7
Original-Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/308763
Original-Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Original-Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Original-Reviewed-by: yunzhi li <lyz@rock-chips.com>
Reviewed-on: http://review.coreboot.org/12259
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
hexdump() now takes a pointer instead of an int-containing-an-address.
BUG=none
BRANCH=none
TEST=building with USB_DEBUG works
Change-Id: Idd0c43031a212c8f3b6489f533c488805d98d6a9
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 8660f6091bb124eeabe73302e8c7f1a8e46324f1
Original-Change-Id: I266efcb8b939d6da104ad05a3e79a78065c60beb
Original-Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/308762
Original-Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Original-Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Original-Reviewed-by: yunzhi li <lyz@rock-chips.com>
Reviewed-on: http://review.coreboot.org/12258
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
It encourages users from writing to the FSF without giving an address.
Linux also prefers to drop that and their checkpatch.pl (that we
imported) looks out for that.
This is the result of util/scripts/no-fsf-addresses.sh with no further
editing.
Change-Id: Ie96faea295fe001911d77dbc51e9a6789558fbd6
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/11888
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
We found that some SanDisk Cruizer Glide CZ60 sticks (confirmed on 16GB
and 64GB versions) have a problem responding to our first GET_MAX_LUNS
request right after they received their SET_CONFIGURATION. They will
continually return a NAK until the host gives up (which is 2
user-noticable seconds for us). Adding a small delay of about 15us seems
to be enough to fix the issue, but let's do 50 to be save.
Confirmed with both MT8173 and Intel LynxPoint XHCI controllers.
BRANCH=None
BUG=chrome-os-partner:45473
TEST=No notable delay before detecting stick on Oak and Falco.
Change-Id: Ib03944d6484de0ccecbb9922d22666f54c9d53dd
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 589f19a901275fb8b00de4595763a7d577bed524
Original-Change-Id: I95c79fe40d3ad79f37ce2eb586836e5de55be454
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/308980
Original-Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/12229
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Change Ie54699162 changed a structure's name and field names and we
didn't notice. Adapt.
BUG=none
BRANCH=none
TEST=building with UDC_DWC2 works
Change-Id: I592ebc29b2a08a23e6dbc9d2186807cbbbbca330
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 3dda8ad5ffc36593d8b8fd6664a7f9b4816f0f93
Original-Change-Id: I4a065de0f4045a01bef1dc9fbb2e0578b5508518
Original-Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/308791
Original-Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Original-Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: http://review.coreboot.org/12228
Tested-by: build bot (Jenkins)
Reviewed-by: Furquan Shaikh <furquan@google.com>
get_image_dimension returns the width or height of the image projected on
canvas.
This is necessary for example when two images of different lengths have to
be placed side by side in the center of the canvas and the widths of the
images must be adjusted according to the height.
BUG=chromium:502066
BRANCH=tot
TEST=Tested on Samus
Change-Id: I119c83891f48046e888b6b526e63348e74f8b77c
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: d1a97f0492eb02f906feb5b879b7b43518dfa4d7
Original-Change-Id: Ie13f7994d639ea1556f73690b6b6b413ae64223c
Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/304113
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/11929
Tested-by: build bot (Jenkins)
This change makes the code in graphics.c more descriptive and readable.
Especially, it makes expressions for scale calculation look what they
are meant to do. It also includes:
- Rename variables (struct fraction, dim_org, etc.) for more consistency
- Add more input validation (div-by-zero, etc.)
BUG=chromium:502066
BRANCH=master
TEST=Tested on Samus
CQ-DEPEND=CL:304860
Change-Id: I2694912bb7b6017d5655de2fd655b95432addb22
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: 0863dc3ee925d3a05c83c66397b19a57f5478ef3
Original-Change-Id: Id8e349b8e09082fb84c3e1a984617f916e16c518
Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/304861
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/11928
Tested-by: build bot (Jenkins)
This change adds 'pivot' option to draw_bitmap. It controls the point of the
image based on which the image is positioned. For example, if a pivot is set
to the center of the image horizontally and vertically, the image is
positioned using pos_rel as the center of the image.
This feature is necessary, for example, to place a text image in the center
of the screen because each image has a different width depending on the
language.
This change also makes draw_bitmap accept both horizontal and vertical size.
If either of them is zero, the other non-zero value is used to derive the
size to keep the aspect ratio.
Specifying the height is necessary to keep font sizes the same when drawing
text images of different lengths.
draw_bitmap_direct is a variant of draw_bitmap and it draws an image using
a native coordinate and the original size (as opposed to the location and
the size relative to the canvas).
CL:303074 has real use cases.
BUG=none
BRANCH=tot
TEST=Tested on Samus
Change-Id: I5fde69fcb5cc9dc53e827dd9fcf001a0a32748d4
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: 82a0a8b60808410652552ed3a888937724111584
Original-Change-Id: I0b0d9113ebecf14e8c70de7a3562b215f69f2d4c
Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/302855
Reviewed-on: http://review.coreboot.org/11927
Tested-by: build bot (Jenkins)
This change replaces the current scaling algorithm (nearest neighbor) used
for bitmap rendering with the bilinear interpolation, which has much better
reproduction.
BUG=none
BRANCH=tot
TEST=Tested on Samus
Change-Id: I02520883debb7db40ffc19d4480244e0acabc818
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: 764b383c1763a022728f2b2d9fb90e27c9e32e94
Original-Change-Id: I0ddd184343428904d04d8a76fe18a885529c7d3d
Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/302195
Original-Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: http://review.coreboot.org/11926
Tested-by: build bot (Jenkins)
This change adds load_bitmap API, which loads a bitmap file from cbfs
and returns a pointer to the image data.
BUG=none
BRANCH=tot
TEST=Tested on Samus
Change-Id: I7d7874f6f68c414dc877a012ad96c393e42dc35e
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: 9d33e713a0cf6bd1365418dad989e47e86db01e4
Original-Change-Id: Idbf9682c2fa9df3f0bd296ca47edd02cd09cfd01
Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/302194
Original-Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: http://review.coreboot.org/11925
Tested-by: build bot (Jenkins)
This change allows draw_bitmap to draw an image outside the canvas
with the original size if the scale parameter is zero. This is used
for example when drawing a splash screen which has to be positioned
at a pixel perfect location.
BUG=none
BRANCH=master
TEST=Draw pictures and boxes on Samus and Ryu
Change-Id: Ia2d8799184d1aa192e2c50850e248bee8f234006
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: 45d4717fe5c3e3554bd79b63ade490d88cf00bbe
Original-Change-Id: I48aa21122cfc2ee43bcb1b8f87b00c66abdc230e
Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/295961
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/11923
Tested-by: build bot (Jenkins)
draw_bitmap renders a bitmap image on screen with position and sizes
scaled relative to the screen. images are scaled up or down by nearest
neighbor interpolation.
BUG=chrome-os-partner:43444
BRANCH=tot
TEST=drew bitmap images on Samus
Change-Id: Ib599acc85b25626a6aed1fa9884ecd8e169bb860
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: c910c9cdb7efc53aace067bd081aeefc07556811
Original-Reviewed-on: https://chromium-review.googlesource.com/290302
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Change-Id: Ib599acc85b25626a6aed1fa9884ecd8e169bb860
Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/295532
Reviewed-on: http://review.coreboot.org/11584
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
This change introduces cbgfx, a graphics library, which provides APIs for
drawing basic shapes, texts, graphic data, etc. on a screen.
BUG=chrome-os-partner:43444
BRANCH=tot
TEST=Drew boxes by draw command of depthcharge cli on Samus
Change-Id: I6019e5998e65dca3ab4785a90669b5db02463d2e
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Original-Commit-Id: 5b3ebce8eae91be742e4f977d3407d24e1537580
Original-Reviewed-on: https://chromium-review.googlesource.com/290301
Original-Reviewed-by: Stefan Reinauer <reinauer@google.com>
Original-Change-Id: I10db27715cb907bdc451a33ed99d257e3af241b7
Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/291065
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/11408
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Certain Lexar USB disks may fail during the first calls to
get_descriptor(..., DT_CFG, ...) for unknown reasons. Therefore, make
several attempts before giving up.
BUG=chromium:466758
TEST=Manual on Samus. Go to recovery mode, verify that Lexar LJDS70 USB
stick is bootable.
BRANCH=None
Change-Id: I476ac22f9c4f844c60ebc6e53af8c144d70bb9d4
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 93a0570b343479dd22506ad4d7961f0ea4251f8c
Original-Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Original-Change-Id: Ie581c7c71c53816065c7f59202581888a79e445e
Original-Reviewed-on: https://chromium-review.googlesource.com/302403
Original-Commit-Ready: Shawn N <shawnn@chromium.org>
Original-Tested-by: Shawn N <shawnn@chromium.org>
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: http://review.coreboot.org/12133
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
If the device has already been disconnected then we shouldn't enable
host channel to start any transfer, otherwise this channel goes into
an odd state the channel is enabled but can not be disabled by set
hcchar.chdis=1. So we need check the device connect status before
enable channel.
BRANCH=None
BUG=chrome-os-partner:44534
TEST=None
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: ae3e690b2cd4a9ea8b5766ac873b0e00bf3a23de
Original-Change-Id: Ib3ecf486649ca11b302144f9c00a5e88424e90fa
Original-Signed-off-by: Yunzhi Li <lyz@rock-chips.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/298402
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Original-Commit-Queue: Lin Huang <hl@rock-chips.com>
Original-Tested-by: Lin Huang <hl@rock-chips.com>
Original-(cherry picked from commit ea96f947b5304fdde2e0991d23febaeba209dde1)
Original-Reviewed-on: https://chromium-review.googlesource.com/299398
Original-Commit-Ready: David Hendricks <dhendrix@chromium.org>
Original-Tested-by: David Hendricks <dhendrix@chromium.org>
Original-Reviewed-by: David Hendricks <dhendrix@chromium.org>
Change-Id: Idf48ffbc4c2794900e09dec6b2e34e33b21f87b4
Reviewed-on: http://review.coreboot.org/11662
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
When disconnect is detected in dwc2_split_transfer() the split
configuration registers should be cleared before return.
BRANCH=None
BUG=chrome-os-partner:44534
TEST=On Jerry, usb hot plug works with devices behind hubs
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 37594d8b4490b6d393d19d17d8e497db7de8817d
Original-Change-Id: Ie1eecec067305874513c6ceb95df4240dc393cd6
Original-Signed-off-by: Yunzhi Li <lyz@rock-chips.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/295625
Original-Reviewed-by: David Hendricks <dhendrix@chromium.org>
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Original-Commit-Queue: Lin Huang <hl@rock-chips.com>
Original-Tested-by: Lin Huang <hl@rock-chips.com>
Original-(cherry picked from commit d543e14cdc73bd549dd553c8d1d07672a1307981)
Original-Reviewed-on: https://chromium-review.googlesource.com/299700
Original-Commit-Ready: David Hendricks <dhendrix@chromium.org>
Original-Tested-by: David Hendricks <dhendrix@chromium.org>
Change-Id: Ib4604097743f2f9d763b29ee27f3bc1788a85a62
Reviewed-on: http://review.coreboot.org/11661
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Wished I hadn't seen that. Git saw the conflict (file was gone), both
committer and reviewer thought it would be a good idea to re-add it as
dead code (see 558e9b5: libpayload: Add minimal support for PL011 UART).
Change-Id: Ifea8113fbc59e0463eaedb86b976f54ec11113a9
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/11604
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This change allows video_printf to left/center/right-align text depending on
the enum value provided by the caller. This is useful especially because usually
the length of formatted string is unknown before calling video_printf.
BUG=none
BRANCH=smaug
TEST=drew fastboot screens on Smaug
CQ-DEPEND=CL:296460
Reviewed-on: https://chromium-review.googlesource.com/292929
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
(cherry picked from commit 436f05f60c1b88626740a35913e3ad37b5c777a3)
Change-Id: If1d50b7d8ddaa86eddc1618946756184cb87bfe1
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/295413
Reviewed-on: http://review.coreboot.org/11583
Tested-by: build bot (Jenkins)
Julius Werner