Correct registers base (PCI BAR) reading to be
more specification friendly. Registers base
only in [31-12] bits, all other proposed to be 0
but that not true for some motherboards. So
adding mask to use only valid bits.
Change-Id: I2e9a4997e016dab812ccfe654e966bc91d42a625
Signed-off-by: Anton Kochkov <anton.kochkov@gmail.com>
Reviewed-on: http://review.coreboot.org/1143
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This sets the timeout for control and bulk transfers to 2s per
transfer descriptor (like we set it in the EHCI driver). It also adds
delays around the disabling of control and bulk list access to
overcome some race conditions.
Change-Id: Ia2d1db890fca51c7d9477de163d55030e0c5a04a
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1127
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This adds support for usb interrupt transfers to the OHCI driver.
Basically this enables support for HID keyboard devices.
For each interrupt transfer endpoint, two queues of transfer
descriptors (TDs) are maintained: the first with initialized TDs
is linked to the periodic schedule of the host controller (HC), the
second holds processed TDs which will be polled by the usb class
driver. The HC moves processed TDs from its schedule to a done queue.
We periodically fetch all TDs from the done queue, to put them on the
queue associated with the endpoint, where they can be polled from.
Fully processed TDs (i.e. which have gone throuch all of this) will be
reinitialized and put on the first queue again.
Change-Id: Iaab72c04087b36c9f0f6e539e31b47060c190015
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1128
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
This fixes some memory corruption, leaking and padding issues within
the initialization of the OHCI driver.
Change-Id: If6891f2a53e339d32c4324f4c9e0b1ed07596a60
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1126
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
This adds correct processing of the done queue of the OHCI host
controller (HC). We will always process the done queue after a control
or bulk transfer. Unfortunately, it's hard to tell when the HC will
write out the done queue, so we have do free the transfer descriptors
later and have to allocate them one by one.
To distinguish different types of TDs (e.g. async vs. interrupt
transfers) on the done queue, they are flagged in the lsb of there
.config field. We can utilize this bit for our own purpose, as it's
reserved and the host controller won't interpret it and preserves its
state.
Change-Id: I3b2271ae6221cdd50fc0f94582afdfe52bf7e797
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1125
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
We should always have some timeout when we wait for the hardware. This adds
missing timeouts and a more standard compliant port reset to the OHCI driver.
Change-Id: I2cfcb1039fd12f291e88dcb8b74d41cb5bb2315e
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1076
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This removes a synthetic delay of 5ms from every OHCI USB command. A delay
here seems to be of no use and first tests have shown no glitches.
Change-Id: Ie72b2d49e6734345708f04f3f7b86bacc7926108
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1075
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This disables some debugging code in the OHCI USB driver which causes
reboots under rare circumstances.
Change-Id: Ic274c162846137ee00638ffbc59ccf1d8130586f
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1074
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Due to operator precedence incomming USB commands were missing some
flags.
Change-Id: I87ef51590c9db7a6cbc7304e1ccac29895f8a51e
Signed-off-by: Mathias Krause <mathias.krause@secunet.com>
Reviewed-on: http://review.coreboot.org/1084
Reviewed-by: Mathias Krause <minipli@googlemail.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Commit c4348d0 ("libpayload: Remove bitfield use from OHCI data
structures") missed to adapt a debug message. This patch fixes this.
Change-Id: I5f6a4be9c7f6f99cb103926772717e15a3cbca70
Signed-off-by: Mathias Krause <mathias.krause@secunet.com>
Reviewed-on: http://review.coreboot.org/653
Tested-by: build bot (Jenkins)
Reviewed-by: Bernhard Urban <lewurm@gmail.com>
Reviewed-by: Peter Stuge <peter@stuge.se>
We agreed that bitfields are a Bad Idea[tm].
Change-Id: Ic04f151091c359912835b8b3db488d2d41bd4bbb
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/479
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Peter Stuge <peter@stuge.se>
We have fatal(), which is just as good.
Coccinelle script:
@@
expression E;
@@
-usb_fatal(E)
+fatal(E)
Change-Id: Iabecbcc7d068cc0f82687bf51d89c2626642cd86
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/395
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
OHCI works when USB_DEBUG is disabled, but not, when disabled.
This is because the controller requires some more time after a
schedule has finished.
Also improve compliance with the OHCI spec.
Change-Id: I4685cc485ff9c52b489fbaa352ab889671cff876
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/365
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Time for the brown paper bag: OHCI controllers are not happy when
told to send data, but with obviously wrong addresses. It helps
to write the addresses into the data structures.
Change-Id: Ic0967dc8939e64af119cfb89400a045a2c077171
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/306
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Improve scanning for USB controllers.
Limitations:
- OHCI doesn't support interrupt transfers yet (ie. no keyboards)
- xHCI just does initialization and device attach/detach so far
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5691 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Anton Kochkov