Commit graph

4 commits

Author SHA1 Message Date
Arthur Heymans
7eb0157fca device/dram/ddr2.c: Decoding byte[12] bit7 as self refresh flag
"Annex J: Serial Presence Detects for DDR2 SDRAM (Revision 1.3)" note
4 says bit7 of byte 12 indicates whether the assembly supports self
refresh.

This patch decodes this and modifies decoding tRR accordingly.

Change-Id: I091121a5d08159cea4befdedb5f3a92ce132c6e5
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/21620
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2017-09-22 18:31:03 +00:00
Arthur Heymans
3397aa1fd4 device/dram/ddr2: Add a function to normalize tCLK
Also make most significant bit function accessible outside the scope
of this file.

Change-Id: I3ab39d38a243edddfde8f70ebd23f79ff774e90e
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/18320
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2017-09-06 04:38:55 +00:00
Arthur Heymans
87f7588c50 device/dram/ddr2.c: Fix is_registered_ddr2
Type 0x10 is mini RDIMM according to JEDEC DDR2 SPD
specifications.

Change-Id: I6d35bd74961326ebd9225f044313b107aca24bda
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/20058
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2017-06-09 16:33:38 +02:00
Patrick Rudolph
6e53ae6f5c device/dram/ddr2: Add common ddr2 spd decoder
Decode DDR2 SPD similar to DDR3 SPD decoder to ease
readability, reduce code complexity and reduce size of
maintainable code.

Rename dimm_is_registered to spd_dimm_is_registered_ddr3 to avoid
compilation errors.

Change-Id: I741f0e61ab23e3999ae9e31f57228ba034c2509e
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/18273
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins)
2017-03-10 11:17:27 +01:00