Commit graph

1717 commits

Author SHA1 Message Date
Ed Swierk
d39aad9323 Add definitions for DDR2 SPD registers.
Signed-off-by: Ed Swierk <eswierk@arastra.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3547 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-28 18:23:58 +00:00
Ed Swierk
7eda890d9a Eric Biederman believes that he and Tom Zimmerman of the defunct
LinuxNetworx own the copyright for the Intel e7520, e7525 and 3100
raminit code.

Signed-off-by: Ed Swierk <eswierk@arastra.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3546 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-28 18:22:40 +00:00
Ward Vandewege
ec2bd53c37 If you have
option CONFIG_COMPRESSED_PAYLOAD_LZMA=1
  option CONFIG_PRECOMPRESSED_PAYLOAD=1

set in Config.lb but accidentally use an uncompressed payload, coreboot (v2)
bombs out like this:

  elfboot: Attempting to load payload.
  rom_stream: 0xfffc0000 - 0xfffdefff
  Uncompressing to RAM 0x01000000 Decoder scratchpad too small!
  Decoding error = 1
  Unexpected Exception: 6 @ 10:04000408 - Halting
  Code: 0 eflags: 00010057
  eax: 00000101 ebx: 04000400 ecx: 000003d4 edx: fffc0000
  edi: 04000400 esi: 04000401 ebp: 04000400 esp: 0013dfb4

The attached patch modifies v2's lzma code so that it assumes an uncompressed
payload if it fails to find a properly compressed payload.

Compare with the fatal error above:

  elfboot: Attempting to load payload.
  rom_stream: 0xfffc0000 - 0xfffdefff
  Uncompressing to RAM 0x01000000 Decoder scratchpad too small!
   olen = 0x00000000 done.
  Decompression failed. Assuming payload is uncompressed...
  Found ELF candidate at offset 0
  header_offset is 0
  Try to load at offset 0x0

If you don't have CONFIG_COMPRESSED_PAYLOAD_LZMA and
CONFIG_PRECOMPRESSED_PAYLOAD set and use an uncompressed payload, things are as
before:

  elfboot: Attempting to load payload.
  rom_stream: 0xfffc0000 - 0xfffdefff
  Found ELF candidate at offset 0
  header_offset is 0
  Try to load at offset 0x0

One can argue that this is a case of 'builder beware', but my counter argument
is that anything that causes unexpected runtime breakage is really, really,
really bad, and should be avoided where possible.

This patch also fixes one erroneous comment.

Signed-off-by: Ward Vandewege <ward@gnu.org>
Acked-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3542 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-27 21:53:11 +00:00
Ed Swierk
6adfaa690c This patch adds PCI device IDs for the Intel EP80579 Integrated Processor,
and renames some existing macros for clarity.

Signed-off-by: Ed Swierk <eswierk@arastra.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3536 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-25 17:02:09 +00:00
Ed Swierk
6c66c95787 This patch modifies the Intel 3100 southbridge code to recognize the
integrated LPC, SMBus, USB and SATA devices of the Intel EP80579
Integrated Processor.

Signed-off-by: Ed Swierk <eswierk@arastra.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3535 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-25 14:45:00 +00:00
Ed Swierk
1996313756 This patch implements support for the CPU core of the Intel EP80579
Integrated Processor.

Signed-off-by: Ed Swierk <eswierk@arastra.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3534 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-25 14:41:11 +00:00
Arne Georg Gleditsch
33e6d5dec6 Add Tyan S2912 platform with AMD Family 10 support.
Thanks Arne. Good job.

Signed-off-by: Arne Georg Gleditsch <arne.gleditsch@numascale.com>
Acked-by: Marc Jones <marc.jones@amd.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3526 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-19 17:59:34 +00:00
Stefan Reinauer
8e65adb67d Fix outb to 0x80 delay functions to use inb instead (fixes excessive post codes
in a couple of occurences)

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3509 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-13 12:16:15 +00:00
Marc Jones
b865070023 License updated to GPL v2.
Signed-off-by: Marc Jones <marc.jones@amd.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3504 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-12 19:45:12 +00:00
Ward Vandewege
dc93affe72 Enable both IDE ports for our qemu target.
Signed-off-by: Ward Vandewege <ward@gnu.org>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3481 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-08 00:08:01 +00:00
Marc Jones
a2c951edf7 Clean up whitespace and comments style. (trivial)
Signed-off-by: Marc Jones <marc.jones@amd.com>
Acked-by: Marc Jones <marc.jones@amd.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3480 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-07 22:00:51 +00:00
Uwe Hermann
5f1037cb69 Initial support for the ASI MB-5BLGP (Neoware Eon 4000s).
This works fine in Linux if you use the 'irqpoll' kernel command
line option.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3469 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-04 15:40:45 +00:00
Stefan Reinauer
9ecf8fb1cf Remove welcome message from elfboot. None of the other subsystems have their
own welcome message.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3468 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-03 10:38:26 +00:00
Stefan Reinauer
912857ec6c fix lots of warnings for cache as ram builds (trivial)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3467 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-03 10:35:06 +00:00
Stefan Reinauer
87c938f139 adapt Uncompressing.. patch for AMD code. Also replace "linxbios" by "coreboot"
in a number of places.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3466 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-02 19:17:42 +00:00
Stefan Reinauer
685240610b Go back to SIPI WAIT state for those CPUS defining the newly introduced
CONFIG_AP_IN_SIPI_WAIT flag. Newer Intel CPUs need this to operate with
multiple cores.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3465 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-02 15:15:23 +00:00
Stefan Reinauer
a56edacbe3 This patch
* fixes a warning
* puts some debug messages to spew because they're only useful to debug CAR
* print an explicit message "Uncompressing..." instad of "Copying..." when 
  coreboot_ram.rom is compressed.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3463 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-02 15:09:12 +00:00
Stefan Reinauer
db1b608fca oops, forgot these in the cleanup.. (trivial)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3461 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-01 19:22:34 +00:00
Stefan Reinauer
11a2014f49 a heuristics is something different
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3460 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-01 13:08:33 +00:00
Stefan Reinauer
75f519ca86 Typo, thanks to Idwer for spotting this. (trivial patch)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3459 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-01 12:53:04 +00:00
Stefan Reinauer
51754a38f2 clarify in the printks what function is actually called. This little smart magic
drove me crazy during debugging. Fix Typos. Add a warning because the
on-chipset devices are hardcoded. For newer machines, a lot more memory space
will have special meanings, and we can't hardcode them all in an ifdef desert.

(trivial)

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3458 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-01 12:28:38 +00:00
Stefan Reinauer
1409136281 clean out obsoleted config.lb rules and output, fix indenting (trivial)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3457 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-01 12:20:26 +00:00
Stefan Reinauer
48b85fc6a9 use printk, when possible. (trivial)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3456 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-01 12:12:37 +00:00
Stefan Reinauer
5a522d4a42 match against all steppings of a CPU model, because these are _model_ drivers.
(trivial)

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3455 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-01 12:11:00 +00:00
Stefan Reinauer
ac555b1c69 serial.inc is not used anywhere. drop it (trivial)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3454 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-01 12:06:08 +00:00
Stefan Reinauer
57d2af895e same spelling in all mtrr output.. (trivial)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3453 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-01 11:54:55 +00:00
Stefan Reinauer
df6c858218 drop unused code (trivial)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3452 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-01 11:53:39 +00:00
Stefan Reinauer
96a60363f8 coding style fixes (trivial)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3451 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-01 11:50:52 +00:00
Stefan Reinauer
20ffc03efa fix compile warnings of rom_stream.c (trivial)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3450 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-01 11:48:00 +00:00
Stefan Reinauer
951c62f074 add some SPD values from specs. (trivial)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3449 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-01 11:40:16 +00:00
Stefan Reinauer
a91e0fe441 function prototypes don't need extern. (trivial)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3448 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-01 11:39:35 +00:00
Stefan Reinauer
749c05e0fd fix warning in vga console code (trivial)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3447 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-01 11:38:23 +00:00
Stefan Reinauer
fec2c4f47f fix typo in coreboot_ram.ld comment (trivial)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3446 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-01 11:37:33 +00:00
Stefan Reinauer
bba53ed1a7 fix typo in commend of generic_sdram.c (trivial)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3445 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-01 11:36:40 +00:00
Stefan Reinauer
3c580b539e clean up comment in onboard.c (trivial)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3444 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-01 11:35:46 +00:00
Stefan Reinauer
807dec0ebc clean up Config.lb in lib/ (trivial)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3443 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-01 11:32:12 +00:00
Stefan Reinauer
7a4f688f4f fix warnings, make mptable struct members explicitly packed, as they're
supposed to be. rename LXBIOS to CORE in ACPI table identifiers. (trivial)

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3442 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-01 11:31:08 +00:00
Stefan Reinauer
d98cf5bed9 fix typos and warnings in the device tree code (trivial)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3441 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-01 11:25:41 +00:00
Roman Kononov
96e3022cd4 This patch fixes the kernel EBDA mislocation problem. Thank you, Yinghai.
The change in tables.c protects the legacy x86 BIOS data segment
(0x400-0x4ff) from being used for storing coreboot tables. Some
bytes from the segment are used by the kernel and should not be
garbled.

The change in coreboot_table.c is not strictly necessary. It removes
some redundancy and confusion.

Signed-off-by: Roman Kononov <kononov@dls.net>
Acked-by: Marc Jones <marc.jones@amd.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3437 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-07-23 23:22:59 +00:00
Marc Jones
2aa804fdcc Fix r3434 check-in. Added missing end to Options.lb. Not entirely sure how it
went missing....

Signed-off-by: Marc Jones <marc.jones@amd.com>
Acked-by: Marc Jones <marc.jones@amd.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3436 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-07-23 22:27:19 +00:00
Marc Jones
35b5361636 Add AMD Fam10 B3 default settings to match AMD example code.
Includes setting for most recent errata.

Signed-off-by: Marc Jones <marc.jones@amd.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3435 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-07-23 21:44:23 +00:00
Marc Jones
51737cf7da Update to the latest AMD Fam10 microcode patches.
Add platform option for patch file name.

Signed-off-by: Marc Jones <marc.jones@amd.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3434 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-07-23 21:11:20 +00:00
Marc Jones
c3ec1ac331 Memory initialization support for AMD Fam10 B3 (B0-B2 already supported).
Signed-off-by: Marc Jones <marc.jones@amd.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3433 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-07-23 21:04:03 +00:00
Marc Jones
3a8556354d Missed a const in my previous checkin, r3426 (trivial).
Signed-off-by: Marc Jones <marc.jones@amd.com>
Acked-by: Marc Jones <marc.jones@amd.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3432 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-07-21 22:23:57 +00:00
Sean Nelson
3d135e6033 Add support for the Winbond W83697HF Super I/O.
Signed-off-by: Sean Nelson <snelson@nmt.edu>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3430 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-07-21 14:49:04 +00:00
Marc Jones
eafceddf6c Add manual HT BUID fixup to detect previously set BUIDs in early init. This fixes the non-coherent(sb) link running at default speed.
Fix HT event notify to output useful information.

Signed-off-by: Marc Jones <marc.jones@amd.com>

Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3426 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-07-17 19:54:06 +00:00
Marc Jones
212486e9f6 Clean up AMD FAM10 HT variable initialization. The structure init is cleaner, avoid compiler warnings, and matches the AMD example code more closely.
Signed-off-by: Marc Jones <marc.jones@amd.com>

Acked-by: Peter Stuge <peter@stuge.se>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3425 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-07-17 19:50:37 +00:00
Marc Jones
2df291574d Add Fam10 Gart table walk enable for MCA reporting to match AMD example code.
Signed-off-by: Marc Jones <marc.jones@amd.com>

Acked-by: Peter Stuge <peter@stuge.se>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3424 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-07-17 19:44:08 +00:00
Marc Jones
aee0796506 Clean up comments, whitespace, and copyright date in the AMD HT code.
Signed-off-by: Marc Jones <marc.jones@amd.com>
Acked-by: Marc Jones <marc.jones@amd.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3423 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-07-16 21:09:31 +00:00
Uwe Hermann
049814cc8f Add missing Intel CPU (trivial).
Tested by me on actual hardware.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3422 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-07-15 13:22:21 +00:00