Commit Graph

16418 Commits

Author SHA1 Message Date
Edward O'Callaghan e3f47eada3 vendorcode/amd/agesa/f1{4,2,0} Sync Include directory
Sync and merge useless differences.

Change-Id: I4eea66c35af66d473dd56db9ccf105c878266f22
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: https://review.coreboot.org/7513
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-02-03 03:50:05 +01:00
Edward O'Callaghan c389635f6e vendorcode/amd/agesa/f15?tn: Strip false/redudant AMD ver tag
Strip out the AMD internal version tag, e.g.
 * @e \$Revision: 63425 $ @e \$Date: 2011-12-22 11:24:10 -0600 (Thu, 22 Dec 2011) $
which are false/inconsistent and serve no real meaning or purpose now.

Change-Id: I4cca0899eba66a1c361ba784c5ac0222b0ee1aa6
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: https://review.coreboot.org/7516
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-02-03 03:48:17 +01:00
zbao 11a262c86c util/kconfig:xconf(QT): Update QT version of xconf
Update the qconf.cc and qconf.h to upstream code, which added support
of QT5 and removed the support of QT3.

All code is ported from kernel.org, with only one line added to qconf.cc.
int kconfig_warnings = 0;

Change-Id: Ice77cddcc00e43375039379978e55f42acf867f7
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/13130
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-02-03 03:46:18 +01:00
Alexandru Gagniuc 420caafee8 include/device: Move inline functions from pci_def.h to pci.h
pci_def.h is supposed to only contain definitions, such that it may be
included in assembly files. Declaration of functions in said file
prevents that.

Change-Id: I0f90a74291c8a2ef7a1e1027d2d2182f896050fb
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: https://review.coreboot.org/13300
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-02-03 03:32:58 +01:00
Martin Roth 0cd9ff8987 xcompile: Add a way to specify -march=i586
Instead of instructing users to edit xcompile when they want to build
a quark platform, give the build a way to set -march=586 so that
the quark code will build correctly.  The Quark processor does not
support the instructions introduced with the Pentium 6 architecture.

Change-Id: I0ed69aadc515f86f76800180e0e33bcd75feac5a
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/13552
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
Reviewed-by: Leroy P Leahy <leroy.p.leahy@intel.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: FEI WANG <wangfei.jimei@gmail.com>
2016-02-03 02:58:10 +01:00
Patrick Georgi a9fa0c897c crossgcc: Also add the nds32le architecture to the coreboot Makefile
Change-Id: Ibf3346586d188dbd5b7ab10bedfc1609b2bb1499
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/13565
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-02-03 02:50:33 +01:00
Patrick Georgi 6c0ccfb10d crossgcc/Makefile.inc: deduplicate cross*-$arch rules
Change-Id: Idee4eb5d112e3f6bffced0681e9112101bed6763
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/13524
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-02-03 02:40:11 +01:00
Stefan Reinauer d5779c15eb buildgcc: Move all toolchain build targets to util/crossgcc
There is a lot of potential to completely get rid of Makefile
and keep everything in Makefile.inc, but for now this declutters
the main Makefile.inc.

Change-Id: I653313c74207f955514c036c81efcbfd988827c9
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/13518
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-02-03 02:22:27 +01:00
Stefan Reinauer 22009a3a58 buildgcc: Reorganize when IASL is built
Instead of passing a variable around and painstakingly making sure that
one target builds with it, and the others without, make IASL a
dependency of the "catch all" targets.

This also drops iasl as dependency from individual architecture targets,
but things are more orthogonal that way.

Note: instead of `make crossgcc-i386`, use `make crossgcc-i386 iasl`

Change-Id: I8cd2e89acdd0f795836571470bad28fbf8797f58
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/13563
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-02-03 02:21:48 +01:00
Stefan Reinauer 8adbcc2430 buildgcc: add nds32le compiler
Some Chrome ECs are based on that architecture

Change-Id: Ib5d0c2f6f518fafc1ceb02c5f71c0935d16c66bb
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/13562
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-02-03 02:21:09 +01:00
Stefan Reinauer 2cc2ff6f3f buildgcc: Rename ARM target from armv7a to arm
The ARM target can compile for much more than just v7a.

Change-Id: Ia4f67abcffdfe9c56c5d1848c75dfea83755e755
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/13517
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-02-03 02:20:51 +01:00
Lee Leahy 9590992402 soc/intel/common: Use SoC specific routine to read/write MTRRs
The registers associated with the MTRRs for Quark are referenced through
a port on the host bridge.  Support the standard configurations by
providing a weak routines which just do a rdmsr/wrmsr.

Testing:
*  Edit the src/mainboard/intel/galileo/Makefile.inc file
   *  Add "select DISPLAY_MTRRS"
   *  Add "select HAVE_FSP_PDAT_FILE"
   *  Add "select HAVE_FSP_RAW_BIN"
   *  Add "select HAVE_RMU_FILE"
*  Place the FSP.bin file in the location specified by CONFIG_FSP_FILE
*  Place the pdat.bin files in the location specified by
CONFIG_FSP_PDAT_FILE
*  Place the rmu.bin file in the location specified by CONFIG_RMU_FILE
*  Testing is successful if:
   *  The MTRRs are displayed and
   *  The message "FspTempRamExit returned successfully" is displayed

TEST=Build and run on Galileo

Change-Id: If2fea66d4b054be4555f5f172ea5945620648325
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/13529
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
2016-02-02 19:00:35 +01:00
Lee Leahy 05c0215ff3 Documenation: x86 Quark/Galileo remove i586 warning
Leverage patch 13552 by adding USE_MARCH_586 to soc/intel/quark/Kconfig.

TEST=None

Change-Id: Ifac947db53e967b98b9494db3f6c3f8ee039ac73
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/13561
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins)
2016-02-02 19:00:13 +01:00
Lee Leahy c1e4f89953 Documentation: Add x86 documentation for required files
Document the required files to perform a minimal coreboot/FSP build for
x86.

TEST=None

Change-Id: I65b2947114634fce982ce82fb7c577fd5f47ed10
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/13438
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-02-02 15:54:43 +01:00
Martin Roth 2f91403303 src: Fix various spelling and whitespace issues.
This fixes some spelling and whitespace issues that I came across
while working on various things in the tree.

There are no functional changes.

Change-Id: I33bc77282f2f94a1fc5f1bc713e44f72db20c1ab
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/13016
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-02-02 14:37:09 +01:00
Patrick Georgi bda8a04b01 build system: add Chrome OS futility to tools
Change-Id: I08925d110c6faa9e37107d63bfa75d0ab677d379
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/13545
Tested-by: build bot (Jenkins)
Reviewed-by: Nico Huber <nico.h@gmx.de>
2016-02-02 14:35:38 +01:00
Patrick Georgi f92068d9c2 build system: avoid setting HOSTCC to " gcc"
Change-Id: I650b3a347edc2d575c5cbee2051f8ed7b4bd1645
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/13544
Tested-by: build bot (Jenkins)
Reviewed-by: Nico Huber <nico.h@gmx.de>
2016-02-02 14:35:11 +01:00
Stefan Reinauer f76ceea705 commonlib: move uefi includes out of commonlib includes
... and move them into the code using them, instead.

Change-Id: I2391234797ad00da8038dda198eadf0b0fcaedb2
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/13526
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-02-02 14:27:03 +01:00
Loic 0d473512c7 asus/f2a85-m: Configure Hudson to be legacy-free
Change-Id: I67271f2a209fc96eea6181f8875a5e69cf98d8c4
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/13511
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-02-02 14:25:20 +01:00
Loic 96a598b6c9 amd/agesa/family15tn: Add Richland CPU ID
Add the AMD A8-660K APU.

Change-Id: I210a8ba962529c26a535965689672a46b09e325f
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/13510
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-02-02 14:25:04 +01:00
Martin Roth cfc80c2211 arch/x86: Add second paragraph to license header
Change-Id: Ic1da46d2abc8d20987048e4ef1e7a776d0c685d6
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/13555
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins)
2016-02-02 14:23:44 +01:00
Martin Roth bbf1399c73 Makefile: Add a comment to fix syntax highlighting
Trivial fix for syntax highlighting in editors.  Some get confused by
the double quote that doesn't have a close quote and stop highlighting
at that point.  This comment closes the quote and the paren pair so
that they can recover.

Change-Id: I566e8e0f4412009f679ab079f20ae30c2049b502
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/13435
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-02-02 03:25:23 +01:00
Martin Roth f8db028a32 lint: Check license headers for both paragraphs of the GPL
If the GPLv2 or GPLv2+ license header is being used on a
coreboot file, make sure it has two paragraphs as specified by
the Common License Header section in the developer guidelines
in the coreboot wiki.

Change-Id: Ifffa0fa7272f5a4b129d4b7b8a515f8795bc2401
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/13119
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-02-02 03:24:57 +01:00
Martin Roth 50943b15a3 payloads/coreinfo: Add defaultbuild target
Add a single target to do the full coreinfo build using default Kconfig
values for both coreinfo and libpayload.

Change-Id: Id622fb2df480e826f6d868dbe01385d76587be26
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/13426
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-02-02 03:24:21 +01:00
Martin Roth b00ddecd99 Kconfig: indent with tabs, not spaces.
Change-Id: I8996f8ab739a07014a4189738b5624485d752d9d
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/13540
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-02-02 01:44:56 +01:00
Martin Roth 1010868f87 src/: Fix Kcofig symbols missing CONFIG_ prefix
- Add CONFIG_ prefix to two symbols.
- Remove the use of the third symbol as it will never be matched.

Change-Id: Ifa7f6884001cb05fb8397f193c4b08a0161f498c
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/13539
Tested-by: build bot (Jenkins)
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-02-02 01:44:12 +01:00
Jean Lucas 9ab9c33d7d lib/gcov-glue.c: Remove trailing number from COVERAGE_MAGIC macro
The COVERAGE_MAGIC macro has a trailing `4' on it, which makes it a
64-bit large integer, as opposed to a 32-bit unsigned integer, as
originally designated in `util/cbmem/cbmem.c'. Remove this number so
building with CODE_COVERAGE will succeed.

Change-Id: Ib5d7f2704a4c092c3eca6f62e219edb30950d793
Signed-off-by: Jean Lucas <jean@4ray.co>
Reviewed-on: https://review.coreboot.org/13520
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
2016-02-02 01:39:28 +01:00
Timothy Pearson 21724934d5 cpu/amd/fam10h-15h: Add workaround for AMD Erratum 600
Change-Id: Ie175b5b490f77cc380536ebd737da8618d4b448b
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: https://review.coreboot.org/13170
Tested-by: build bot (Jenkins)
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
2016-02-01 23:00:51 +01:00
Timothy Pearson bd8ab8890f mainboard/asus/kgpe-d16: Wait for all APs to stop before MCT setup
Under certain conditions when the APs are still executing during
MCT setup the system can hang.  This was the root cause of most
of the S3 resume failures on this platform; waiting for AP stop
before MCT setup allows for reliable S3 resume.

Change-Id: I329eea9a8912d7b57efe6aae327d24fd6c3fd782
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: https://review.coreboot.org/13169
Tested-by: build bot (Jenkins)
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Reviewed-by: Martin Roth <martinroth@google.com>
2016-02-01 22:57:55 +01:00
Timothy Pearson cb1dec57dc cpu/amd/fam10h-fam15h: Add new wait_ap_stopped function
Under certain conditions, such as when microcode updates are
being performed, it is important to make sure all APs have
finished updates and are halted before continuing with the
boot process.

Add a new wait_ap_stopped() function to allow for this
functionality to be added to the appropriate mainboard
romstage source files.

Change-Id: Ib455c937888a58b283bd3f8fda1b486eea41b0a7
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: https://review.coreboot.org/13168
Tested-by: build bot (Jenkins)
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Reviewed-by: Martin Roth <martinroth@google.com>
2016-02-01 22:57:08 +01:00
Timothy Pearson b410d267e3 nb/amd/amdmct/mct_ddr3: Save and restore SkewMemClk for S3 resume
Change-Id: Ib331bd330530d4d6be5eb7351d9f9b15c135dd63
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: https://review.coreboot.org/13167
Tested-by: build bot (Jenkins)
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Reviewed-by: Martin Roth <martinroth@google.com>
2016-02-01 22:56:33 +01:00
Timothy Pearson e79cb5e19d mainboard/asus/kgpe-d16: Use W83667HG-A specific PS/2 ASL file
Change-Id: I5a4e223b2e247decd30d8fb2a083be4cff6500a4
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: https://review.coreboot.org/13166
Tested-by: build bot (Jenkins)
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Reviewed-by: Martin Roth <martinroth@google.com>
2016-02-01 22:56:20 +01:00
Timothy Pearson b8d746fd13 mainboard/asus/kgpe-d16: Update DSDT with new devices and bump version
Change-Id: I15fedb067f1911799f7528b60b8754f2984b38ec
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: https://review.coreboot.org/13161
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
2016-02-01 22:42:49 +01:00
Timothy Pearson 448e386309 drivers/pc80: Add PS/2 mouse presence detect
On certain Winbond SuperIO devices, when a PS/2 mouse is not
present on the auxiliary channel both channels will cease to
function if the auxiliary channel is probed while the primary
channel is active.  Therefore, knowledge of mouse presence
must be gathered by coreboot during early boot, and used to
enable or disable the auxiliary PS/2 port before control is
passed to the operating system.

Add auxiliary channel PS/2 device presence detect, and update
the Winbond W83667HG-A driver to flag the auxiliary channel as
disabled if no device was detected.

Change-Id: I76274493dacc9016ac6d0dff8548d1dc931c6266
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: https://review.coreboot.org/13165
Tested-by: build bot (Jenkins)
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Reviewed-by: Martin Roth <martinroth@google.com>
2016-02-01 22:10:46 +01:00
Timothy Pearson c2ed40b48a mainboard/asus/kgpe-d16: Add support for lifted BSP APIC IDs
Change-Id: Ic4b68a032068208d56b2a04150f7fc7d61b38eba
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: https://review.coreboot.org/13164
Tested-by: build bot (Jenkins)
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Reviewed-by: Martin Roth <martinroth@google.com>
2016-02-01 22:10:28 +01:00
Timothy Pearson c04f894f6b mainboard/asus/kgpe-d16: Add missing IRQ route to mptable
The IOMMU/HT device was not routed correctly; add the proper APIC
mappting to the mptable generation code.  Also clarify comments
surrounding the pin mappings.

Change-Id: I72ceb0f22dabdfa71a1f6231ccb841face08ff7a
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: https://review.coreboot.org/13163
Tested-by: build bot (Jenkins)
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Reviewed-by: Martin Roth <martinroth@google.com>
2016-02-01 22:10:15 +01:00
Timothy Pearson cb93c130cf mainboard/asus/kgpe-d16: Clean up legacy PIRQ table code
Change-Id: Ib4f46944f076f1e696cf16a1e532eb8635b603c9
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: https://review.coreboot.org/13162
Tested-by: build bot (Jenkins)
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Reviewed-by: Martin Roth <martinroth@google.com>
2016-02-01 22:09:59 +01:00
Timothy Pearson 51c31696f2 southbridge/amd/sb700: Enable extended APIC ID when Kconfig option set
Change-Id: I52fc2c2294edead3b5dacf397c0a1ab2e08b1e3f
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: https://review.coreboot.org/13160
Tested-by: build bot (Jenkins)
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Reviewed-by: Martin Roth <martinroth@google.com>
2016-02-01 22:04:24 +01:00
Timothy Pearson 919c459c17 southbridge/amd/sb700: Set HPET min tick value to RPR recommendation
Change-Id: I766eca6369b60a79a6823bc744934e3f1fbc17b2
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: https://review.coreboot.org/13159
Tested-by: build bot (Jenkins)
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
2016-02-01 22:04:12 +01:00
Timothy Pearson 0df7046ad0 cpu/amd/fam10h-15h: Fix Family 15h boot hang when BSP lift enabled
The existing code did not allow for the second core of the BSP to
reside on an APIC ID other than 1, leading to a boot hang on Family
15h processors when APIC_ID_OFFSET was set to anything other than 0.
Furthermore, insufficient AP stack space was allocated for AP start.

Change-Id: I4ded3cfb3736149e2265848014352d7622d5042a
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: https://review.coreboot.org/13158
Tested-by: build bot (Jenkins)
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-02-01 22:03:53 +01:00
Timothy Pearson 3679d7f909 mainboard/asus/kgpe-d16: Use W83667HG-A SuperIO instead of NCT5572D
Change-Id: If67999098fbe2831eeb30cb8b362c558db5d2688
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: https://review.coreboot.org/13157
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2016-02-01 22:03:35 +01:00
Patrick Georgi 68e3f6dd37 util/release: extend release script
Add the ability to release a given commit id, and normalize the tarballs
to use coreboot/1000 for owner and group, and the last commit date as
mtime for all files.

Change-Id: Ia349f429090fe9804f7f14c226812646e2f712be
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/13514
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-02-01 08:58:37 +01:00
Stefan Reinauer a851bbb40a buildgcc: Add GNU make to reference toolchain
Change-Id: I8a41065880c3fd1f95ee8877031bf1738aaae859
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/13519
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-01-31 22:41:21 +01:00
Stefan Reinauer ea1a5fef4d buildgcc: Update LLVM to 3.7.1
Not much testing, update mostly so we can test with the
latest scan-build.

Change-Id: I50d28b7e0dfd31f9ae565c8515d5ab1760ca4c62
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/13516
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-01-31 22:37:51 +01:00
Stefan Reinauer 27522ad375 buildgcc: Rename armv7-a-eabi compiler to arm-eabi
The compiler really supports a whole line of ARM CPUs, not just
ARMv7a:
arm-eabi-gcc: note: valid arguments to '-march=' are: armv2 armv2a
   armv3 armv3m armv4 armv4t armv5 armv5e armv5t armv5te armv6 armv6-m
   armv6j armv6k armv6s-m armv6t2 armv6z armv6zk armv7 armv7-a armv7-m
   armv7-r armv7e-m armv7ve armv8-a armv8-a+crc iwmmxt iwmmxt2 native
So let's reflect this in the cross compiler name.

Change-Id: I717760d80954655b2de9ae019b813d81e9a75762
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/13515
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-01-31 22:37:35 +01:00
Stefan Reinauer eaa014676e vendorcode/intel: remove unused apple specific assembler macros
Since this code is pulled in through commonlib, it will break compilation
of cbfstool on OSX.

Change-Id: I342bfa7e755aa540c4563bb5cd8cccacee39d188
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/13525
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-01-31 22:37:06 +01:00
Lee Leahy e0918bbc68 drivers/intel/fsp1_1: Fix spelling error in API and copyright
Change granluarity to granularity.
Change wacbmem_entryanty to warranty.
Update copyright dates.

TEST=None

Change-Id: Ib7775cb33616751760919a5850777dc6f77a6be9
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/13528
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-01-31 20:51:29 +01:00
Vladimir Serbinenko 2387220c1b h8/battery: Fix ASL warning.
Change-Id: Idf74e400efa3fea8eb74f372e4f261ab6567db8a
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: https://review.coreboot.org/13513
Tested-by: build bot (Jenkins)
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@googlemail.com>
2016-01-31 14:41:01 +01:00
Vladimir Serbinenko 8b73cee9e5 stout: Fix VGA PCIIDs.
Change-Id: I7dcde170d0f59ea9886342c0d2c09b70b9d0d84d
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: https://review.coreboot.org/13537
Tested-by: build bot (Jenkins)
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@googlemail.com>
2016-01-31 14:39:06 +01:00
Martin Roth b5400ad412 kconfig_lint: Add readme document
The readme describes the operation and usage of kconfig_lint.
It also lists all the notes, warnings, and errors that kconfig_lint
looks for.

Change-Id: I873f394ff93fce42cd9638cbbad6134f1aef3a6a
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/13464
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-01-30 17:29:40 +01:00