Commit Graph

67 Commits

Author SHA1 Message Date
Dave Frodin a0edc78523 superio/fintek/f81216h: Add the correct unlock key values
The actual key values were not added in commit 17ace8255.
TEST: amd/lamar shows the correct result.

Change-Id: I8f20e3d0ce83dd87b6c233ee98c3e77a6b7c1b03
Signed-off-by: Dave Frodin <dave.frodin@se-eng.com>
Reviewed-on: http://review.coreboot.org/8375
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
Tested-by: Marc Jones <marc.jones@se-eng.com>
2015-02-14 00:53:26 +01:00
Dave Frodin 17ace82552 superio/fintek: Add required changes so F81216H can be used
The amd/lamar mainboard is the first mainboard to use the f81216h.
These changes are needed to fix up commit 27a63d77 so the
Super I/O builds and functions correctly.
  - Wrong #include name
  - Removed global variable in romstage
  - Missing "case" in switch()

Change-Id: I1b2058a915b776664fba14e4341e8a410b50330f
Signed-off-by: Dave Frodin <dave.frodin@se-eng.com>
Reviewed-on: http://review.coreboot.org/8255
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2015-02-04 15:45:39 +01:00
Edward O'Callaghan 27a63d7733 superio/fintek/f81216h: Implement device support
Change-Id: I20a34b569f109dd12af29e9e0cee8f7f6b8ebb80
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/7309
Tested-by: build bot (Jenkins)
Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
2014-11-01 21:28:43 +01:00
Edward O'Callaghan 2c9d2cf75c {arch,cpu,drivers,ec}: Don't hide pointers behind typedefs
Change-Id: Id88bb4367d6045f6fbf185f0562ac72c04ee5f84
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: http://review.coreboot.org/7146
Tested-by: build bot (Jenkins)
2014-10-27 23:40:05 +01:00
Edward O'Callaghan f21bdc3020 superio/*/superio.c: Don't hide pointer types behind typedefs
Hiding pointer types behind 'typedef's is usually not a great
idea at the best of times. Worse the typedef becomes an integer
at different stages in Coreboot. Let us refrain from doing this
at all.

Change-Id: Ia2ca8c98bb489daaa58f379433875864f6efabc8
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/7136
Tested-by: build bot (Jenkins)
Reviewed-by: Nico Huber <nico.h@gmx.de>
2014-10-27 12:51:00 +01:00
Edward O'Callaghan 85836c2215 superio: Use 'pnp_devfn_t' over 'device_t' in romstage component
The romstage component of Super I/O support is in fact written around
passing a lower and upper half packed integer. We currently have two
typedef's for this, 'device_t' and 'pnp_devfn_t'. We wish to make use of
'pnp_devfn_t' over 'device_t' as 'device_t' changes it's typedef in the
ramstage context and so is really a conflicting definition. This helps
solve problems down the road to having the 'real' 'device_t' definition
usable in romstage later.

This follows on from the rational given in:
c2956e7 device/pci_early.c: Mixes up variants of a typedefs to 'u32'

Change-Id: Ia9f238ebb944f9fe7b274621ee0c09a6de288a76
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/6231
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins)
2014-10-27 12:50:33 +01:00
Felix Held b666793925 superio/f71869ad: fix documentation of io_info mask values
Change-Id: I5d0a945de45f8f4a77193135e63f480af14a0136
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: http://review.coreboot.org/6279
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-07-18 20:00:06 +02:00
Edward O'Callaghan ff7e676c9f superio/fintek/f71869ad: config struct should be const qualified
The 'superio_fintek_f71869ad_config' struct packed by devicetree.cb
should have its type declared with the 'const' qualifier.

Change-Id: Ieb86861ee821e77680cc4d0de202dbd7535b844d
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/6224
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-15 20:49:03 +02:00
Edward O'Callaghan e1fe688c9b src/*: Remove the last remnants of struct keyboard
Change-Id: I7d0e8d2119a470428cfc01c0738b8988ab75ba2d
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/5624
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2014-05-13 12:14:34 +02:00
Edward O'Callaghan f6f1ad6376 superio/*: Remove redundant chip.h header
Change-Id: If7141112ea67071ee05c52f455c3b2496aa7e17e
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/5622
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2014-05-13 12:14:00 +02:00
Edward O'Callaghan def00be41d src/drivers/pc80: Remove empty struct keyboard
This is a empty struct that has propagated through the superio's & ec's
but really does nothing. Time to get rid of it before it adds yet more
cruft. However, since this touches many superio's at once we do this in
stages by first changing the function type to be a pure procedure.

Change-Id: Ibc732e676a9d4f0269114acabc92b15771d27ef2
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/5617
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Rudolf Marek <r.marek@assembler.cz>
2014-05-13 10:03:51 +02:00
Edward O'Callaghan c848098b2f superio/fintek/f71869ad: Fix incorrect LDN's
Turns out there are a few minor differences of the LDN's in the AD rev.
of this Fintek chip. 0x07 is in fact the WDT so renaming and remove the
now incorrect io mask. Add missing CIR LDN functionality and touch up
src inline doc.

Change-Id: I440aebad71d62d199d3283dd061933e76b21dda5
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/5696
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2014-05-10 06:34:21 +02:00
Edward O'Callaghan 63f28c00aa superio/fintek/f71869ad: Make hwm devicetree configurable
Provision the configuration of the Fintek F71869AD Hardware Monitor's
configuration by way of devicetree.cb. Make use of this in the
jetway/nf81-t56n-lf board to properly control fan's.

Change-Id: Ic25b29d1b7a9145e0e209b490b25a2cbc46cb75c
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/5580
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2014-05-08 12:10:55 +02:00
Edward O'Callaghan dd2e8c35fb superio/fintek/f71869ad: Configure multi-func reg in devicetree
Facilitate for the configuration of so called "Multi-function Select
Registers" with devicetree.cb in ramstage.

Make use of this new functionality in, mainboard/jetway/nf81-t56n-lf to
correctly configure the Fintek's multiplexed GPIO pins to be in AMD TSI
mode. This allows the Fintek to correctly talk to the Southbridge over
the SMBus for CPU temperature data as to control fans and so on.

Change-Id: I80abcd8b767fc4b22d00d1384ce4ef89fe837e3d
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/5576
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins)
2014-05-08 12:10:37 +02:00
Edward O'Callaghan cf7b498908 superio/fintek/*: Factor out generic romstage component
The romstage of Fintek Super I/O's is identical, leading to replication
of essentially the same code prone to bitrot. Herein we consolidate the
early pre-ram UART initialisation code into fintek/common, rather we
leave the exceptions to be implemented under model/.

More precisely we provide a well documented version of early_serial.c
under fintek/common and select by way of Kconfig as a generic romstage
component to Super I/O support. We leave future Super I/O's the option
to implement `non-standard` initialisation code should such a (unlikely)
need araise. A primary advantage is that new support for romstage serial
is now trival to add. We also provide some Kconfig documentation while
here.

Change-Id: I3c62561558a62ece944a167ba302fb7076bba001
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/5575
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-04-26 18:22:11 +02:00
Edward O'Callaghan 6d51f6b2e8 superio/fintek/*: Fix header style
Remove some redundant includes. Fix repetitiveness in include guards and
strip some misplaced tabs for whitespaces.

Change-Id: I1f0bf6951cc6714f63e88b323754515fb02c089c
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/5572
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-04-26 13:48:36 +02:00
Edward O'Callaghan a270586d4b superio/fintek/f71859: Avoid .c includes
Following the same reasoning as commit
d304331 superio/fintek/f81865f: Avoid .c includes
Clean up the early_serial #include directives in mainboard/romstage code.

Change-Id: I3577ca3f761fb699dc51141a02e1f853bf1f1a21
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/5417
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-04-02 01:08:32 +02:00
Edward O'Callaghan b5a49ad9d7 superio/fintek/f71889: Avoid .c includes
Following the same reasoning as commit
d304331 superio/fintek/f81865f: Avoid .c includes
Clean up the early_serial #include directives in mainboard/romstage code.

Change-Id: Id8a1a2e8c87add636af1506598c2669d72dc3238
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/5437
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-04-02 01:08:19 +02:00
Edward O'Callaghan 880e5248dc superio/fintek/f71872: Avoid .c includes
Following the same reasoning as commit
d304331 superio/fintek/f81865f: Avoid .c includes
Clean up the early_serial #include directives in mainboard/romstage code.

Change-Id: Ia021229154dc90b830a314f3adc2a0dd444bd68d
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/5436
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-04-02 01:08:09 +02:00
Edward O'Callaghan ade70a0482 superio/fintek/f71863fg: Avoid .c includes
Following the same reasoning as commit
d304331 superio/fintek/f81865f: Avoid .c includes
Clean up the early_serial #include directives in mainboard/romstage code.

Change-Id: I863c16634873224c17e43100271e9b91419724d0
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/5435
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-04-02 01:07:57 +02:00
Edward O'Callaghan fbdc3ef7d9 superio/fintek/f71805f: Avoid .c includes
Following the same reasoning as commit
d304331 superio/fintek/f81865f: Avoid .c includes
Clean up the early_serial #include directives in mainboard/romstage code.

Change-Id: Ibf743f7a5dd4a424a4513014fc9a896b87ecf3b1
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/5434
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-04-02 01:07:27 +02:00
Edward O'Callaghan d3043313a9 superio/fintek/f81865f: Avoid .c includes
We should not be #include .c files, instead link early_serial into
romstage and provide a prototype.

Change-Id: Ia9277169ce1592e1fc72f8849f0982741daec567
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/5416
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Tested-by: build bot (Jenkins)
2014-03-31 01:05:40 +02:00
Edward O'Callaghan b5fc67ab02 superio/fintek: Document Fintek F71869AD code.
Change-Id: I156077bf5571764d0e4bc044be80c8ab94556de4
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/5178
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2014-02-13 17:14:20 +01:00
Kyösti Mälkki e2f4c2a72f uart8250: Drop includes in superio
Change-Id: If723896cc31da75dbb3a63d5dc959764e96fded1
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/5139
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-02-06 11:17:24 +01:00
Edward O'Callaghan 962b6c0a5e superio/fintek: Add initial support for Fintek F71869AD.
Change-Id: I41f1ee20517dd179a4dee914ab7f6332739e326e
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/4784
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-01-27 00:13:14 +01:00
Nico Huber 1c81128dcd pnp: Add some default functions to enter/exit config state
Implement some common default functions to enter and exit the
configuration state. Also provide default pnp_mode_ops for common
enter()/exit() function pairs.

The following cocci ensures their use:
    @ mode_match @
    identifier enter, exit, ops;
    @@
     struct pnp_mode_ops ops = {
             .enter_conf_mode  = enter,
             .exit_conf_mode   = exit,
     };

    @ enter_match_8787 @
    identifier mode_match.enter, dev;
    @@
     enter(...)
     {
             outb(0x87, dev->path.pnp.port);
             outb(0x87, dev->path.pnp.port);
     }

    @ depends on enter_match_8787 @
    identifier mode_match.enter, mode_match.ops;
    @@
     struct pnp_mode_ops ops = {
    -        .enter_conf_mode  = enter,
    +        .enter_conf_mode  = pnp_enter_conf_mode_8787,
     };

    @ enter_match_55 @
    identifier mode_match.enter, dev;
    @@
     enter(...)
     {
             outb(0x55, dev->path.pnp.port);
     }

    @ depends on enter_match_55 @
    identifier mode_match.enter, mode_match.ops;
    @@
     struct pnp_mode_ops ops = {
    -        .enter_conf_mode  = enter,
    +        .enter_conf_mode  = pnp_enter_conf_mode_55,
     };

    @ depends on enter_match_8787 || enter_match_55 @
    identifier mode_match.enter;
    @@
    -enter(...) {...}

    @ exit_match_aa @
    identifier mode_match.exit, dev;
    @@
     exit(...)
     {
             outb(0xaa, dev->path.pnp.port);
     }

    @ depends on exit_match_aa @
    identifier mode_match.exit, mode_match.ops;
    @@
     struct pnp_mode_ops ops = {
    -        .exit_conf_mode   = exit,
    +        .exit_conf_mode   = pnp_exit_conf_mode_aa,
     };

    @ depends on exit_match_aa @
    identifier mode_match.exit;
    @@
    -exit(...) {...}

    @ depends on enter_match_8787 || enter_match_55 || exit_match_aa @
    @@
     #include <device/pnp.h>
    +#include <superio/conf_mode.h>

    @ mode_match_55_aa @
    identifier ops;
    @@
     struct pnp_mode_ops ops = {
             .enter_conf_mode  = pnp_enter_conf_mode_55,
             .exit_conf_mode   = pnp_exit_conf_mode_aa,
     };

    @@
    identifier mode_match_55_aa.ops;
    @@
    -struct pnp_mode_ops ops = {...};

    @@
    identifier mode_match_55_aa.ops, devops;
    @@
     struct device_operations devops = {
    -        .ops_pnp_mode     = &ops,
    +        .ops_pnp_mode     = &pnp_conf_mode_55_aa,
     };

    @ mode_match_8787_aa @
    identifier ops;
    @@
     struct pnp_mode_ops ops = {
             .enter_conf_mode  = pnp_enter_conf_mode_8787,
             .exit_conf_mode   = pnp_exit_conf_mode_aa,
     };

    @@
    identifier mode_match_8787_aa.ops;
    @@
    -struct pnp_mode_ops ops = {...};

    @@
    identifier mode_match_8787_aa.ops, devops;
    @@
     struct device_operations devops = {
    -        .ops_pnp_mode     = &ops,
    +        .ops_pnp_mode     = &pnp_conf_mode_8787_aa,
     };

Change-Id: I1480336b54523cc95210d99cf31c1a0b3a14b464
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: http://review.coreboot.org/3484
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2013-07-03 16:13:11 +02:00
Nico Huber 0b2ee93910 pnp: Remove now plain wrappers for default PnP functions
After removing the enter()/exit() functions for configuration mode,
most wrappers for our standard PnP functions just call the underlying
default implementation.

Remove those with a little cocci:
    @ op_match @
    identifier op;
    identifier pnp_op =~ "^pnp_((alt_|)enable|(set|enable)_resources)$";
    type device_t;
    identifier dev;
    @@
     static void op(device_t dev) { pnp_op(dev); }

    @@
    identifier op_match.op;
    @@
    -op(...) {...}

    /* Three rules to match the alignment, hmmp... */
    @@
    identifier op_match.op, op_match.pnp_op;
    identifier ops;
    @@
     struct device_operations ops = {
    -        .set_resources    = op,
    +        .set_resources    = pnp_op,
     };

    @@
    identifier op_match.op, op_match.pnp_op;
    identifier ops;
    @@
     struct device_operations ops = {
    -        .enable_resources = op,
    +        .enable_resources = pnp_op,
     };

    @@
    identifier op_match.op, op_match.pnp_op;
    identifier ops;
    @@
     struct device_operations ops = {
    -        .enable           = op,
    +        .enable           = pnp_op,
     };

Change-Id: Idc0e52c7e3600a01f3b6a4e17763557b271b481e
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: http://review.coreboot.org/3483
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-06-17 21:42:21 +02:00
Nico Huber 13dc976a52 pnp: Register implementations of enter/exit config state
Find all the (ramstage) implementations of enter()/exit() functions
for the configuration state, register and call them through the new
struct pnp_mode_ops. As our standard PnP functions are aware of the
pnp_mode_ops, it's not necessary to call enter()/exit() around them
anymore.

Patch generated with the cocci below. It's not perfect. The movement
of the enter()/exit() calls is somehow fragile. So I checked the
remaining calls for sense, and changed some empty lines. Also a
duplicate insertion of pnp_conf_mode_ops had to be removed.
    /* Try to find enter and exit functions by their outb() structure and
       their usage around calls to our standard pnp functions: */
    @ enter_match @
    identifier enter;
    identifier dev;
    type device_t;
    @@
     void enter(device_t dev)
     {
             <...
             outb(..., dev->path.pnp.port);
             ...>
     }

    @ exit_match @
    identifier exit;
    identifier dev;
    type device_t;
    @@
     void exit(device_t dev)
     {
             <...
             outb(..., dev->path.pnp.port);
             ...>
     }

    @ pnp_match @
    identifier op;
    identifier pnp_op =~ "^pnp_((alt_|)enable|(set|enable)_resources)$";
    identifier enter_match.enter, exit_match.exit;
    type device_t;
    identifier dev;
    @@
     void op(device_t dev)
     {
             ...
             enter(dev);
             ...
             pnp_op(dev);
             ...
             exit(dev);
             ...
     }

    /* Now add enter/exit to a pnp_mode_ops structure: */
    @ depends on pnp_match @
    identifier enter_match.enter;
    identifier exit_match.exit;
    identifier ops;
    @@
    +static const struct pnp_mode_ops pnp_conf_mode_ops = {
    +        .enter_conf_mode  = enter,
    +        .exit_conf_mode   = exit,
    +};
    +
     struct device_operations ops = {
             ...,
    +        .ops_pnp_mode     = &pnp_conf_mode_ops,
     };

    /* Match against the new structure as we change the code and the above
       matches might not work anymore: */
    @ mode_match @
    identifier enter, exit, ops;
    @@
     struct pnp_mode_ops ops = {
             .enter_conf_mode  = enter,
             .exit_conf_mode   = exit,
     };

    /* Replace enter()/enter() calls with new standard calls (e.g.
       pnp_enter_conf_mode()): */
    @@
    identifier mode_match.enter;
    expression e;
    @@
    -enter(e)
    +pnp_enter_conf_mode(e)

    @@
    identifier mode_match.exit;
    expression e;
    @@
    -exit(e)
    +pnp_exit_conf_mode(e)

    /* If there are calls to standard PnP functions, (re)move the
       enter()/exit() calls around them: */
    @@
    identifier pnp_op =~ "^pnp_((alt_|)enable|(set|enable)_resources)$";
    expression e;
    @@
    -pnp_enter_conf_mode(e);
     pnp_op(e);
    +pnp_enter_conf_mode(e);
     ...
     pnp_exit_conf_mode(e);

    @@
    identifier pnp_op =~ "^pnp_((alt_|)enable|(set|enable)_resources)$";
    expression e;
    @@
     pnp_enter_conf_mode(e);
     ...
    +pnp_exit_conf_mode(e);
     pnp_op(e);
    -pnp_exit_conf_mode(e);

    @@
    expression e;
    @@
    -pnp_enter_conf_mode(e);
    -pnp_exit_conf_mode(e);

Change-Id: I5c04b0c6a8f01a30bc25fe195797c02e75b6c276
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: http://review.coreboot.org/3482
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-06-17 21:42:06 +02:00
Nico Huber f898f7ba4d pnp: Provide alternative pnp_enable() implementation
The current default implementation of pnp_enable() only disables devices
- if set so in the devicetree - but does not enable them. Enablement takes
place in pnp_enable_resources(). Yet, many PnP chips implement their own
version of pnp_enable() which also enables devices if set in the devicetree.

It's arguable, if enabling those devices makes sense, before they get
resources assigned. Maybe we can't write the resource registers if not,
who knows? The least we can do is providing a common implementation for
this behavior, and get rid of some code duplication.

Used the following cocci:
    @@
    expression e;
    @@
    +pnp_alt_enable(e);
    -pnp_set_logical_device(e);
    (
    -pnp_set_enable(e, !!e->enabled);
    |
    -(e->enabled) ? pnp_set_enable(e, 1) : pnp_set_enable(e, 0);
    |
    -if (e->enabled) { pnp_set_enable(e, 1); }
    -else { pnp_set_enable(e, 0); }
    )

Change-Id: I8d695e8fcd3cf8b847b1aa99326b51a554700bc4
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: http://review.coreboot.org/3480
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-06-17 21:38:37 +02:00
Stefan Reinauer 24d1d4b472 x86: Unify arch/io.h and arch/romcc_io.h
Here's the great news: From now on you don't have to worry about
hitting the right io.h include anymore. Just forget about romcc_io.h
and use io.h instead. This cleanup has a number of advantages, like
you don't have to guard device/ includes for SMM and pre RAM
anymore. This allows to get rid of a number of ifdefs and will
generally make the code more readable and understandable.

Potentially in the future some of the code in the io.h __PRE_RAM__
path should move to device.h or other device/ includes instead,
but that's another incremental change.

Change-Id: I356f06110e2e355e9a5b4b08c132591f36fec7d9
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/2872
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-03-22 00:00:09 +01:00
Paul Menzel a46a712610 GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«
In the file `COPYING` in the coreboot repository and upstream [1]
just one space is used.

The following command was used to convert all files.

    $ git grep -l 'MA  02' | xargs sed -i 's/MA  02/MA 02/'

[1] http://www.gnu.org/licenses/gpl-2.0.txt

Change-Id: Ic956dab2820a9e2ccb7841cab66966ba168f305f
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: http://review.coreboot.org/2490
Tested-by: build bot (Jenkins)
Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
2013-03-01 10:16:08 +01:00
Kyösti Mälkki 02790369ff Remove chip.h files without config structure
Also deletes files not included in build:
    src/southbridge/amd/cimx/sb700/chip_name.c
    src/southbridge/amd/cimx/sb800/chip_name.c
    src/southbridge/amd/cimx/sb900/chip_name.c

Change-Id: I2068e3859157b758ccea0ca91fa47d09a8639361
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/1473
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Marc Jones <marcj303@gmail.com>
2012-10-07 12:55:04 +02:00
Kyösti Mälkki fee73df07a Auto-declare chip_operations
The name is derived directly from the device path.

Change-Id: If2053d14f0e38a5ee0159b47a66d45ff3dff649a
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/1471
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
2012-08-22 05:06:41 +02:00
Alec Ari 923d200d16 Unmark source files as executables
Change source file modes from 755 to 644

The following files have been grepped for changes:

*.c
*.h
*Kconfig*
*Makefile*

Change-Id: I275f42ac7c4df894380d0492bca65c16a057376c
Signed-off-by: Alec Ari <neotheuser@ymail.com>
Reviewed-on: http://review.coreboot.org/1023
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-05-10 08:44:08 +02:00
Stefan Reinauer 5ff7c13e85 remove trailing whitespace
Change-Id: Ib91889a374515d36a2b12b53aeb12b6ea6e22732
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/364
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2011-11-01 19:07:45 +01:00
Stefan Reinauer 13508b94cb Drop baud rate init to an arbitrary baud rate from Super I/O code.
See discussion at                                                                                                                                                               
http://www.mail-archive.com/coreboot@coreboot.org/msg29394.html                                                                                                                 
                                                                                                                                                                                
config->com1, devicetree.cb cleanup and init_uart8250() removal                                                                                                                 
will follow once this patch is comitted                                                                                                                                         
                                                                                                                                                                                
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>                                                                                                                   
Acked-by: Patrick Georgi <patrick@georgi-clan.de>                                                                                                                               

Updated to drop com1, com2.... from config structure and devicetree.cb



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6521 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-04-19 21:33:40 +00:00
Rudolf Marek 0c8e664713 It turns out that the code which enables specific LDN is somewhat buggy.
Instead of enable the device the device gets disabled. However after some time the serial line gets back, most likely some "enable resources" might fix it. 
I'm attaching patch which somewhat fixes the problem and changes the function to look same in all superio code. Some boards even did not convert the dev->enabled to 0,1 values. 


Signed-off-by: Rudolf Marek <r.marek@assembler.cz> 
Acked-by: Peter Stuge <peter@stuge.se>




git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6373 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-02-19 14:51:31 +00:00
Frank Vibrans d0a8ebf053 This code provides support for the superio chip on the IBASE Technology DB-FT1 (AMD code name Persimmon) platform. It is independent of the AMD code.
Signed-off-by: Frank Vibrans <frank.vibrans@amd.com>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Acked-by: Marc Jones <marcj303@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6349 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-02-14 18:52:15 +00:00
Stefan Reinauer 6559f43dd9 add license headers to some trivial files and pc87427.h
Mostly done according to initial file creator.

Signed-off-by: Stefan Reinauer <stepan@coreboot.org>
Acked-by: Stefan Reinauer <stepan@coreboot.org>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6192 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-12-17 00:13:54 +00:00
stepan 8301d8348a second round name simplification. drop the <component>_ prefix.
the prefix was introduced in the early v2 tree many years ago
because our old build system "newconfig" could not handle two files with
the same name in different paths like /path/to/usb.c and
/another/path/to/usb.c correctly. Only one of the files would end up
being compiled into the final image.

Since Kconfig (actually since shortly before we switched to Kconfig) we
don't suffer from that problem anymore. So we could drop the sb700_
prefix from all those filenames (or, the <componentname>_ prefix in general)

- makes it easier to fork off a new chipset
- makes it easier to diff against other chipsets
- storing redundant information in filenames seems wrong

Signed-off-by: <stepan@coresystems.de>

Acked-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Peter Stuge <peter@stuge.se>




git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6150 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-12-08 07:07:33 +00:00
Stefan Reinauer 20c3d77d98 fix random breakage
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6075 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-15 21:09:57 +00:00
Uwe Hermann a69d978be8 C and other Super I/O cosmetic fixes.
- Random coding style, whitespace and cosmetic fixes.
 
 - Consistently use the same spacing and 4-hexdigit port number format
   in the pnp_dev_info[] arrays.
 
 - Drop dead/unused code and less useful comments.
 
 - Add missing "(C)" characters and copyright years.
 
 - Shorten and simplify some code snippets.
 
 - Use u8/u16/etc. everywhere.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6073 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-15 19:35:14 +00:00
Jonathan Kollasch ab940df331 Add support for Fintek F71872 superio.
Signed-off-by: Jonathan Kollasch <jakllsch@kollasch.net>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6064 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-11 22:25:55 +00:00
Uwe Hermann 5330dd9174 Remove superfluous Super I/O res0/res1 lines.
The pc_keyboard_init() function no longer takes any base addresses
since r5152 (passed in via res0/res1 variables previously), so drop them.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Patrick Georgi <patrick@georgi-clan.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6063 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-11 13:14:55 +00:00
Uwe Hermann 7fa0819ecf Add #include guards to all Super I/O header files (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6049 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-08 20:55:24 +00:00
Uwe Hermann adc975098d Follow-up for r6025, do 0x87 twice in superio.c, too.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6026 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-05 12:44:25 +00:00
Zheng Bao 27770c93d4 According to the description in datasheet of f71889,
"To enable configuration, the entry key 0x87 must be written to
the index port"

"
 -o 4e 87
 -o 4e 87	(enable configuration)
 -o 4e aa	(disable configuration)
"
This piece of text appears in most of the datasheet of fintek superio.
It doesnt say it quite clear, but it seems that the 0x87 should
be written twice. I tried on f81865, which is not in the coreboot tree
yet. If the 0x87 is only written once, you can only R/W the index/data
port once. All the subsequent RW will fail. Writing twice will be ok.

Plus, in the superiotool, the function enter_conf_mode_winbond_fintek_ite_8787
also write 8787.

The fintek superio chips seem to enable the UART automatically when the
power is on. So I didnt find it failed to access.

Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6025 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-05 07:59:06 +00:00
Uwe Hermann 7d3418849d Fintek and Intel i3100 Super I/O cleanups.
- Drop commented out "config chip.h" and a duplicate link to a datasheet.

 - F71805F -> F71805F/FG, to mention all variants.
 
 - Use u8/u16/ etc. everywhere.
 
 - Add a missing (C) line.
 
 - Fix up a bunch of pnp_dev_info[] structs according to the datasheets.
 
 - Fintek F71889: Drop res1/PNP_IO1 from KBC, there's no 0x62/0x63 register
   pair on this Super I/O.
   
 - Fintek F71863FG: This Super I/O _does_ have a keyboard/mouse LDN, add the
   respective code in superio.c. Also: Add missing LDNs to f71863fg.h.
   
 - i3100: Add some more comments and datasheet infos.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6020 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-05 00:07:13 +00:00
Alec Ari 0ae7131f2e Add Fintek F71889 Super I/O support.
Untested, but should work mostly (even though some TODOs remain).

Signed-off-by: Alec Ari <neotheuser@ymail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6017 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-03 21:46:41 +00:00
Patrick Georgi 8463dd9db0 Rename build system variables to be more intuitive, and
at the same time let the user specify sources instead
of object files:
- objs becomes ramstage-srcs
- initobjs becomes romstage-srcs
- driver becomes driver-srcs
- smmobj becomes smm-srcs

The user servicable parts are named accordingly:
ramstage-y, romstage-y, driver-y, smm-y

Also, the object file names are properly renamed now, using
.ramstage.o, .romstage.o, .driver.o, .smm.o suffixes consistently.

Remove stubbed out via/epia-m700 dsdt/ssdt files - they didn't
easily fit in the build system and aren't useful anyway.

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coreystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5886 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-30 16:55:02 +00:00