Commit Graph

12368 Commits

Author SHA1 Message Date
Kyösti Mälkki 1d7f5c5c37 macbook21 lenovo/xx: Fix inw() in SMI handlers
Missing base may have enabled SMI for all GPI inputs.

Change-Id: I1157afaccccb17d325a4efdb1f270a27f9a299ab
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/8169
Tested-by: build bot (Jenkins)
Reviewed-by: Alexander Couzens <lynxis@fe80.eu>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-01-09 05:23:57 +01:00
Martin Roth 543888d582 northbridg/via/vx900: Doxygen fixes
- @todo has to be lowercase for doxygen
- Fix some parameters that had changed in the code.
- The @file entries needed to be more specific.

Change-Id: Icdce08735f581609cd25cce41e986c71435368a4
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: http://review.coreboot.org/8154
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2015-01-08 21:59:42 +01:00
Martin Roth d7689e4ad5 Doxygen: add a "simple" output config and make target
This is a doxygen target I'm using for cleaning up the coreboot doxygen
output.  It runs in about a minute instead of....  a lot longer, and
only generates documentation for the coreboot/src directory, excluding
vendorcode.

It was requested that the comments be stripped to make it easier to
read.  This was done through the following command (split for gerrit):

head -n 1 Doxyfile.coreboot_simple > Doxyfile.tmp ;
cat Doxyfile.coreboot_simple | sed 's|^\s*#.*$||' | sed '/^$/d' | sed 's|[[:space:]]\+$||' >> Doxyfile.tmp ;
mv Doxyfile.tmp Doxyfile.coreboot_simple

I'm including the command here because any time the file is updated
with the doxygen wizard, it will need to be run again.  It might be
desirable to turn this into a script in the documentation directory.

Change-Id: Ic0cbbcd21aa647e80a037481546bdcd2aab8949e
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: http://review.coreboot.org/8068
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2015-01-08 21:59:17 +01:00
Martin Roth f4cb4128ad northbridge/amd: Doxygen fixes
- Add missing parameter names in several files
- remove parameter types in several files
- remove lines from doxygen documentation.  These should be outside the
doxygen comments.
- Some of the comments shouldn't have been doxygen style.  Turn these
into regular non-doxygen comments.

Change-Id: Ieccfe237385efee007b48308d58eb0a6a12f5bfa
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: http://review.coreboot.org/8153
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2015-01-08 21:58:45 +01:00
Alexander Couzens aa3dd5d5db inteltool: add `-s` to dump spi bar and bios_cntl registers
Change-Id: I3bb5dc23885af8c992456ee5e4bd374cd4b813bf
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
Reviewed-on: http://review.coreboot.org/8049
Reviewed-by: Philipp Deppenwiese <zaolin@das-labor.org>
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-01-08 17:49:58 +01:00
Edward O'Callaghan 9739846469 northbridge/amd/agesa/family1{4,5}: Remove cruft from dimmSpd.c
Remove useless comment pretaining to abusing pragma's for old
GCC/GDB interaction issues.

Change-Id: Ic83a0285ac947a23699a81a82b89de08a47ab052
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/8017
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2015-01-07 11:31:27 +01:00
Kyösti Mälkki de53bdf569 CBMEM: Rename utility file
This file will have CBMEM init hooks API one day.

Change-Id: I0c31495d4217a5eb235b13e6d8e8c99a87a3b840
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/8031
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-01-07 06:09:42 +01:00
Stefan Reinauer 069f4766a0 mainboard: Drop print_ implementation from non-romcc boards
Because we had no stack on romcc boards, we had a separate, not as
powerful clone of printk: print_*. Back in the day, like more than
half a decade ago, we migrated a lot of boards to printk, but we never
cleaned up the existing code to be consistent. instead, we worked around
the problem with a very messy console.h (nowadays the mess is hidden in
romstage_console.c and early_print.h)
This patch cleans up the mainboard code to use printk() on all non-ROMCC
boards.

Change-Id: I2383f24343fc2041fef4af65d717d754ad58425e
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/8111
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)
2015-01-06 20:16:47 +01:00
Stefan Reinauer 5491ca23fc cpu: Drop print_ implementation from non-romcc boards
Because we had no stack on romcc boards, we had a separate, not as
powerful clone of printk: print_*. Back in the day, like more than
half a decade ago, we migrated a lot of boards to printk, but we never
cleaned up the existing code to be consistent. instead, we worked around
the problem with a very messy console.h (nowadays the mess is hidden in
romstage_console.c and early_print.h)
This patch cleans up the cpu code to use printk() on all non-ROMCC
boards.

Change-Id: I233c53300f9a74bce4b828fc4074501a77f7b593
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/8114
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)
2015-01-06 20:16:20 +01:00
Stefan Reinauer 5ab52ddc3d southbridge: Drop print_ implementation from non-romcc boards
Because we had no stack on romcc boards, we had a separate, not as
powerful clone of printk: print_*. Back in the day, like more than
half a decade ago, we migrated a lot of boards to printk, but we never
cleaned up the existing code to be consistent. instead, we worked around
the problem with a very messy console.h (nowadays the mess is hidden in
romstage_console.c and early_print.h)
This patch cleans up the southbridge code to use printk() on all non-ROMCC
boards.

Change-Id: I312406257e66bbdc3940e206b5256460559a2c98
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/8110
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)
2015-01-06 20:15:20 +01:00
Stefan Reinauer 65b72ab55d northbridge: Drop print_ implementation from non-romcc boards
Because we had no stack on romcc boards, we had a separate, not as
powerful clone of printk: print_*. Back in the day, like more than
half a decade ago, we migrated a lot of boards to printk, but we never
cleaned up the existing code to be consistent. instead, we worked around
the problem with a very messy console.h (nowadays the mess is hidden in
romstage_console.c and early_print.h)
This patch cleans up the northbridge code to use printk() on all non-ROMCC
boards.

Change-Id: I4a36cd965c58aae65d74ce1e697dc0d0f58f47a1
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/7856
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)
2015-01-06 20:15:02 +01:00
Stefan Reinauer d42c9dae85 superio: Drop print_ implementation from non-romcc boards
Because we had no stack on romcc boards, we had a separate, not as
powerful clone of printk: print_*. Back in the day, like more than
half a decade ago, we migrated a lot of boards to printk, but we never
cleaned up the existing code to be consistent. instead, we worked around
the problem with a very messy console.h (nowadays the mess is hidden in
romstage_console.c and early_print.h)
This patch cleans up the superio code to use printk() on all non-ROMCC
boards.

Change-Id: I23fc307f1346cdb7adaaeccfafe17d9205e909ac
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/8113
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)
2015-01-06 20:14:19 +01:00
Stefan Reinauer 0d3cde9062 superio/smsc/lpc47n217: Drop dead code
This code is unused, and the same functionality is in superiotool
already.

Change-Id: I7bf667e2e2bfc8fdedcdbe09bf420abf47b1ee97
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/8112
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2015-01-06 18:24:56 +01:00
Stefan Reinauer d548e5c6d9 broadwell: Use correct include file for console functions
console_tx_byte() is defined in stream.h, not console.h. This will cause
problems later, when untangling more ROMCC and console code. Hence, fix
the issue beforehand.

Change-Id: If4e04bd6c69b630912414676950157d06c364d74
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/8121
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2015-01-06 18:23:29 +01:00
Stefan Reinauer 8de452da2e Drop VIA VT8235 southbridge
It's unused.

Change-Id: Iad3e7aa0f777392c9d65b9fcdd3c1666af31723a
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/7883
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2015-01-06 18:20:32 +01:00
Vadim Bendebury 897123ab2f libpayload: ipq808x: introduce uart driver
This adds a UART driver for the ipq8064 controller. It still does not
quite work in the receive direction - the receive FIFO returns read
data in 32 bit chunks, which means that 4 keys need to be pressed
before a character pops out of the driver (and it reports it as a
single character).

This issue is being addressed separately, the driver is being checked
in to facilitate concurrent development.

BUG=chrome-os-partner:27784, chrome-os-partner:29313

TEST=with deptcharge modifications in place, the AP148 board comes up
     to the depthcharge prompt:

Starting depthcharge on storm...

Original-Change-Id: Ief2cfcca73494be5c4147881144470078adcefb8
Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/202045
Original-Reviewed-by: Deepa Dinamani <deepad@codeaurora.org>
Original-Reviewed-by: Stefan Reinauer <reinauer@chromium.org>
(cherry picked from commit 4499318fb9a4e663c504d7c41380ccf2aa89da29)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>

Change-Id: I3e07d7568c20c0e570222971ff219de3a6d9b7cc
Reviewed-on: http://review.coreboot.org/8061
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-01-06 16:57:30 +01:00
Vadim Bendebury bc8b4fad1e libpayload: Introduce bit manipulation macros
Some drivers being ported to depthcharge use io bit manipulation
macros. The libpayload include file seems the most appropriate place
to keep these macros in. There is no common io.h file across
architectures, the x86 version could be added later if required.

BUG=chrome-os-partner:27784
TEST=observed ipq806x SPI driver deptcharge port (WIP) compile properly.

Original-Change-Id: I33f3be072faefce293c871f7e3bc3b2e6bc38ffe
Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/202559
Original-Reviewed-by: Stefan Reinauer <reinauer@chromium.org>
Original-Reviewed-by: Trevor Bourget <tbourget@codeaurora.org>
(cherry picked from commit ad18a605b4d0ec3251c1614e7358b42aa6b5c45a)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>

Change-Id: I8656e12af20ce4cf11d771942e8fe7d4eb2a560d
Reviewed-on: http://review.coreboot.org/8062
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-01-06 16:56:32 +01:00
Vadim Bendebury b7f82e9559 libpayload: arm: add code to clear bss
This adds some assembly code to clear .bss segment. It might have been
already cleared by the loader, but it is not guaranteed. This also
helps when the program is loaded by the debugger.

BUG=none
TEST=observed that .bss is now initialized when the program is
     restarted. Verified correct boundaries of the segment.

Original-Change-Id: I0aed0070da53881e4cf8c27049459040c006e765
Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/201784
Original-Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Original-Reviewed-by: Trevor Bourget <tbourget@codeaurora.org>
(cherry picked from commit c89ecee5ddfc33a438d4d1926d3756a48f3c2576)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>

Change-Id: Ic0c33d2a8ad22cd23b3ccb73c603cb14ae2aab29
Reviewed-on: http://review.coreboot.org/8060
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-01-06 16:56:23 +01:00
Kyösti Mälkki 9b29aad526 Revert "Re-factor 'to_flash_offset()' into 'spi_flash.h'"
This reverts commit 9270553fff.

Change-Id: I195f721ce7a18aac6c1aa6f4e0f9284455d531b0
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/8138
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2015-01-06 11:19:28 +01:00
Martin Roth 6355cbff51 AMD platforms: fix callout_entry doxygen errors
Somewhere along the line, the sb_cfg parameter name was changed to
config, but this wasn't carried into the documentation or the function
prototypes everywhere.

Change-Id: Iccb0829c2f50370dddb70af915a6759316c4727a
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/8098
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)
2015-01-06 06:34:18 +01:00
Martin Roth d30746ab6b AMD Mainboards - rd890_cfg.h: fix Doxygen errors.
Doxygen gives an error when processing #defines inside doxygen comments.
Normal comments are ignored.  The choice for this fix was to make this
a standard comment starting with '/*' instead of '/**', or to make the
comment not a #define.

Change-Id: I97fbbcea6f045d80ec7c0ab5e196d57e5da16d86
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/8099
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)
2015-01-06 06:33:52 +01:00
Martin Roth 5f066b29ce doxygen fixes: change @var to @param var
These files were trying to document the parameters, but didn't have
the syntax quite right.  Change the comments from @varname to
@param varname as required by doxygen.

Change-Id: I63662094d3f1686e3e35b61925b580eb06e72e28
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/8100
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2015-01-06 06:33:25 +01:00
Martin Roth d63dbe8ef9 AMD Mainboards - rd890_cfg.c: Fix doxygen warnings
Remove variable types from the param declaration.

Change-Id: Ia6a3d36fcf01d7a52bb1a31cfdb47d88bf612d79
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/8097
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)
2015-01-06 06:33:01 +01:00
Martin Roth 32bc6b6b84 doxygen fixes: fix parameter names to match the functions
The doxygen parameter names in the comments no longer matched the
functions they were attached to.  Doxygen complains about extra
parameter comments and uncommented parameters in the functions.

Change-Id: I21b8a951f8d8d04b07c3779000eeaf1e69fed463
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/8101
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2015-01-06 06:32:37 +01:00
Martin Roth 0b2c4ece7d Remove AMD's "Release Content" doxygen from coreboot files
These comments are left over and are not relevent in the coreboot
code, but created a new section titled "Release Content" in the
doxygen documentation produced by the coreboot code.  In an effort
to clean up the output, I'm removing these doxygen comments.

Change-Id: I4d7be3313a2ab6c140b4f3afe70dffc4abba7bca
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/8069
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2015-01-06 06:31:15 +01:00
Martin Roth fc34750c88 drivers/intel/fsp: split the UEFI HOB functions into hob.c
The FSP uses a lot of UEFI HOB (Hand Off Block) functions for reporting
and passing information to coreboot.  These seem to me like they should
be in their own file, so I'm splitting them out of fsp_util.c.  I'll
be adding a couple more functions in the next patch.

These functions should all be compliant to the Hand Off Block spec.

Change-Id: Ie8bbc0a9277b9484f13dd077b3a52e424a8600fe
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/8065
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2015-01-06 06:28:50 +01:00
Edward O'Callaghan 9270553fff Re-factor 'to_flash_offset()' into 'spi_flash.h'
Re-factor to_flash_offset() into 'spi_flash.h' header. Motivated by
Clang complaining that the function 'to_flash_offset' is unused.

Change-Id: Ic75fd2fb4edc5e434c199ebd10c7384d197e0c63
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/7519
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-01-06 04:56:14 +01:00
Edward O'Callaghan 089a510292 northbridge/intel: Do not define include guard as 1
As `#ifndef` and not `#if` is used in the check for
include guards, setting it to 1 is not needed.

Change-Id: Iaa6c0f807b9e99ad3c9551abe4ab1627e5505d67
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/8103
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
Tested-by: build bot (Jenkins)
2015-01-06 04:17:47 +01:00
Edward O'Callaghan ebe3a7aea3 mainboard/*/romstage.c: Fix 'lib/delay.c' inclusion
Use 'delay.h' header rather than directly including 'delay.c'
source. N.B. Some amdfam10 and K8 boards are not included in
this changeset since unrelated issues are woven in there.

Change-Id: Ibc0c0e560d8eedaf5c3150f95ba72fe5dd8d6f3a
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/8086
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2015-01-06 01:52:07 +01:00
Edward O'Callaghan 77757c22b9 mainboard/*/romstage.c: Sanitize system header inclusions
Fix system include paths to be consistent. Chipset support is
part of the Coreboot 'system' and hence 'non-local' (i.e., in
the same directory or context). One possible product of this, is
to perhaps allow future work to do pre-compiled headers (PCH) on
the buildbot for faster build times. However, this currently just
makes mainboard's consistent.

Change-Id: I2f3fd8a3d7864926461c960ca619bff635d7dea5
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/8085
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2015-01-06 01:51:42 +01:00
Edward O'Callaghan d76ac6349d superio/smsc/lpc47n207: Hook into build system
Provide proper Makefile and Kconfig components so
that this superio is built as object code. Select
superio component in mainboard Kconfig's to bring
in the link-time symbols and thereby removing the
need for .c inclusion.

N.B. The LPC47N207 Super I/O does not physically exist
on these boards. The Super I/O is found on external LPC
debug card hardware and so should really be made selectable.
However, this is beyond the scope of this specific fix, that
rids us of .c inclusions in romstage.c

Change-Id: I451c3a81c4b5beca1ed65e27467a7393d2521dae
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/8084
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
2015-01-06 01:23:31 +01:00
Stefan Reinauer 3a6550d989 timestamps: Switch from tsc_t to uint64_t
Cherry-pick from chromium and adjusted for added boards
and changed directory layout for arch/arm.

Timestamp implementation for ARMv7

Abstract the use of rdtsc() and make the timestamps
uint64_t in the generic code.

The ARM implementation uses the monotonic timer.

Original-Signed-off-by: Stefan Reinauer <reinauer@google.com>

BRANCH=none
BUG=chrome-os-partner:18637
TEST=See cbmem print timestamps

Original-Change-Id: Id377ba570094c44e6895ae75f8d6578c8865ea62
Original-Reviewed-on: https://gerrit.chromium.org/gerrit/63793
(cherry-picked from commit cc1a75e059020a39146e25b9198b0d58aa03924c)

Change-Id: Ic51fb78ddd05ba81906d9c3b35043fa14fbbed75
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/8020
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
2015-01-05 22:21:49 +01:00
Dave Frodin 83405a1241 hp/abm: Add new mainboard
The hp/abm board is used in network/server applications.

Notes:
- The hp/abm board is headless and therefore does not define
  CONFIG_GFXUMA, and does not require a video bios.
- The micro USB connector on the board edge is connected to COM4
  (i.e. I/O=2E8h). Coreboot needs to be configured to use Index=3.
- If you are using SeaBIOS it would also need to be configured to
  use the UART at I/O=2E8h.
- This board has been tested with headless installed versions of
  Ubuntu 12.10 and Fedora 19.

Change-Id: I60bde98411c40a184c8d053199bac8d04df8ab07
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/6116
Tested-by: build bot (Jenkins)
Reviewed-by: Dave Frodin <dave.frodin@se-eng.com>
2015-01-05 17:02:36 +01:00
Kyösti Mälkki e75deb69cc Copy asrock/ibm-a180 to hp/abm
Change-Id: I8dcb3912976d7381421dc41ee30e7c7652e6c28a
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/6115
Tested-by: build bot (Jenkins)
Reviewed-by: Dave Frodin <dave.frodin@se-eng.com>
2015-01-05 17:00:36 +01:00
Edward O'Callaghan c800199007 northbridge/via/vx800/examples: Remove rotting source
This is just bit-rotting and its likely this will continue to rot
by the time someone notices it exits it will be too late (i.e., today).

Change-Id: I40ef2cd8e3d563079b086f51dabab0960a0a13b3
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/8087
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2015-01-05 16:03:47 +01:00
Martin Roth c3fde7ef36 AMD Mainboards - romstage.c: Fix doxygen errors
- Remove types from the param declarations.
- list needed to be uppercase.

Change-Id: I8b9ed78908e5d3e1d99e7ba2ea9013be109b8e27
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/8072
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
2015-01-04 21:28:57 +01:00
Martin Roth c226bd6228 AMD Mainboards - PlatformGnbPcie.c: Fix Doxygen errors
Remove PeiServices param for OemInitEarly - it doesn't exist in the
function.

Change-Id: I338aeb4128126f6e541815dc09bf8d23678081c8
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/8073
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
2015-01-04 20:28:55 +01:00
Martin Roth 15b6325cd4 AMD Mainboards - platform_cfg.h: Fixes for doxygen
- Move @def BIOS_SIZE description to the next line
- SB_GEN2 changed to SB_GPP_GEN2
- Move the SIO_HWM_BASE_ADDRESS description to the next line

Change-Id: Ia3496b0108484f557627304553461932a100dfa5
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/8071
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)
2015-01-04 20:17:48 +01:00
Martin Roth 182e551f2d smihandler.c: Fix doxygen errors in southbridge_smi_handler
Correct the param to match the functions.

Change-Id: Id002c549a6ba6a7be4fa5eee396769eaa2510698
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/8074
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2015-01-04 20:06:57 +01:00
Martin Roth 24e2e951b9 atomic.h: Fix doxygen errors
- @v & @i need to be @param v & @param i
- add the @file command

Change-Id: Ib4fb609629bc2dfcf1869bdf7a4d4cd9fea283cc
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/8075
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)
2015-01-04 20:03:28 +01:00
Martin Roth 6e22225d60 remove vx900_int16 doxygen module/group
This doxygen directive was creating a top level modules section, which
had the vx900_int15 code as its only member.  I do think that breaking
the code into documented sections is a good plan, but in an effort to
clean up the output, I'm removing this for now.

Change-Id: I3f7e2f704136ebbd1961c5946bac4c2edbd6a371
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/8070
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2015-01-04 20:03:04 +01:00
Martin Roth ba9d51ee38 documentation: Add small coreboot logo in PNG format
The doxygen output looks better with the coreboot logo,
so I'm adding the 2k png from the wiki to the documentation
directory to use in the doxygen build.

Change-Id: I95ca67fb311e0b39a12ad9c5a1a53a99f7fec2d9
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/8067
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)
2015-01-04 19:48:09 +01:00
Edward O'Callaghan 9e687a62b1 superio/smsc/lpc47b272/superio.c: Remove dead code
Remove dead debug code, we have superiotool for this reason.
Restructure file to be consistent with other superio's thereby
avoiding forward declarations of functions.

Change-Id: I44272b4e30a2bc8c3a719df17b837432cd38429c
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/8083
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2015-01-04 13:49:01 +01:00
Edward O'Callaghan 520a328e5a src/superio/smsc/lpc47m10x/superio.c: Remove dead code
Remove dead debug code, we have superiotool for this reason.
Restructure file to be consistent with other superio's thereby
avoiding forward declarations of functions.

Change-Id: Ief60d3f54c508cbb7795b284b59710d2c0e3018b
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/8082
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2015-01-04 13:48:47 +01:00
Edward O'Callaghan 117849ef4d superio/smsc/lpc47b272: Use link-time symbols over .c inclusion
Change-Id: Id3d5f2a120c0a933c031102f206829305da20f0c
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/8081
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2015-01-04 13:48:38 +01:00
Edward O'Callaghan c3e77fc953 superio/smsc/lpc47m10x: Use link-time symbols over .c inclusion
Change-Id: I4a3639c05231eacd016ec3873330f9844befd448
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/8080
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2015-01-04 13:48:23 +01:00
Edward O'Callaghan 536a44390d superio/smsc/lpc47b397: Use link-time symbols over .c inclusion
Change-Id: I344f2a8d2ae5f6f3fa04d79773ee1c59de69e425
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/8079
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins)
2015-01-04 13:48:13 +01:00
Edward O'Callaghan b8f05d4faa superio/nsc/pc87417: Use link-time symbols over .c inclusion
Change-Id: I2efb7ab4b69bcd127b2faf54277dc229c9dcf3ea
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/8078
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins)
2015-01-04 13:48:03 +01:00
Edward O'Callaghan db1a2fb3df superio/nsc/pc87366: Use link-time symbols over .c inclusion
Change-Id: Id156ca3c9a14c5bcc4d6cdb8434ca8efdac3139a
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/8077
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2015-01-04 13:47:53 +01:00
Edward O'Callaghan fc4e8550af superio/nsc/pc97317: Use link-time symbols over .c inclusion
Change-Id: Ia45bc7a880d0dab57c56a0452858cd26626f09df
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/8076
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2015-01-04 13:47:45 +01:00