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192 commits

Author SHA1 Message Date
Stefan Reinauer
792ebfecd3 closing issue 44: rename ram clocks in cmos.layout 
https://openbios.org/roundup/linuxbios/issue44



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2340 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-07-19 14:26:41 +00:00
Yinghai Lu
7ac38a33f6 don't wait core0 started twice 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2295 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-05-04 01:05:22 +00:00
Yinghai Lu
9a791dffea new cache_as_ram support 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2232 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-04-03 20:38:34 +00:00
Yinghai Lu
968bbe89cd use hcdn to simplify the mptable.c and irqtable.c --- patch fro issue 
48


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2136 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-12-06 23:34:09 +00:00
Li-Ta Lo
2c2d54479d corrected mptable according to factory DSDT 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2135 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-12-06 22:57:07 +00:00
Stefan Reinauer
373511b2f9 issue 41 - fix up motherboard compilation. There's always hope. 
1201_ht_bus0_dev0_fidvid_mb.diff part 1



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2120 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-12-02 23:16:01 +00:00
Stefan Reinauer
806e146e75 Applying 11_26_car_tyan.diff from Yinghai Lu. 
NOTE: This will break the tree so it can be fixed up later



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2115 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-12-01 10:54:44 +00:00
Jason Schildt
737253bf12 - See Issue Tracker id-15 "lnxi-patch-15". 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2078 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-10-25 21:50:06 +00:00
Jason Schildt
f274d94360 - See Issue Tracker id-13 "lnxi-patch-13". 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2077 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-10-25 21:46:09 +00:00
Jason Schildt
fddf46f275 - See Issue Tracker id-12 "lnxi-patch-12". 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2076 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-10-25 21:45:17 +00:00
Yinghai Lu
13f1c2af8b eric patch 
1. x86_setup_mtrr take address bit.
        2. generic ht, pcix, pcie beidge...
        3. scan bus and reset_bus
        4. ht read ctrl to decide if the ht chain
           is ready
        5. Intel e7520 and e7525 support
        6. new ich5r support
        7. intel sb 6300 support.

yhlu patch
	1. split x86_setup_mtrrs to fixed and var
	2. if (resource->flags & IORESOURCE_FIXED ) return; in device.c pick_largest_resource
	3. in_conherent.c K8_SCAN_PCI_BUS


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1982 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-08 02:49:49 +00:00
arch import user (historical)
59140ccdf3 Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-61 
Creator:  Yinghai Lu <yhlu@tyan.com>

write_pirq_routing_table for x86


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1979 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-06 18:17:35 +00:00
arch import user (historical)
93cabf12d1 Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-53 
Creator:  Yinghai Lu <yhlu@tyan.com>

more safe stack in ram for cache_as_ram


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1969 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-06 17:17:39 +00:00
arch import user (historical)
6ca7636c8f Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-51 
Creator:  Yinghai Lu <yhlu@tyan.com>

cache_as_ram for AMD and some intel


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1967 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-06 17:17:25 +00:00
arch import user (historical)
9c3f37cb5f Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-35 
Creator:  Yinghai Lu <yhlu@tyan.com>

s2881 dual core config


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1951 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-06 17:15:46 +00:00
arch import user (historical)
ef03afa405 Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-34 
Creator:  Yinghai Lu <yhlu@tyan.com>

AMD D0/E0 Opteron new mem mapping support, AMD E Opteron mem hole support,AMD K8 Four Ranks DIMM support


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1950 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-06 17:15:30 +00:00
arch import user (historical)
ca0084ef9b Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-9 
Creator:  Yinghai Lu <yhlu@tyan.com>

rm tyan VERSION


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1928 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-06 16:49:56 +00:00
arch import user (historical)
72c3b053d8 Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-7 
Creator:  Yinghai Lu <yhlu@tyan.com>

ide_enable in MB Config and jmp_auto ( it will make start in the 64k boundary) 


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1926 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-07-06 16:49:52 +00:00
Yinghai Lu
3a23863a3a nodeid 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1849 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2005-01-10 22:20:51 +00:00
Yinghai Lu
ad00d73998 *** empty log message *** 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1765 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-05 22:14:33 +00:00
Yinghai Lu
44b34e31a5 CONFIG_CHIP_NAME to control config chip.h without .name 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1764 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-05 22:03:37 +00:00
Eric Biederman
709850a21b - Ensure every copy of Options.lb uses: 
CROSS_COMPILE
  CC
  HOSTCC
  OBJCOPY


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1755 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-05 10:48:04 +00:00
Eric Biederman
41d0fa38af - Modify all of the Opteron motherboards to have a separate logical 
chip for the amdk8/root_complex


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1750 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-05 07:26:56 +00:00
Yinghai Lu
b2d77282e0 debug device added 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1744 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-04 22:36:18 +00:00
Yinghai Lu
8085f032f8 SI Class code check 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1742 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-04 21:00:13 +00:00
Li-Ta Lo
2d2bdd3846 removed #if 0 #endif code 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1741 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-04 20:31:04 +00:00
Eric Biederman
018d8dd60f - Update abuild.sh so it will rebuild successfull builds 
- Move pci_set_method out of hardwaremain.c
- Re-add debugging name field but only include the CONFIG_CHIP_NAME is
  enabled.  All instances are now wrapped in CHIP_NAME
- Many minor cleanups so most ports build.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1737 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-04 11:04:33 +00:00
Yinghai Lu
3974363f09 *** empty log message *** 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1731 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-02 17:46:43 +00:00
Yinghai Lu
9434c1b661 Tyan update for ROM_IMAGE_SIZE > 64K 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1730 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-11-02 02:34:28 +00:00
Yinghai Lu
6014983bab add Option.lb 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1694 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-20 17:54:01 +00:00
Yinghai Lu
6a61d6a4ae Tyan update to work with new CPU Config 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1693 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-20 05:07:16 +00:00
Eric Biederman
7003ba4a88 - First stab at running linuxbios without the old static device tree. 
Things are close but not quite there yet.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1681 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-16 06:20:29 +00:00
Li-Ta Lo
3bb314725a replace up,across,down with ltd0,ldt1, ldt2 
Although it is not used currently, misuse of terminolog is still a misuse.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1548 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-05-06 21:39:39 +00:00
Yinghai Lu
7ccff4ea0c Disable AMD8111 USB2 and remove hard code addr in amd8111 IDE 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1546 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-05-05 18:03:42 +00:00
Yinghai Lu
97c4947ec9 Changes for btext and etherboot and filo merge support 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1540 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-04-28 05:37:36 +00:00
Stefan Reinauer
2ab88d1179 Major merge of YhLu's code from 2004/04/20: add s2875, various other updates, 
cleanups. Drop "driver" code from mainboard directories and use them from the
driver directory instead


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1534 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-04-24 23:01:33 +00:00
Li-Ta Lo
68a5e08499 make log message a little prettier 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1479 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-03-25 18:04:18 +00:00
Stefan Reinauer
01f887d9f8 Merging patches from Yinghai Lu (fb2_s4882_changes.diff.bz2): 
- new motherboard: Tyan s4882
- minor changes to 2880, s2881, s2885, s4880


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1474 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-03-25 09:31:10 +00:00
Stefan Reinauer
650b6d0b61 Further trimming freebios2 towards code reuse. 
Unified AMD K8 reset function that can be customized via mainboard Config.lb


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1471 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-03-24 14:10:45 +00:00
Stefan Reinauer
b01fb94995 small step to clean up mainboard directories. debug.c was basically identical 
on all amd64 motherboards, so it moved to the amdk8 specific code.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1470 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-03-24 12:28:18 +00:00
Ronald G. Minnich
e4fc0ab250 fixes for tyan 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1392 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-03-12 15:13:38 +00:00
Li-Ta Lo
f0721563b4 Tyan mainboard changes form YhLu 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1326 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-01-12 20:00:43 +00:00