coreboot-kgpe-d16/src
Aamir Bohra 01ae4a7706 intel/fsp2_0: Fix the mp_get_processor_info
FSP expects mp_get_processor_info to give processor specfic apic ID,
core(zero-indexed), package(zero-indexed) and thread(zero-indexed) info.
This function is run from BSP for all logical processor, With current
implementation the location information returned is incorrect per logical
processor. Also the processor id returned does not correspond to the
processor index, rather is returned only for the BSP.

BUG=b:179113790

Change-Id: Ief8677e4830a765af61a0df9621ecaa372730fca
Signed-off-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50880
Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-02-23 03:39:54 +00:00
..
acpi ACPI: Use common OperationRegion for PCI_MMCONF 2021-02-20 21:38:54 +00:00
arch arch/arm/armv7/thread.c: Remove stale file 2021-02-22 07:24:26 +00:00
commonlib commonlib/bsd: Fix direct inclusion of <endian.h> 2021-02-18 02:33:04 +00:00
console console/vtxprintf.c: Add missing <types.h> 2021-02-16 08:15:26 +00:00
cpu src/cpu: Remove unused symbols 2021-02-18 10:11:24 +00:00
device device/dram: Move SPD manufacturer names out of arch/x86 2021-02-16 10:43:11 +00:00
drivers intel/fsp2_0: Fix the mp_get_processor_info 2021-02-23 03:39:54 +00:00
ec src/ec/quanta/ene_kb3940q/acpi/battery.asl: Convert to ASL 2.0 2021-02-10 19:18:09 +00:00
include include/cpu/amd/msr: rename MSR_PSP_ADDR to PSP_ADDR_MSR 2021-02-19 13:20:16 +00:00
lib memlayout: Store region sizes as separate symbols 2021-02-19 08:39:26 +00:00
mainboard mb/google/oak: Add new DRAM modules K4E6E304EC-EGCG-4GB 2021-02-23 02:27:35 +00:00
northbridge nb/intel/ironlake: Drop redundant clear of SLP_TYP 2021-02-23 02:37:09 +00:00
security src/{drivers,security}: Remove unused <string.h> 2021-02-16 17:19:01 +00:00
soc intel/common/block/cpu: Add APIs to get CPU info from lapic ID 2021-02-23 03:39:47 +00:00
southbridge Revert "lynxpoint: Fix SerialIO ACPI compile issue with recent IASL" 2021-02-22 07:37:26 +00:00
superio superio/smsc/sch5545: Add missing <types.h> 2021-02-13 22:06:28 +00:00
vendorcode soc/intel/tigerlake: Add CrashLog implementation for intel TGL 2021-02-22 07:22:50 +00:00
Kconfig southbridge: Ensure common Kconfig gets included last 2021-02-18 10:11:39 +00:00