02164027b2
With using a Kconfig option to add the x86 LAPIC support code to the build, there's no need for adding the corresponding directory to subdirs in the CPU/SoC Makefile. Comparing which CPU/SoC Makefiles added (cpu/)x86/mtrr and (cpu/)x86/lapic before this and the corresponding MTRR code selection patch and having verified that all platforms added the MTRR code on that patch shows that soc/example/min86 and soc/intel/quark are the only platforms that don't end up selecting the LAPIC code. So for now the default value of CPU_X86_LAPIC is chosen as y which gets overridden to n in the Kconfig of the two SoCs mentioned above. Change-Id: I6f683ea7ba92c91117017ebc6ad063ec54902b0a Signed-off-by: Angel Pons <th3fanbus@gmail.com> Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44228 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> |
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.. | ||
acpi | ||
bootblock | ||
include/soc | ||
romstage | ||
acpi.c | ||
chip.c | ||
chip.h | ||
cpu.c | ||
dptf.c | ||
ehci.c | ||
elog.c | ||
emmc.c | ||
fadt.c | ||
gfx.c | ||
gpio.c | ||
hda.c | ||
int15.c | ||
iosf.c | ||
Kconfig | ||
lpe.c | ||
lpss.c | ||
Makefile.inc | ||
memmap.c | ||
modphy_table.c | ||
northcluster.c | ||
pcie.c | ||
perf_power.c | ||
placeholders.c | ||
pmutil.c | ||
ramstage.c | ||
refcode.c | ||
refcode_native.c | ||
sata.c | ||
scc.c | ||
sd.c | ||
smihandler.c | ||
smm.c | ||
southcluster.c | ||
tsc_freq.c | ||
xhci.c |