5f7cfb388e
The PCIe spec explicitly states that the bottom-two bits of the next offset are reserved for future use and should be masked. We can also change the loop condition to avoid wrong offsets below 0x100 (exten- ded capabilities always reside in the extended config space). The whole patch series was tested on Google Samus and keeps the L1ss configuration of the WiFi device in tact. Change-Id: I0b622a0ce0a4a1127d266226ade0ec1e66e9fb79 Signed-off-by: Nico Huber <nico.h@gmx.de> Tested-by: Patrick Georgi <patrick@coreboot.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/66459 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> |
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.. | ||
dram | ||
oprom | ||
azalia_device.c | ||
cardbus_device.c | ||
cpu_device.c | ||
device.c | ||
device_const.c | ||
device_util.c | ||
gpio.c | ||
i2c.c | ||
i2c_bus.c | ||
Kconfig | ||
Makefile.inc | ||
mmio.c | ||
pci_class.c | ||
pci_device.c | ||
pci_early.c | ||
pci_ops.c | ||
pci_rom.c | ||
pciexp_device.c | ||
pcix_device.c | ||
pnp_device.c | ||
resource_allocator_common.c | ||
resource_allocator_v3.c | ||
resource_allocator_v4.c | ||
root_device.c | ||
smbus_ops.c | ||
software_i2c.c | ||
xhci.c |