03be2383e7
Some of the pins are not connected/used on kunimitsu board, this patch will make them "Not connected". Un-used PINS will controlled by GPIO controller (PMODE = GPIO) and GPIO TX/RX will be disabled. BRANCH=none BUG=none TEST=Build and booted in kunimitsu. Change-Id: Iaf0d4806836648808fb91cfc7807c4c1595a5167 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: a7c25ad8ee0d189178124cff20569152b1053488 Original-Change-Id: I3add625b2bf01223cd389c6a5585827ac62dd0c0 Original-Signed-off-by: Pratik Prajapati <pratikkumar.v.prajapati@intel.com> Original-Reviewed-on: https://chromium-review.googlesource.com/316700 Original-Commit-Ready: Pratikkumar V Prajapati <pratikkumar.v.prajapati@intel.com> Original-Tested-by: Pratikkumar V Prajapati <pratikkumar.v.prajapati@intel.com> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-by: Pratikkumar V Prajapati <pratikkumar.v.prajapati@intel.com> Reviewed-on: https://review.coreboot.org/13629 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com> |
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.. | ||
acpi | ||
arch | ||
commonlib | ||
console | ||
cpu | ||
device | ||
drivers | ||
ec | ||
include | ||
lib | ||
mainboard | ||
northbridge | ||
soc | ||
southbridge | ||
superio | ||
vendorcode | ||
Kconfig |