Felix Held 0d2c0019e2 soc/amd/picasso/romstage: factor out chipset state saving functionality ... Since Cezanne needs the exact same code, move it to the common directory and add a Kconfig option to add this functionality to the build. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I04c4295071a3df7afcb4dfd5435b11fb0bf6963f Reviewed-on: https://review.coreboot.org/c/coreboot/+/52272 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Raul Rangel <rrangel@chromium.org>		2021-04-14 00:00:27 +00:00
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acpi	soc/amd,mb/google/,mb/amd: Move sleepstates.asl	2021-03-08 23:30:38 +00:00
block	soc/amd/picasso/romstage: factor out chipset state saving functionality	2021-04-14 00:00:27 +00:00
fsp	soc/amd/picasso: move chipset_handle_reset to common	2020-12-11 17:44:19 +00:00
vboot	soc/amd/common/vboot: use transfer_buffer_valid function	2020-11-30 16:29:14 +00:00
Kconfig.common	soc/amd/common/*/Kconfig: remove unneeded default n for bool options	2021-02-16 23:54:54 +00:00
Makefile.inc	soc/amd/picasso: move chipset_handle_reset to common	2020-12-11 17:44:19 +00:00