coreboot-kgpe-d16/src/mainboard/gigabyte
Patrick Rudolph 5c10abeb73 nb/intel/sandybridge: increase MMCONF_BASE_ADDRESS
Set MMCONF_BASE_ADDRESS to 0xf8000000.
It was already done for some boards, but not all.

The sandybridge chipset code assumes 64 pci buses behind MMCONF.
Therefore, only 64MiB of physical address space is required.

Increasing the address allows to use additional 128MiB of MMIO
space and to use the Intel IGD and a PEG at the same time.

Previously it wasn't possible to use both at the same time,
as two 256MiB areas won't fit into MMIO space.

Test system:
 * Gigabyte GA-B75M-D3H
 * Intel Pentium CPU G2130
 * Onboard GPU Intel IvyBridge Desktop
 * PEG GPU AMD RV770

Change-Id: I3bf72439056c8089ada6899bb0605e5cd9d89cd6
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/14096
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@googlemail.com>
2016-03-21 23:13:13 +01:00
..
ga-6bxc northbridge/intel/i440bx: Unify UDELAY selection 2016-03-10 16:55:35 +01:00
ga-6bxe northbridge/intel/i440bx: Unify UDELAY selection 2016-03-10 16:55:35 +01:00
ga-b75m-d3h nb/intel/sandybridge: increase MMCONF_BASE_ADDRESS 2016-03-21 23:13:13 +01:00
ga-b75m-d3v southbridge/intel/bd82x6x: Use common gpio.c 2016-02-18 01:35:57 +01:00
ga-g41m-es2l mb/gigabyte/ga-g41m-es2l: Remove PMBASE settings and commented code. 2016-01-29 00:29:30 +01:00
ga_2761gxdk mainboard/**/irq_tables.c: Remove reference to getpir 2015-11-10 14:11:06 +01:00
m57sli lib: compile mdelay for romstage 2016-01-22 22:15:09 +01:00
ma78gm ASL: Fix HPBA shadowing. 2016-02-09 19:57:41 +01:00
ma785gm ASL: Fix HPBA shadowing. 2016-02-09 19:57:41 +01:00
ma785gmt ASL: Fix HPBA shadowing. 2016-02-09 19:57:41 +01:00
Kconfig tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
Kconfig.name kconfig: automatically include mainboards 2015-04-18 08:31:08 +02:00