Furquan Shaikh 0dba0254ea spi: Fix parameter types for spi functions ... 1. Use size_t instead of unsigned int for bytes_out and bytes_in. 2. Use const attribute for spi_slave structure passed into xfer, claim bus and release bus functions. BUG=chrome-os-partner:59832 BRANCH=None TEST=Compiles successfully Change-Id: Ie70b3520b51c42d750f907892545510c6058f85a Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://review.coreboot.org/17682 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>		2016-12-05 03:24:38 +01:00
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acpi	soc/intel/skylake: Add _ACx methods for TSR0 sensor for fan control	2016-11-07 20:41:36 +01:00
bootblock	soc/skylake: Move IO decode range out from pch_lpc_init	2016-11-30 16:57:42 +01:00
include	soc/skylake: Move IO decode range out from pch_lpc_init	2016-11-30 16:57:42 +01:00
nhlt
romstage	soc/intel/skylake: Pass proper CPU flex ratio override to FSP	2016-11-30 17:11:41 +01:00
acpi.c	soc/intel/skylake: don't hardcode GPE0 standard reg	2016-10-28 19:01:48 +02:00
chip.c	soc/intel/skylake: Add USB Port Over Current (OC) Pin programming	2016-11-28 19:00:36 +01:00
chip.h	soc/intel/common/lpss_i2c: simplify API and use common config structure	2016-11-11 03:11:45 +01:00
chip_fsp20.c	romstage_handoff: add helper to determine resume status	2016-12-01 08:16:27 +01:00
cpu.c	skylake: Update the thermal time window for throttling action	2016-11-14 17:20:38 +01:00
cpu_info.c
dsp.c
early_smbus.c	soc/intel/skylake: Define early smbus functions	2016-11-23 22:54:14 +01:00
elog.c
finalize.c
flash_controller.c	spi: Fix parameter types for spi functions	2016-12-05 03:24:38 +01:00
gpio.c	soc/intel/skylake: Remove pad configuration size hardcoding	2016-11-30 16:54:36 +01:00
i2c.c	soc/intel/common/lpss_i2c: configure buses by rise/fall times	2016-11-12 00:19:22 +01:00
igd.c	soc/intel/skylake: Add FSP 2.0 support in ramstage	2016-09-19 21:32:22 +02:00
irq.c	soc/intel/skylake: Add FSP 2.0 support in ramstage	2016-09-19 21:32:22 +02:00
Kconfig	soc/intel/skylake: Initialize UART based on CONFIG_UART_DEBUG	2016-11-28 06:58:16 +01:00
lpc.c	soc/intel/skylake: Add device id for PCH-Y	2016-11-07 19:20:21 +01:00
Makefile.inc	soc/intel/skylake: Define early smbus functions	2016-11-23 22:54:14 +01:00
me.c	soc/intel/skylake: Implement Global Reset MEI message	2016-10-16 02:50:26 +02:00
memmap.c	soc/intel/skylake: Fix top_of_ram calculation	2016-11-30 16:59:10 +01:00
monotonic_timer.c
opregion.c	skylake: Add initial FSP2.0 support	2016-08-31 20:02:07 +02:00
pch.c
pcie.c
pcr.c
pei_data.c
pmc.c	skylake: Prepare GPE for use in bootblock	2016-10-27 16:30:36 +02:00
pmutil.c	soc/intel/{sky,apollo}lake: Wait until GPE is clear when reading	2016-11-07 20:39:02 +01:00
reset.c	soc/intel/skylake: Handle platform global reset	2016-10-16 02:51:25 +02:00
sata.c	soc/intel/skylake: Fix SATA booting to OS issue	2016-11-07 20:11:43 +01:00
sd.c
smbus.c
smbus_common.c
smi.c	skylake: Add support for eSPI SMI events	2016-10-27 16:30:54 +02:00
smihandler.c	skylake: Add support for eSPI SMI events	2016-10-27 16:30:54 +02:00
smmrelocate.c
systemagent.c
tsc_freq.c
uart.c
uart_debug.c
vr_config.c	skylake: Add initial FSP2.0 support	2016-08-31 20:02:07 +02:00
xhci.c