Arthur Heymans 0f068a600e drivers/intel/fsp2_0: Fix the FSP-T position ... The only use case for FSP-T in coreboot is for 'Intel Bootguard' support at the moment. Bootguard can do verification FSP-T but there is no verification on whether the FSP found by walkcbfs_asm is the one actually verified as an IBB by Bootguard. A fixed pointer needs to be used. TESTED on OCP/Deltalake, still boots. Change-Id: I1ec8b238384684dccf39e5da902d426d3a32b9db Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52850 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>		2021-05-05 15:14:46 +00:00
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alderlake	soc/intel/alderlake: remove duplicate PL2 override	2021-05-04 15:03:44 +00:00
apollolake	soc/intel: Move pmc_soc_set_afterg3_en() to pmutil.c	2021-04-21 09:17:40 +00:00
baytrail	soc/intel/baytrail/pmutil.c: Define __SIMPLE_DEVICE__	2021-04-19 10:45:15 +00:00
braswell	soc/intel/braswell/pmutil.c: Define __SIMPLE_DEVICE__	2021-04-19 10:45:06 +00:00
broadwell	haswell/broadwell: Replace remaining MCHBAR accessors	2021-04-26 18:39:58 +00:00
cannonlake	soc/intel/cannonlake/include: Drop unused code	2021-05-02 20:31:19 +00:00
common	drivers/intel/fsp2_0: Fix the FSP-T position	2021-05-05 15:14:46 +00:00
denverton_ns	soc/intel/dnv_ns: hook up new gpio device operations	2021-04-08 06:49:55 +00:00
elkhartlake	soc/intel/elkhartlake: Remove elog.c	2021-04-26 08:32:20 +00:00
icelake	soc/intel: Replace open-coded buffer length calculation	2021-04-21 14:21:44 +00:00
jasperlake	soc/intel/*: Update data types for variables holding PCH_DEVFN_* macros	2021-05-03 16:28:53 +00:00
quark	mainboards: Drop PWRS from GNVS	2021-02-11 16:35:32 +00:00
skylake	soc/intel/*: Update data types for variables holding PCH_DEVFN_* macros	2021-05-03 16:28:53 +00:00
tigerlake	soc/intel/*: Update data types for variables holding PCH_DEVFN_* macros	2021-05-03 16:28:53 +00:00
xeon_sp	soc/intel/xeon_sp: Remove bogus SMRAM locking	2021-05-05 12:03:26 +00:00
Kconfig