Kyösti Mälkki ae7ac8a723 ACPI: Separate ChromeOS NVS in ASL ... For builds with MAINBOARD_HAS_CHROMEOS=y but CHROMEOS=n, there is reduced dsdt.aml size and reduced GNVS allocation from cbmem. More importantly, it's less error-prone when the OperationRegion size is not hard-coded inside the .asl files. Change-Id: I54b0d63a41561f9a5d9ebde77967e6d21ee014cd Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49477 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2021-01-28 08:59:11 +00:00
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acpi	ACPI: Separate ChromeOS NVS in ASL	2021-01-28 08:59:11 +00:00
include/soc	soc/amd/picasso: Change GPIO _HID to AMDI0030	2021-01-25 23:09:58 +00:00
psp_verstage	soc/amd/picasso: fix CBFS MCACHE on Zork	2021-01-28 00:26:47 +00:00
acp.c	soc/amd/picasso: move sb_clk_output_48Mhz from acp to fch	2020-12-19 16:29:44 +00:00
acpi.c	ACPI: Have single call-site for acpi_inject_nvsa()	2021-01-13 18:30:13 +00:00
agesa_acpi.c	soc/amd/picasso: Generate ACPI CRAT objects in cb	2021-01-15 11:27:23 +00:00
aoac.c
bootblock.c
chip.c	soc/amd/picasso/chip: use switch/case statement in enable_dev()	2021-01-27 19:25:36 +00:00
chip.h	soc/amd/picasso: Add UPDs for support eDP power sequence adjust	2021-01-25 09:11:03 +00:00
config.c
cpu.c
data_fabric.c
dmi.c
early_fch.c
fch.c	soc/amd: Refactor ACPI power state and ELOG	2021-01-25 17:01:12 +00:00
finalize.c
fsp_params.c	soc/amd/picasso: Add UPDs for support eDP power sequence adjust	2021-01-25 09:11:03 +00:00
fw.cfg
gpio.c
graphics.c
i2c.c	soc/amd/common: Refactor ACPIMMIO posted writes	2020-12-12 19:48:49 +00:00
Kconfig	soc/amd/picasso: fix CBFS MCACHE on Zork	2021-01-28 00:26:47 +00:00
Makefile.inc	soc/amd/picasso: Remove the useless definition of UCODE_FILEs	2021-01-27 15:41:18 +00:00
mca.c
memmap.c
mrc_cache.c	soc/amd/picasso/mrc_cache.c: Remove unused <bootstate.h>	2021-01-20 15:25:15 +00:00
pcie_gpp.c	soc/amd/picasso/pcie_gpp: Remove duplication in pirq_data declaration	2021-01-23 20:14:42 +00:00
psp.c
reset.c
romstage.c	soc/amd: Refactor some ACPI S3 calls	2021-01-26 00:17:38 +00:00
root_complex.c	soc/amd/picasso: add missing GNB I/O APIC initialization	2021-01-08 15:18:18 +00:00
sata.c
smi.c
smihandler.c
smu.c
soc_util.c
uart.c	soc/amd/cezanne,picasso/uart: remove unneeded struct name	2021-01-15 01:19:59 +00:00
update_microcode.c
xhci.c