Jonathan Zhang 1c3fef2ca9 soc/intel/xeon_sp/cpx: skip DRHD generation for non-PCIe stack ... Without skipping of DRHD generation for non-PCIe stack, the OS kernel detects incorrect DMAR table with following messages: [ 0.561817] Your BIOS is broken; DMAR reported at address 0 Signed-off-by: Jonathan Zhang <jonzhang@fb.com> Change-Id: I098605daf12a264f390613581427ec722afcddaf Reviewed-on: https://review.coreboot.org/c/coreboot/+/45887 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>		2020-10-09 16:24:43 +00:00
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alderlake	soc/intel: Make use of common gfx.asl	2020-10-08 04:09:46 +00:00
apollolake	soc/intel: Make use of common gfx.asl	2020-10-08 04:09:46 +00:00
baytrail	drivers/spi: Add BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES config	2020-10-02 23:11:04 +00:00
braswell	soc/intel/braswell: Increase dcache size	2020-10-02 23:11:16 +00:00
broadwell	lynxpoint/broadwell: Relegate IOBP printk to BIOS_SPEW	2020-10-08 08:00:41 +00:00
cannonlake	soc/intel/common/block/acpi: Factor out common gfx.asl	2020-10-08 04:09:32 +00:00
common	soc/intel/common/block/acpi: Factor out common gfx.asl	2020-10-08 04:09:32 +00:00
denverton_ns	soc/intel/common/block/acpi: Factor out common smbus.asl	2020-10-05 04:00:19 +00:00
elkhartlake	soc/intel: Make use of common gfx.asl	2020-10-08 04:09:46 +00:00
icelake	soc/intel: Make use of common gfx.asl	2020-10-08 04:09:46 +00:00
jasperlake	soc/intel/jasperlake: Add VR Configuration settings	2020-10-08 19:11:34 +00:00
quark	arch/x86: Introduce ARCH_ALL_STAGES_X86_32	2020-09-26 11:42:28 +00:00
skylake	soc/intel/common/block/acpi: Factor out common platform.asl	2020-10-05 04:01:40 +00:00
tigerlake	soc/intel: Make use of common gfx.asl	2020-10-08 04:09:46 +00:00
xeon_sp	soc/intel/xeon_sp/cpx: skip DRHD generation for non-PCIe stack	2020-10-09 16:24:43 +00:00
Kconfig