coreboot-kgpe-d16/src/northbridge/intel
Angel Pons 1c9a8d8083 nb/intel/haswell: Add native raminit scaffolding
Implement some scaffolding for Haswell native raminit, like bootmode
selection, handling of MRC cache and CPU detection.

Change-Id: Icd96649fa045ea7f0f32ae9bfe1e60498d93975b
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64182
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2022-12-16 17:19:07 +00:00
..
common
e7505 nb/intel/e7505: Use read32p() 2022-12-06 19:44:41 +00:00
gm45 cpu/intel/speedstep: Have nb and sb code provide c5/c6/slfm 2022-12-05 14:22:12 +00:00
haswell nb/intel/haswell: Add native raminit scaffolding 2022-12-16 17:19:07 +00:00
i440bx src/northbridge: Remove unnecessary space after casts 2022-11-22 13:46:09 +00:00
i945 cpu/intel/speedstep: Have nb and sb code provide c5/c6/slfm 2022-12-05 14:22:12 +00:00
ironlake src/northbridge: Remove unnecessary space after casts 2022-11-22 13:46:09 +00:00
pineview nb/intel/pineview: Use read32p() 2022-12-06 19:46:17 +00:00
sandybridge nb/intel/sandybridge/sandybridge.h: Remove unnecessary guard 2022-12-15 03:13:11 +00:00
x4x treewide: Include <device/mmio.h> instead of <arch/mmio.h> 2022-12-10 05:07:14 +00:00