coreboot-kgpe-d16/src/mainboard/intel/adlrvp
Subrata Banik 34e84b5858 mb/intel/adlrvp: Add PRESERVE to UNIFIED_MRC_CACHE
This patch preserves MRC training data across FW update.

Change-Id: I6b7273471e4fc9dc25eac80904e012f86a981836
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49681
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-01-21 03:29:30 +00:00
..
acpi mb/intel/adlrvp: Add ASL support for WFC annd UFC 2020-12-01 07:59:52 +00:00
include/baseboard mb/intel/adlrvp: Remove unused EC_SYNC_IRQ GPIO on ADLRVP 2020-12-01 08:00:09 +00:00
spd mainboard/intel/adlrvp/spd: Update SPD for LP4x SKU 2020-12-01 07:49:58 +00:00
variants mb/intel/adlrvp: Add PMC.MUX.CONx device config for Conn2 2020-12-09 08:22:16 +00:00
board_id.c
board_id.h
board_info.txt
bootblock.c
chromeos.c
chromeos.fmd mb/intel/adlrvp: Add PRESERVE to UNIFIED_MRC_CACHE 2021-01-21 03:29:30 +00:00
devicetree.cb mb/intel/adlrvp: Fix FW download failed for PEG 060, 010 2021-01-10 17:49:27 +00:00
dsdt.asl mb/intel/adlrvp: Add ASL support for WFC annd UFC 2020-12-01 07:59:52 +00:00
early_gpio.c mb/intel/adlrvp: Update WWAN GPIO as per latest schematics 2020-11-13 17:56:55 +00:00
ec.c mb/intel/adlrvp: Add ADL-P ramstage mainboard code 2020-10-14 14:49:01 +00:00
gpio.c mb/intel/adlrvp: Update GPIOs as per latest schematics 2021-01-10 17:49:54 +00:00
Kconfig mb/intel/adlrvp: Remove redundant HAS_RECOVERY_MRC_CACHE Kconfig 2021-01-21 03:29:17 +00:00
Kconfig.name
mainboard.c mb/intel/adlrvp: Add ADL-P ramstage mainboard code 2020-10-14 14:49:01 +00:00
Makefile.inc mb/intel/adlrvp: Refactor ADLRVP code to get rid of 'variants/baseboard' 2020-11-08 17:16:23 +00:00
memory.c mb/intel/adlrvp: Add support for LPDDR5 2020-12-01 07:49:47 +00:00
romstage_fsp_params.c mb/intel/adlrvp: Add support for LPDDR5 2020-12-01 07:49:47 +00:00
smihandler.c mb/intel/adlrvp: Add ADL-P ramstage mainboard code 2020-10-14 14:49:01 +00:00