Arthur Heymans 1eecb8c814 nb/intel/x4x: Hook up PCI domain and CPU bus ops to devicetree ... Change-Id: I0a7b3167392c152da6459dfc202ef11b2e61400a Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69295 Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2022-12-01 10:28:10 +00:00
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h61-series	nb/intel/sandybridge: Add a chipset devicetree	2022-11-30 15:19:06 +00:00
maximus_iv_gene-z	nb/intel/sandybridge: Add a chipset devicetree	2022-11-30 15:19:06 +00:00
p2b	ACPI: Flag boards with ACPI_NO_MADT	2022-11-25 15:03:47 +00:00
p5gc-mx	nb/intel/i945: Hook up PCI domain and CPU bus ops to devicetree	2022-12-01 10:28:03 +00:00
p5qc	nb/intel/x4x: Hook up PCI domain and CPU bus ops to devicetree	2022-12-01 10:28:10 +00:00
p5ql-em	nb/intel/x4x: Hook up PCI domain and CPU bus ops to devicetree	2022-12-01 10:28:10 +00:00
p5qpl-am	nb/intel/x4x: Hook up PCI domain and CPU bus ops to devicetree	2022-12-01 10:28:10 +00:00
p8x7x-series	nb/intel/sandybridge: Add a chipset devicetree	2022-11-30 15:19:06 +00:00
Kconfig	src: Remove leading blank lines from SPDX header	2020-05-18 07:00:27 +00:00
Kconfig.name