coreboot-kgpe-d16/src/soc/intel
Angel Pons 1fb17d65cf soc/intel/baytrail/cpu.c: Align with Braswell
This reduces the differences between Bay Trail and Braswell.

Tested with BUILD_TIMELESS=1, Google Ninja remains identical.

Change-Id: I9d9edd774143b0a98773b6d5de630d116cb6f0b1
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43197
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-07-25 10:22:33 +00:00
..
apollolake src: Use ACPI macros 2020-07-21 18:26:47 +00:00
baytrail soc/intel/baytrail/cpu.c: Align with Braswell 2020-07-25 10:22:33 +00:00
braswell soc/intel/{baytrail,braswell}: Drop unneeded return 2020-07-25 10:19:14 +00:00
broadwell src: Use ACPI macros 2020-07-21 18:26:47 +00:00
cannonlake soc/intel/cannonlake: Move tco_configure to bootblock 2020-07-22 21:06:29 +00:00
common soc/intel/tigerlake: Update Tiger Lake SA IDs 2020-07-25 00:07:20 +00:00
denverton_ns src: Report word-sized access for PM1a_EVT 2020-07-20 13:33:32 +00:00
icelake src: Use ACPI macros 2020-07-21 18:26:47 +00:00
jasperlake soc/intel/jasperlake: Add the SkipCpuReplacementCheck configuration 2020-07-23 04:54:01 +00:00
quark src: Make HAVE_CF9_RESET set the FADT reset register 2020-07-20 13:23:13 +00:00
skylake src: Use ACPI macros 2020-07-21 18:26:47 +00:00
tigerlake soc/intel/tigerlake: Update Pkg C-State latencies 2020-07-25 04:46:44 +00:00
xeon_sp soc/intel/xeon_sp/cpx: display SystemMemoryMapHob fields 2020-07-23 08:46:14 +00:00
Kconfig fsp2_0: Gather Kconfig declarations 2020-04-05 23:26:24 +00:00