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Aaron Durbin 1fef1f5177 haswell: reserve default SMRAM space 
Currently the OS is free to use the memory located at the default
SMRAM space because it is not marked reserved in the e820. This can
lead to memory corruption on S3 resume because SMM setup doesn't save
this range before using it to relocate SMRAM.

Resulting tables:

	coreboot memory table:
	 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
	 1. 0000000000001000-000000000002ffff: RAM
	 2. 0000000000030000-000000000003ffff: RESERVED
	 3. 0000000000040000-000000000009ffff: RAM
	 4. 00000000000a0000-00000000000fffff: RESERVED
	 5. 0000000000100000-0000000000efffff: RAM
	 6. 0000000000f00000-0000000000ffffff: RESERVED
	 7. 0000000001000000-00000000acebffff: RAM
	 8. 00000000acec0000-00000000acffffff: CONFIGURATION TABLES
	 9. 00000000ad000000-00000000af9fffff: RESERVED
	10. 00000000f0000000-00000000f3ffffff: RESERVED
	11. 00000000fed10000-00000000fed19fff: RESERVED
	12. 00000000fed84000-00000000fed84fff: RESERVED
	13. 0000000100000000-000000018f5fffff: RAM

	e820 map has 13 items:
	  0: 0000000000000000 - 0000000000030000 = 1 RAM
	  1: 0000000000030000 - 0000000000040000 = 2 RESERVED
	  2: 0000000000040000 - 000000000009f400 = 1 RAM
	  3: 000000000009f400 - 00000000000a0000 = 2 RESERVED
	  4: 00000000000f0000 - 0000000000100000 = 2 RESERVED
	  5: 0000000000100000 - 0000000000f00000 = 1 RAM
	  6: 0000000000f00000 - 0000000001000000 = 2 RESERVED
	  7: 0000000001000000 - 00000000acec0000 = 1 RAM
	  8: 00000000acec0000 - 00000000afa00000 = 2 RESERVED
	  9: 00000000f0000000 - 00000000f4000000 = 2 RESERVED
	  10: 00000000fed10000 - 00000000fed1a000 = 2 RESERVED
	  11: 00000000fed84000 - 00000000fed85000 = 2 RESERVED
	  12: 0000000100000000 - 000000018f600000 = 1 RAM

Booted and checked e820 as well as coreboot table information.

Change-Id: Ie4985c748b591bf8c0d6a2b59549b698c9ad6cfe
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/2688
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-03-15 16:58:37 +01:00
..
arch x86: improve lb_cleanup_memory_ranges 2013-03-14 20:13:19 +01:00
console Eliminate do_div(). 2013-03-08 23:14:26 +01:00
cpu haswell: Add ULT CPUID and updated microcode 2013-03-14 18:24:27 +01:00
device GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« 2013-03-01 10:16:08 +01:00
drivers GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« 2013-03-01 10:16:08 +01:00
ec Support ITE IT8518 embedded controller running Quanta's firmware 2013-03-14 04:54:21 +01:00
include haswell: reserve default SMRAM space 2013-03-15 16:58:37 +01:00
lib Eliminate do_div(). 2013-03-08 23:14:26 +01:00
mainboard baskingridge: Report static temperature in _TMP 2013-03-14 20:15:08 +01:00
northbridge haswell: reserve default SMRAM space 2013-03-15 16:58:37 +01:00
southbridge lynxpoint: lpc resource reservations 2013-03-14 20:18:57 +01:00
superio AMD SB800: don't switch clock from 14 to 48 MHz for smscsuperio 2013-03-06 19:07:28 +01:00
vendorcode AGESA: Fix CR0_PE bit define 2013-03-08 07:30:06 +01:00
Kconfig bump SeaBIOS to 1.7.2.1 2013-03-04 11:00:17 +01:00