coreboot-kgpe-d16/src
Felix Held 2463aa9117 sandybridge/raminit_common: use MCHBAR AND/OR/AND_OR macros [1/2]
When using timeless builds and coreboot crossgcc 6.3.0, the checksum of the
resulting binary doesn't change with applying this commit.

Change-Id: I2b1dc8befa3381f3edac06704e31e7ef50f86fa4
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/27724
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-08-01 12:22:42 +00:00
..
acpi
arch riscv: fix issues (timestrap & PRIu64) 2018-07-31 10:07:57 +00:00
commonlib security/tpm: Use unique CBMEM names for TCPA logs 2018-07-30 15:47:23 +00:00
console arch/x86: Drop leftover ROMCC console support 2018-06-08 03:31:12 +00:00
cpu nb/intel/gm45: Use common code for SMM in TSEG 2018-07-30 19:11:00 +00:00
device pnp_device: don't treat missing PNP_MSC devicetree entry as error 2018-07-29 15:06:41 +00:00
drivers drivers/i2c/da7219: Allow disabling micbias-pulse feature 2018-07-30 18:45:44 +00:00
ec ec/lenovo/h8/acpi: Fix ACPI error in _INI 2018-07-30 18:59:51 +00:00
include soc/intel/common/block: Add WhiskeyLake (WHL) IDs 2018-08-01 06:49:54 +00:00
lib util/cbmem: Add cbmem TCPA log support 2018-07-28 16:58:30 +00:00
mainboard mb/google/octopus: add lpddr4 skus for new memory sources 2018-07-31 19:16:45 +00:00
northbridge sandybridge/raminit_common: use MCHBAR AND/OR/AND_OR macros [1/2] 2018-08-01 12:22:42 +00:00
security security/tpm/tspi: Set return type of tcpa_log_add_table_entry as void 2018-07-31 21:58:43 +00:00
soc soc/intel/common/block: Add WhiskeyLake (WHL) IDs 2018-08-01 06:49:54 +00:00
southbridge nb/intel/gm45: Use common code for SMM in TSEG 2018-07-30 19:11:00 +00:00
superio sio/smsc/fdc37n972: add missing pnp_conf_mode field to ops struct 2018-07-26 14:22:28 +00:00
vendorcode src/vendorcode/amd/pi/00670F00: Remove IMC support 2018-07-31 00:46:25 +00:00
Kconfig Kconfig: Make the EM100 config option common 2018-07-16 07:41:14 +00:00