coreboot-kgpe-d16/src/soc
Tim Wawrzynczak 24b1c54226 soc/intel/alderlake: Set SaIpuEnable UPD according to devicetree
The SaIpuEnable UPD is not currently being touched by coreboot; set it
according to the enabled status of the corresponding devicetree node.

TEST=turn ipu device on or off in devicetree, see device enumerated or
not in OS, according to the devicetree setting.

Change-Id: I53752f92c4b49093218cc34848727a72b63e84eb
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55143
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-06-08 16:47:32 +00:00
..
amd cpu/x86: Default to PARALLEL_MP selected 2021-06-07 21:02:54 +00:00
cavium
example
intel soc/intel/alderlake: Set SaIpuEnable UPD according to devicetree 2021-06-08 16:47:32 +00:00
mediatek soc/mediatek/mt8195: fix GPIO register offsets 2021-06-05 13:05:15 +00:00
nvidia cbfs: Replace more instances of cbfs_boot_locate() with newer APIs 2021-03-17 08:10:20 +00:00
qualcomm soc: common: gpio: Add support for common GPIO driver 2021-06-04 12:40:41 +00:00
rockchip soc/rockchip/rk3399/sdram: Add channel to error message 2021-03-04 01:22:10 +00:00
samsung commonlib/region: Turn addrspace_32bit into a more official API 2021-04-21 02:06:26 +00:00
sifive memlayout: Store region sizes as separate symbols 2021-02-19 08:39:26 +00:00
ti soc/ti/am335x/mmc.c: Fix memset length argument 2021-04-04 09:58:26 +00:00
ucb